CN109894962B

CN109894962B - Silicon wafer edge polishing process

Info

Publication number: CN109894962B
Application number: CN201711290241.4A
Authority: CN
Inventors: 路一辰; 王新; 李俊峰; 潘紫龙; 王玥; 李耀东; 曲翔; 史训达
Original assignee: Grinm Semiconductor Materials Co Ltd
Current assignee: Shandong Youyan semiconductor materials Co.,Ltd.
Priority date: 2017-12-07
Filing date: 2017-12-07
Publication date: 2020-04-17
Anticipated expiration: 2037-12-07
Also published as: CN109894962A

Abstract

The invention discloses a silicon wafer edge polishing process, which comprises the following steps: (1) cleaning the silicon wafer by using a cleaning machine; (2) carrying out machine centering treatment on the cleaned silicon wafer; (3) polishing the edge of the round edge of the silicon wafer; (4) carrying out reference surface positioning treatment on the silicon wafer with the polished round edge; (5) and carrying out reference surface edge polishing treatment on the silicon wafer with the determined reference surface position. According to the invention, by increasing the cleaning treatment before edge polishing and changing the sequence of the edge polishing process, the problem of reference surface edge corrosion damage caused in the edge polishing process is effectively solved, the smooth and undamaged reference surface edge is obtained, and the epitaxial processing and device processing yield is improved.

Description

Silicon wafer edge polishing process

Technical Field

The invention relates to a silicon wafer edge polishing process, and belongs to the technical field of silicon wafer processing.

Background

With the rapid development of the semiconductor industry along moore's law, the feature size of microelectronic devices is continuously reduced, and increasingly strict requirements are provided for the integrity, uniformity, surface quality, edge quality, performance detection and evaluation and the like of silicon materials. In order to increase the productivity of epitaxial wafer or device manufacturers, more stringent requirements are placed on the quality of the silicon wafer edge. For 8 inch or larger silicon wafers, edge polishing is typically required prior to the surface polishing process. The edge polishing adopts chemical mechanical polishing, a thin polishing solution layer is arranged between the edge surface of the silicon wafer and the polishing cloth, the edge surface of the silicon wafer is corroded to generate a chemical transition layer, under the combined action of the polishing cloth and the polishing solution, the chamfer damage layer is continuously corroded and removed, and finally the smooth and undamaged edge surface is obtained, so that edge breakage, edge defect after epitaxy and the like are prevented.

In a conventional edge polishing process, the edge of a reference surface is generally polished first, and then the edge of a circular edge is polished. The process is characterized in that no cleaning is carried out before edge polishing, and the reference surface edge polishing is prior to the round edge polishing. Due to the hydrophobicity of the edge surface, SiO in the polishing solution₂The alkaline solution of colloidal suspension is accumulated on the edge surface, so that the chemical corrosion effect is larger than the mechanical removal effect, and the surface micro-roughness is increased. Meanwhile, when the silicon wafer with the reference surface polished passes through the round edge polishing machine, since the reference surface is not mechanically acted, a chemical corrosion damage layer caused by the polishing solution to the reference surface is remained and observed under a metallographic microscope (Nikon-L200N) as shown in FIG. 2. The silicon wafer with the damaged layer on the edge is easy to generate epitaxial stacking fault defects at the damaged part during epitaxial processing, the yield of the epitaxial wafer or the device is reduced, and the product quality is influenced. As shown in FIG. 3, the edge defect after epitaxy was observed under a metallographic microscope (Nikon-L200N).

Disclosure of Invention

The invention aims to provide a silicon wafer edge polishing process, which aims to solve the technical problem that a reference surface of a silicon wafer is corroded and damaged in the polishing process of a round edge in the prior art and improve the yield of epitaxial processing and device processing.

In order to achieve the purpose, the invention adopts the following technical scheme:

a silicon wafer edge polishing process comprises the following steps:

(1) cleaning the silicon wafer by using a cleaning machine;

(2) carrying out machine centering treatment on the cleaned silicon wafer;

(3) polishing the edge of the round edge of the silicon wafer;

(4) carrying out reference surface positioning treatment on the silicon wafer with the polished round edge;

(5) and carrying out reference surface edge polishing treatment on the silicon wafer with the determined reference surface position.

In the step (1), the silicon wafer is cleaned for 1 time by using the SC-1 cleaning solution for 6-10 minutes at the cleaning temperature of 50-80 ℃, and then is subjected to QDR washing in a pure water tank for 3 times, so that the edge surface of the silicon wafer is hydrophilic finally. Wherein the SC-1 cleaning solution is prepared from ammonia water, hydrogen peroxide and pure water according to the proportion of (1-2): (1-2): (10-20) by mass ratio.

Preferably, in the step (2), an edge polishing machine is used for centering the silicon wafer, and the deviation range of the center of the silicon wafer and the center of the machine table is within 0.2 mm.

Preferably, in the step (3), the hardness of the polishing cloth is 60Aske-C, the edge polishing pressure is 80-120N, the rotation speed is 500-.

Preferably, in the step (4), the parallelism between the reference plane of the silicon wafer and the machine table is within 0.1 mm.

Preferably, in the step (5), the hardness of the polishing cloth is 60Aske-C, the edge polishing pressure is 10-30N, the rotation speed is 1000-1300r/min, and the time is 50-90 s.

The invention has the advantages that:

according to the invention, by increasing the cleaning treatment before edge polishing and changing the sequence of the edge polishing process, the problem of reference surface edge corrosion damage caused in the edge polishing process is effectively solved, the smooth and undamaged reference surface edge is obtained, and the epitaxial processing and device processing yield is improved.

Drawings

FIG. 1 is a process flow diagram of the present invention.

FIG. 2 shows the edge corrosion damage of a silicon wafer processed by a conventional edge polishing process.

FIG. 3 shows the defect generated after the silicon wafer with corrosion damage is subjected to epitaxy.

FIG. 4 is a graph of the post-epitaxial topography of a silicon wafer processed using the process of the present invention.

Detailed Description

The invention is further illustrated by the following figures and examples, which are not meant to limit the scope of the invention.

As shown in fig. 1, which is a process flow diagram of the present invention, the process comprises the following steps in sequence: SC-1 cleaning, silicon wafer centering treatment, round edge polishing, reference surface positioning and reference surface edge polishing.

Examples

Processing a 8-inch silicon wafer with a flat edge reference surface and heavily doped As and chamfer angle of 22 degrees

(1) Cleaning the polished silicon wafer to be polished by using a cleaning machine, and cleaning by SC-1, wherein the SC-1 cleaning solution is formed by mixing ammonia water, hydrogen peroxide and pure water according to the ratio of 1: 15. The washing time was 7 minutes and the washing temperature was 70 ℃, after which QDR washing was performed 3 times in a pure water tank. And finally drying in a spin-drying mode.

(2) And (2) putting the silicon wafer cleaned in the step (1) into a loading platform of the edge polishing machine, and carrying the silicon wafer to a centering machine platform through a manipulator for centering and positioning, so as to ensure that the deviation range of the center of the silicon wafer and the center of the machine platform is within 0.2 mm.

(3) And (3) carrying out round edge polishing treatment on the silicon wafer centered in the step (2), wherein the hardness of the used polishing cloth is 60Aske-C, the edge polishing liquid is formed by mixing polishing liquid (Cabot-EP4000C) and pure water according to the proportion of 1: 15, the pH value is controlled within the range of 10.5-11, the edge polishing pressure is 100N, the rotating speed is 800r/min, and the time is 60 s.

(4) And (4) carrying out reference surface positioning treatment on the silicon wafer with the polished round edge in the step (3), wherein the parallelism of the reference surface of the silicon wafer and the machine is within 0.1 mm.

(5) And (4) carrying out reference surface edge polishing treatment on the silicon wafer with the reference surface position determined in the step (4), wherein the hardness of the used polishing cloth is 60Aske-C, the edge polishing pressure is 20N, the rotating speed is 1100r/min, and the time is 60 s.

As shown in FIG. 4, when the silicon wafer processed in this example was observed under a metallographic microscope (Nikon-L200N), the edge reference surface was free from corrosion damage and defects after epitaxy.

Claims

1. The silicon wafer edge polishing process is characterized by comprising the following steps of:

(1) cleaning the silicon wafer by using a cleaning machine;

(2) carrying out machine centering treatment on the cleaned silicon wafer;

(3) polishing the edge of the round edge of the silicon wafer;

2. The silicon wafer edge polishing process according to claim 1, wherein in the step (1), the silicon wafer is cleaned for 1 time with the SC-1 cleaning solution for 6-10 minutes at 50-80 ℃, and then is subjected to QDR rinsing in a pure water tank for 3 times, so as to finally make the silicon wafer edge surface hydrophilic.

3. The silicon wafer edge polishing process according to claim 2, wherein the SC-1 cleaning solution is prepared by mixing ammonia water, hydrogen peroxide and pure water according to the mass ratio of (1-2) to (10-20).

4. The silicon wafer edge polishing process according to claim 1, wherein in the step (2), the silicon wafer is centered by using an edge polishing machine, and the center of the silicon wafer deviates from the center of the machine within 0.2 mm.

5. The silicon wafer edge polishing process as claimed in claim 1, wherein in the step (3), the hardness of the polishing cloth is 60Aske-C, the edge polishing pressure is 80-120N, the rotation speed is 500-.

6. The wafer edge polishing process of claim 1, wherein in step (4), the parallelism of the wafer reference plane and the machine is within 0.1 mm.

7. The silicon wafer edge polishing process as claimed in claim 1, wherein in the step (5), the hardness of the polishing cloth used is 60Aske-C, the edge polishing pressure is 10-30N, the rotation speed is 1000-.