CN109860200A - Three-dimensional storage and preparation method thereof - Google Patents
Three-dimensional storage and preparation method thereof Download PDFInfo
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- CN109860200A CN109860200A CN201910236356.8A CN201910236356A CN109860200A CN 109860200 A CN109860200 A CN 109860200A CN 201910236356 A CN201910236356 A CN 201910236356A CN 109860200 A CN109860200 A CN 109860200A
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Abstract
The embodiment of the invention discloses a kind of three-dimensional storages and preparation method thereof.The three-dimensional storage includes: at least two grid layers for stacking setting；First kind grid at least two grid layer, comprising: at least one first grid unit, the first grid unit include the first first medium layer stacked gradually from the bottom to top, second dielectric layer, second first medium layer and metal gate layers；The dielectric constant of the second dielectric layer is less than the dielectric constant of the first medium layer.
Description
Technical field
The present embodiments relate to integrated circuit fields, in particular to a kind of three-dimensional storage and preparation method thereof.
Background technique
In IC industry, three-dimensional storage passes through the stacked structure that stacking is arranged on substrate, and ties to stacking
Structure such as performs etching at the techniques, and storage unit is stacked on the direction perpendicular to substrate, can be formed on lesser area more
Storage unit.
In order to obtain bigger memory capacity on unit chip area, it is desirable that the stacking number of stacked structure is increasingly
More, the thickness of stacked structure is increasing, this makes the etching through hole in three-dimensional storage, and then forms the storage of vertical stacking
The difficulty of unit is increasing, and process costs are more and more expensive, seriously constrains the development of three-dimensional storage technology.
Summary of the invention
In view of this, the embodiment of the present invention provides a kind of three-dimensional storage and preparation method thereof.
First aspect of the embodiment of the present invention provides a kind of three-dimensional storage, comprising: stacks at least two grid layers of setting；
First kind grid at least two grid layer, comprising:
At least one first grid unit, the first grid unit include first first stacked gradually from the bottom to top
Dielectric layer, second dielectric layer, second first medium layer and metal gate layers；
The dielectric constant of the second dielectric layer is less than the dielectric constant of the first medium layer.
Optionally, the second class grid in described at least two grid layers, comprising:
At least one second grid unit, the second grid unit include the first medium layer and gold being laminated from the bottom to top
Belong to grid layer；
The second class grid is located at the lower section of the first kind grid.
Optionally, the three-dimensional storage further include:
Through-hole runs through the first kind grid and the second class grid；
Epitaxial layer is located at the via bottoms, and bolt-lock effect occurs in the three-dimensional storage for preventing；
Multilayer film functional layer is located at the through-hole side wall, for storing charge.
Optionally, the thickness of the epitaxial layer is less than the thickness of the second class grid.
Optionally, the second dielectric layer is air layer.
The second aspect of the embodiment of the present invention provides a kind of production method of three-dimensional storage characterized by comprising
Form first first medium layer, third dielectric layer, second first medium layer and the metal gates stacked gradually
Layer；
The third dielectric layer is removed to form gap in first kind grid；
Second dielectric layer is formed in the gap, wherein the dielectric constant of the second dielectric layer is less than described first
The dielectric constant of dielectric layer.
Optionally, the production method is also further include:
In the lower section of the first kind grid, the first medium layer stacked gradually and metal gate layers are formed to form second
Class grid.
Optionally, the production method further include:
Form at least one through-hole for running through first kind grid and the second class grid；
Epitaxial layer is formed in the via bottoms, latch-up occurs in the three-dimensional storage for preventing；
Multilayer film functional layer is formed in the through-hole side wall, for storing charge.
Optionally, the method also includes: formed stacked on top setting at least two areas of dielectric；
The method in the first medium region formed at least two dielectric layer includes:
Form the first medium layer and the 4th dielectric layer for stacking setting；
The method in the second medium region formed at least two dielectric layer includes:
In the top in the first medium region, first first medium layer for stacking setting, third dielectric layer, the are formed
Two first medium layers and the 4th dielectric layer.
It is optionally, described to form second dielectric layer in the gap, comprising:
Make to fill air formation air layer in the gap.
Above-mentioned three-dimensional storage provided through the embodiment of the present invention and preparation method thereof is stacked in three-dimensional storage and is set
Set at least two grid layers；First kind grid at least two grid layer, comprising: at least one first grid unit,
The first grid unit includes the first first medium layer stacked gradually from the bottom to top, second dielectric layer, second first
Dielectric layer and metal gate layers, wherein the dielectric constant of the second dielectric layer is less than the dielectric constant of the first medium layer,
Because dielectric constant reduces, then relative to entirely by the grid of the higher first medium layer of dielectric constant, can reduce adjacent
First grid unit between capacitance coupling effect and leakage current, and then can reduce no longer because leakage current and electricity need to be reduced
Holding coupling effect leads to that thicker grid is arranged, therefore reduces the thickness of first grid unit, so that first kind grid layer
Overall thickness reduces, and realizes while improving memory capacity, reduces the thickness of stacked structure, improve three-dimensional storage
Quality.
Detailed description of the invention
Fig. 1 is a kind of structural schematic diagram of three-dimensional storage provided in an embodiment of the present invention；
Fig. 2 is a kind of structural schematic diagram of the through-hole of three-dimensional storage provided in an embodiment of the present invention；
Fig. 3 is under same thickness using the cut-in voltage scatter chart of the storage unit of different medium layer；
Fig. 4 is a kind of flow diagram of three-dimensional storage production method provided in an embodiment of the present invention；
Fig. 5 to Fig. 6 is a kind of schematic diagram of three-dimensional storage production method；
Fig. 7 to Figure 18 is the schematic diagram of another three-dimensional storage production method provided in an embodiment of the present invention.
Specific embodiment
Below in conjunction with drawings and examples, the technical solution of the present invention is further elaborated.Although being shown in attached drawing
The illustrative embodiment of the disclosure, it being understood, however, that may be realized in various forms the disclosure without that should be explained here
The embodiment stated is limited.On the contrary, providing these embodiments is to be able to the more thorough explanation disclosure, and can
The scope of the present disclosure is fully disclosed to those skilled in the art.
Referring to attached drawing, more specifically description is of the invention by way of example in the following passage.It is wanted according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
In embodiments of the present invention, term " A is connected with B " includes that both A, B contact with each other the situation that ground A is connected with B, or
Person A, B between the two also between be inserted with other component and situation that A is non-contactly connected with B.
In embodiments of the present invention, term " first ", " second " etc. are to be used to distinguish similar objects, without for retouching
State specific sequence or precedence.
It should be noted that between technical solution documented by the embodiment of the present invention, in the absence of conflict, Ke Yiren
Meaning combination.
With the development of electronic industry, three-dimensional storage passes through more numbers of plies because the characteristics of three-dimensional develops
It gate stack and forms higher storage unit and realizes higher storage density, therefore cause more and more to pay close attention to.For
The higher storage density of realization, the number of plies of three-dimensional storage are continuously increased.
It may include peripheral circuit region and storage array area (array) in three-dimensional storage part.The peripheral circuit region is not only
For the power supply of storage array area, it is also equipped with logical operation and the effect of electrostatic protection.The storage array area may include core space
(core) and stepped region, the stepped region can be positioned at at least sides of the core space, for drawing the gold in storage array area
Belong to the electric signal of grid layer.Wordline of the metal gate layers as storage array executes the operation such as programming, erasable, reading.
In embodiments of the present invention, described " X-direction sectional view " is three-dimensional storage along the core space and stepped region
Direction sectional view, " the Y-direction sectional view " be three-dimensional storage in the plane for being parallel to the grid layer, perpendicular to
The sectional view in the direction of " X-direction ".Curve in attached drawing between " X-direction sectional view " and " Y-direction sectional view " is only
For separating " X-direction sectional view " and " Y-direction sectional view ", practical significance is not had.
As shown in Figure 1, the embodiment of the present invention provides a kind of three-dimensional storage, comprising: stack at least two grids of setting
Layer；
First kind grid 10 at least two grid layer, comprising:
At least one first grid unit 11, the first grid unit include first stacked gradually from the bottom to top
One dielectric layer 12,13, second first medium layers 14 of second dielectric layer and metal gate layers 15；
The dielectric constant of the second dielectric layer is less than the dielectric constant of the first medium layer.
In embodiments of the present invention, the three-dimensional storage may include 3D nand memory.
In embodiments of the present invention, at least two grid layers for stacking setting are located on substrate, and substrate is subsequent step
Suddenly it provides a supporting role and good electric property.The material of the substrate can include: silicon, germanium silicon etc..
In embodiments of the present invention, the number of the first grid unit, which can according to need, is configured, such as described
The number of first grid unit can be 32,64,96,128 etc. 2nIt is a.The setting of these first grid element stacks.When
So, the number of the first grid unit is not limited to the example above, can be 2 or more any numbers.
In embodiments of the present invention, the material of the first medium layer can include: oxide, nitrogen oxides or oxidation of coal
Object.Such as first first medium layer can be silica, second first medium layer can be nitrogen oxides.The metal
The material of grid layer can include: tungsten.
The production method provided through the embodiment of the present invention introduces dielectric constant in first kind grid and is less than first medium
The second dielectric layer of the dielectric constant of layer can reduce the thickness of first grid unit while reducing leakage current and capacitive coupling
Degree, and then it is thinned the thickness of first kind grid, it is single that more storages can be integrated in the case where the thickness of three-dimensional storage is constant
Member improves the memory capacity of three-dimensional storage.
In some embodiments, the three-dimensional storage further includes the second class grid at least two grid layers
20, comprising:
At least one second grid unit 21, the second grid unit include the first medium layer 12 being laminated from the bottom to top
With metal gate layers 15；
The second class grid 20 is located at the lower section of the first kind grid 10.
It in embodiments of the present invention, does not include second dielectric layer in the second grid unit in the second class grid.
In some embodiments, the epitaxy layer thickness is less than the thickness of the second class grid.
In embodiments of the present invention, when the second dielectric layer in the second class grid is air layer, the thickness of epitaxial layer is small
In the thickness of the second class grid, air layer is avoided to be in contact with epitaxial layer.If epitaxial layer is contacted with air layer, deposited in preparation three-dimensional
During reservoir, higher preparation temperature will lead to epitaxial layer continued growth, and enter in air layer, due to the epitaxial layer
It is electrically conductive, first kind grid can be made to puncture into the epitaxial layer in air layer, so that three-dimensional storage fails.
As shown in Fig. 2, in some embodiments, the three-dimensional storage further include:
Through-hole 30 runs through the first kind grid and the second class grid；
Epitaxial layer 31 is located at the via bottoms, latch-up occurs in the three-dimensional storage for preventing；
Multilayer film functional layer 32 is located at the through-hole side wall, for storing charge.
In embodiments of the present invention, the epitaxial growth of silicon is carried out in the bottom of through-hole, forms epitaxial layer.The epitaxial layer is used
In latch (latch up) effect for preventing device, component failure is avoided.
In embodiments of the present invention, the through-hole in the radial direction, the multilayer film functional layer is from outside to inside successively
It may include barrier layer 320, electric charge capture layer 321, tunnel layer 322 and channel layer 323.The material on the barrier layer may include oxidation
Silicon；The material of the electric charge capture layer may include silicon nitride and/or silicon oxynitride；The material of the tunnel layer may include oxidation
Silicon；The material of the channel layer may include polysilicon.Wherein, barrier layer is covered in the sidewall surfaces of the first through hole, charge
Trapping layer is covered in the barrier layer surface, and tunnel layer is covered in the charge-trapping layer surface, and channel layer is covered in the tunnel
Layer surface is worn, ONOP (oxidenitride oxide-polysilicon) structure is constituted, forms storage unit.The barrier layer position
In through-hole side wall, for stopping the charge in the accumulation layer to flow out；The electric charge capture layer is used to capture charge from tunnel layer
And store charge；The tunnel layer is for generating charge；The channel layer plays the role of support.
In some embodiments, the second dielectric layer is air layer.
According to Fig.3, for the air layer, oxide skin(coating) or nitride layer of same thickness is respectively adopted as dielectric layer
The storage unit of preparation, it is most narrow as the distribution of the cut-in voltage of the storage unit of dielectric layer using air layer, i.e., into
When row programming operation, it is easier to select suitable cut-in voltage to complete the control to storage unit, i.e., by air layer as medium
The controllability of the storage unit of layer preparation is more preferable.If but only use air layer as dielectric layer, can gate structure be collapsed,
The three-dimensional storage of stable structure cannot be formed.Therefore, the embodiment of the present invention is using first first medium layer, air layer, the
Two first medium layers form the second class grid as insulating medium layer, with metal gate layers, and reducing, the second class grid is thick
While spending, the increase of leakage current is also avoided, ensure that the electric stability and quality of three-dimensional storage.
As shown in figure 4, the embodiment of the present invention provides a kind of production method of three-dimensional storage, comprising:
Step S10: formed the first first medium layer stacked gradually, third dielectric layer, second first medium layer and
Metal gate layers；
Step S20: the third dielectric layer is removed to form gap in first kind grid；
Step S30: second dielectric layer is formed in the gap, wherein the dielectric constant of the second dielectric layer is less than
The dielectric constant of the first medium layer.
In embodiments of the present invention, the side of first first medium layer, second first medium layer, third dielectric layer is formed
Method can include: chemical vapor deposition (CVD).It, can such as when first medium layer is silica, third dielectric layer is polysilicon
By the way that silane and oxygen, nitric oxide or carbon dioxide are passed through reaction chamber, and react in the state of plasma,
Generate silica；Silane is passed through reaction chamber under the conditions of 575~650 DEG C on the surface of first first medium layer
In, by thermally decomposing gaseous silane, generate solid polysilicon layer.
In some embodiments, the production method further include:
In the lower section of the first kind grid, the first medium layer stacked gradually and metal gate layers are formed to form second
Class grid.
In some embodiments, the method also includes: formed stacked on top setting at least two areas of dielectric；
The method in the second medium region formed at least two dielectric layer includes:
Form the first medium layer and the 4th dielectric layer for stacking setting；
The method in the first medium region formed at least two dielectric layer includes:
In the top in the second medium region, first first medium layer for stacking setting, third dielectric layer, the are formed
Two first medium layers and the 4th dielectric layer.
In some embodiments, the production method includes:
Form at least one through-hole for running through first kind grid and the second class grid；
The epitaxial layer for preventing that latch-up occurs in the three-dimensional storage is formed in the via bottoms；
The multilayer film functional layer for storing charge is formed in the through-hole side wall.
In the peripheral circuit region of three-dimensional storage part, there is MOS device.On MOS device top and storage array area top
Insulating medium layer is covered, and there are multiple contact holes through the insulating medium layer.Contact hole arrives separately at the source of MOS device
Pole, drain electrode, grid are used at the top of multilayer film functional layer in different metallic gates layer surface and core space also in arrival stepped region
In drawing the source electrode of MOS device, drain electrode, metal gate layers in grid and storage array area, the telecommunications in multilayer film functional layer
Number.
In three-dimensional storage, latch-up is made of the active area of the active area of NMOS, substrate P, N trap, PMOS
What n-p-n-p structure generated, when one of triode positively biased, positive feedback will be constituted in active area and form latch.It is fastening with a bolt or latch
In the case of lock, device forms short circuit between power supply and ground, causes high current, electric overload (EOS) and device failure.Pass through to be formed
The epitaxial layer being connected with substrate can reduce the dead resistance of substrate, and parasitic triode is made to be not at positively biased state.
In embodiments of the present invention, described to form at least one through the logical of the first kind grid and the second class grid
Hole, comprising:
Mask is formed in the first medium region surface；
Pattern area is formed in mask surface；
According to the pattern area, the through-hole for running through the first medium region and the second medium region is formed.
In embodiments of the present invention, usually it is situated between by removing the in the first medium region and second medium region the 4th
Matter layer forms metal gate layers by metallization step to form void area in the void area, and then forms the
A kind of grid and the second class grid.In order to avoid the first medium region described after forming void area and the second medium area
Domain collapses, it usually needs before metallization step, is formed and is passed through in first medium region and the second medium region
The through-hole in first medium region and the second medium region is worn, and forms support column in the through hole.The support column
Production method further include:
Epitaxial layer is formed in via bottoms；
Form the barrier layer being located on the side wall of the through-hole；
Form the surface charge trapping layer for being located at the barrier layer；
Form the tunnel layer for being located at the charge-trapping layer surface；
Pattern based on the through-hole for foring the tunnel layer fills channel layer.
In embodiments of the present invention, the method for forming the through-hole may include wet etching etc..The wet etching can wrap
It includes: using phosphoric acid as etching agent, in a heated condition, in first medium corresponding with pattern area region and second medium region
First medium layer, third dielectric layer, the 4th dielectric layer react, generate gaseous compound, in first medium region and
Second medium forms through-hole in region.
In some inventive embodiments, the method also includes: along through-hole direction depositing polysilicon material in described
The top of multilayer film functional layer forms via plug, is used to form conductive connection.
In some embodiments, described to form second dielectric layer in the gap, comprising: to make to fill in the gap empty
Gas forms air layer.
Several specific examples are provided below in conjunction with above-mentioned any embodiment:
Example 1:
Fig. 5 to Fig. 6 shows the production method of 3D NAND a kind of, by the way that the titanium dioxide being alternately stacked is formed on the substrate
Silicon 42 and silicon nitride 41 insert gold in the gap then removing silicon nitride in the subsequent process, and being formed after removing silicon nitride
Belong to tungsten, form metal gate 43, and form through-hole in the stacked structure, and then form vertical storage unit 44, with this reality
The manufacturing process of existing 3D NAND.
However, with the increase of 3D NAND stacking number, process difficulty is also further in 3D nand memory field
It improves, such as via depth increases, in etching through hole, the step coverage (step coverage) of part stacked structure layer
It is gradually deteriorated, the step coverage refers to the film thickness uniformity in the side wall of the stacked structure and surface covering；
And due between capacitive coupling effect, storage unit (cell) and the storage unit in area of grid between wordline (WL) and wordline
Capacitive coupling the cut-in voltage (V between storage unit all will be further increasedt) distribution curve width, lead to different storages
Cut-in voltage difference between unit becomes larger, and is unfavorable for the control of storage unit.
In order to realize the stacking of higher number, the Nitride Oxide stacked structure (NO for being used to prepare gate structure is thinned
Stack) be also important developing direction, but the method can bring leakage current increase and it is capacity coupled be further exacerbated by,
Therefore, how to realize leakage current and capacity coupled reduction is an important issue of 3D NAND development.
Therefore, detailed to a kind of production method progress of 3D NAND provided in an embodiment of the present invention below in conjunction with Fig. 7 to Figure 18
It is thin to introduce, comprising:
The first medium layer 12 and the 4th dielectric layer 17 stacked gradually is formed on the substrate, to form second medium region
200, the second medium region includes at least two first medium layers and two the 4th dielectric layers；
The second medium overlying regions formed stack gradually first first medium layer 12, third dielectric layer 16,
Second first medium layer 14 and the 4th dielectric layer 17, to form first medium region；
The two sides in first medium region and second medium region are etched, stepped region is formed；
At least one through-hole 30 (channel hole) for running through core space is formed, it is raw to form extension in the via bottoms
Long layer 31 (SEG)；
In the through-hole in the radial direction, barrier layer 320, electric charge capture layer 321, tunnelling are sequentially formed from outside to inside
Layer 322 and channel layer 323 form multilayer film functional layer 32, and silicon plug 33 is formed at the top of multilayer film functional layer；
In the horizontal plane, perpendicular on the direction of the stepped region, in the first medium region and second medium region
Middle formation groove 50；
The 4th dielectric layer in the first medium region and the second medium region is removed, void area is formed；
The first barrier layer 51 is formed in the position that the groove 50 is in contact with the first medium layer, third dielectric layer；
Metal is filled in the void area, forms metal gate layers 15；
Remove the metal being located in the groove；
The third dielectric layer is removed, air layer is formed；
The second barrier layer 52 is formed in the trench；
Etching is located at the second barrier layer of part of the channel bottom, and fills metal in the trench.
In embodiment provided herein, it should be understood that disclosed apparatus, system and method can pass through
Other modes are realized.The above description is merely a specific embodiment, but protection scope of the present invention is not limited to
This, anyone skilled in the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement,
It should be covered by the protection scope of the present invention.Therefore, protection scope of the present invention should be with the protection model of the claim
Subject to enclosing.
Claims (10)
1. a kind of three-dimensional storage characterized by comprising stack at least two grid layers of setting；
First kind grid at least two grid layer, comprising:
At least one first grid unit, the first grid unit include first first medium stacked gradually from the bottom to top
Layer, second dielectric layer, second first medium layer and metal gate layers；
The dielectric constant of the second dielectric layer is less than the dielectric constant of the first medium layer.
2. three-dimensional storage according to claim 1, which is characterized in that second at least two grid layer
Class grid, comprising:
At least one second grid unit, the second grid unit include the first medium layer and metal gate being laminated from the bottom to top
Pole layer；
The second class grid is located at the lower section of the first kind grid.
3. three-dimensional storage according to claim 2, which is characterized in that the three-dimensional storage further include:
Through-hole runs through the first kind grid and the second class grid；
Epitaxial layer is located at the via bottoms, and bolt-lock effect occurs in the three-dimensional storage for preventing；
Multilayer film functional layer is located at the through-hole side wall, for storing charge.
4. three-dimensional storage according to claim 3, which is characterized in that
The epitaxy layer thickness is less than the thickness of the second class grid.
5. three-dimensional storage according to any one of claims 1 to 4, which is characterized in that the second dielectric layer is air
Layer.
6. a kind of production method of three-dimensional storage characterized by comprising
Form first first medium layer, third dielectric layer, second first medium layer and the metal gate layers stacked gradually；
The third dielectric layer is removed to form gap in first kind grid；
Second dielectric layer is formed in the gap, wherein the dielectric constant of the second dielectric layer is less than the first medium
The dielectric constant of layer.
7. production method according to claim 6, which is characterized in that the production method further include:
In the lower section of the first kind grid, the first medium layer stacked gradually and metal gate layers are formed to form the second class grid
Pole.
8. production method according to claim 7, which is characterized in that the production method further include:
Form at least one through-hole for running through first kind grid and the second class grid；
Epitaxial layer is formed in the via bottoms, latch-up occurs in the three-dimensional storage for preventing；
Multilayer film functional layer is formed in the through-hole side wall, for storing charge.
9. production method according to claim 6, which is characterized in that the method also includes: form stacked on top setting
At least two areas of dielectric；
The method in the first medium region formed at least two dielectric layer includes:
Form the first medium layer and the 4th dielectric layer for stacking setting；
The method in the second medium region formed at least two dielectric layer includes:
In the top in the first medium region, first first medium layer for stacking setting, third dielectric layer, second are formed
First medium layer and the 4th dielectric layer.
10. according to the described in any item production methods of claim 6 to 9, which is characterized in that described to form in the gap
Second medium layer, comprising:
Make to fill air formation air layer in the gap.
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| US9653475B1 (en) * | 2015-12-01 | 2017-05-16 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing the same |
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| US20070051998A1 (en) * | 2005-09-08 | 2007-03-08 | Deok-Sin Kil | Semiconductor memory device with dielectric structure and method for fabricating the same |
| CN105226063A (en) * | 2014-06-25 | 2016-01-06 | 三星电子株式会社 | There is the semiconductor device of vertical-channel and air gap |
| WO2016032838A2 (en) * | 2014-08-26 | 2016-03-03 | Sandisk Technologies Inc. | Monolithic three dimensional nand strings and methods of fabrication thereof |
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