CN109856879A - Dot structure and preparation method thereof and display panel - Google Patents
Dot structure and preparation method thereof and display panel Download PDFInfo
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- CN109856879A CN109856879A CN201910280423.6A CN201910280423A CN109856879A CN 109856879 A CN109856879 A CN 109856879A CN 201910280423 A CN201910280423 A CN 201910280423A CN 109856879 A CN109856879 A CN 109856879A
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Abstract
The application provides a kind of dot structure and preparation method thereof and display panel.The dot structure include: substrate, the passivation layer being arranged in substrate, the thin film transistor (TFT) being arranged between substrate and passivation layer drain electrode and be arranged in passivation layer separate substrate side pixel electrode.Wherein, pixel electrode is continuous continual plane-shape electrode.Pixel electrode includes the first recessed portion, multiple second recessed portions and multiple third recessed portions.First recessed portion is in contact to be formed be electrically connected through passivation layer and with the drain electrode of thin film transistor (TFT).Multiple second recessed portions and multiple third depressed area in the first recessed portion side or be located at the opposite sides of the first recessed portion；The depth of first recessed portion is greater than the depth of the second recessed portion and the depth of third recessed portion, and the depth of the second recessed portion is different from the depth of third recessed portion.
Description
Technical field
This application involves field of display technology more particularly to a kind of dot structure, a kind of dot structure production method and
A kind of display panel.
Background technique
Active Thin Film Transistor-LCD (Thin Film Transistor-LCD, TFT-LCD) obtains in recent years
To development at full speed and it is widely applied.For the TFT-LCD display panel on current mainstream market, three types can be divided into
Type is respectively: twisted-nematic (Twisted Nematic, TN) or super twisted nematic (Super Twisted Nematic, STN)
Type, plane conversion (In-PlaneSwitching, IPS) type and vertical orientation (Vertical Alignment, VA) type.Wherein
The relatively other kinds of liquid crystal display of VA type liquid crystal display has high contrast, generally can reach 4000-8000,
Large scale shows that TV etc. such as has very wide application.
It is the liquid crystal molecule because in not powered dark-state why VA type liquid crystal display panel, which has high contrast,
It is arranged perpendicular to substrate surface, does not generate any phase difference, light leakage is extremely low.In order to make the liquid crystal point in VA type liquid crystal display panel
Son can be arranged perpendicular to substrate surface, need to carry out vertical orientation processing to liquid crystal molecule.Polymer stabilizing vertical orientation
(polymer-stabilized verticalalignment, PSVA) wide viewing angle technology is exactly to carry out the one of orientation to liquid crystal layer
Kind mode, with faster response time and higher contrast.
General PSVA type liquid crystal display panel is the passivation layer that one layer of protection channel is coated in array substrate, then will be sunk
Product patterns (pattern) processing in the pixel electrode of passivation layer surface, and the tilting electric field generated can induce not same district
Liquid crystal molecule in domain swings to different directions.But due to ITO (Indium Tin Oxide, indium tin oxide) pixel electrode
Pattern is processed into the structure with pixel electrode branch and slit, cause at bifurcation and slit with color film (CF, Color
Filter phenomena such as) electric field is different between substrate-side common electrode of ITO, easily causes uneven Luminance Distribution, penetrance loss.
Summary of the invention
The application provide a kind of dot structure for helping to be promoted light transmittance and homogeneity and promoting visible angle, as
The production method and display panel of plain structure.
Specifically, a kind of dot structure provided by the embodiments of the present application, comprising: substrate；Passivation layer is arranged in the substrate
On；The drain electrode of thin film transistor (TFT) is arranged between the substrate and the passivation layer；And pixel electrode, it is arranged described blunt
Change the side far from the substrate of layer, and the pixel electrode is continuous continual plane-shape electrode.Wherein, the pixel electricity
Pole includes the first recessed portion, multiple second recessed portions and multiple third recessed portions, and first recessed portion runs through the passivation layer
And be in contact with the drain electrode of the thin film transistor (TFT) to be formed and be electrically connected, the multiple second recessed portion and the multiple
Three depressed area in first recessed portion side or be located at the opposite sides of first recessed portion；Described first is recessed
Concave portion has the first depth, the multiple second recessed portion the second depth having the same, and the multiple third recessed portion has
Identical third depth, first depth are greater than second depth and the third depth, and second depth and institute
It is different to state third depth.
In one embodiment of the application, the pixel electrode includes main pixel electrode area and sub-pixel electrode district, described more
A second depressed area is in the main pixel electrode area and has multiple and different differently-s oriented directivity, the multiple third depressed area
In the sub-pixel electrode district and there is multiple and different differently-s oriented directivity, and second depth is less than the third depth.
In one embodiment of the application, there are four different differently-s oriented directivity for the multiple second recessed portion tool, the multiple
There are four different differently-s oriented directivity for third recessed portion tool, and the area in the main pixel electrode area is less than the sub-pixel electrode district
Area.
In addition, a kind of display panel that the embodiment of the present application also provides, comprising: the first substrate and the second base being oppositely arranged
Plate；Display dielectric layer between the first substrate and the second substrate.The first substrate includes several pixel knots
Structure, each dot structure includes: substrate；Passivation layer, setting is on the substrate；The drain electrode of thin film transistor (TFT), setting exist
Between the substrate and the passivation layer；The side far from the substrate of the passivation layer is arranged in pixel electrode, and described
Pixel electrode is continuous continual plane-shape electrode.Wherein, the pixel electrode includes the first recessed portion, multiple second recessed portions
With multiple third recessed portions, first recessed portion is in contact and is formed with the drain electrode of the thin film transistor (TFT) and is electrically connected,
The multiple second recessed portion and the multiple third recessed portion are located at the two sides of first recessed portion；Described first is recessed
Concave portion has the first depth, the multiple second recessed portion the second depth having the same, and the multiple third recessed portion has
Identical third depth, first depth are greater than second depth and the third depth, and second depth and institute
It is different to state third depth.
In one embodiment of the application, the pixel electrode of the display panel includes main pixel electrode area and sub-pixel
Electrode district, the multiple second depressed area is in the main pixel electrode area and has multiple and different differently-s oriented directivity, described more
A third depressed area is in the sub-pixel electrode district and has multiple and different differently-s oriented directivity, and second depth is less than institute
State third depth.
In one embodiment of the application, there are four different orientations for the multiple second recessed portion tool of the display panel
Direction, there are four different differently-s oriented directivity for the multiple third recessed portion tool, and the area in the main pixel electrode area is less than institute
State the area of sub-pixel electrode district.
In addition, a kind of production method for dot structure that the embodiment of the present application provides again, comprising: provide substrate, wherein institute
State the drain electrode and layer of passivation material that thin film transistor (TFT) is sequentially formed in substrate；Using multistage tune mask plate carry out photoetching process with
It patterns the layer of passivation material and obtains passivation layer, wherein the multistage tune mask plate includes having the first of different transparencies to expose
Light region, multiple second exposure areas and multiple third exposure areas, correspondingly the passivation layer formation has corresponding described first
The via hole of exposure area, multiple first grooves of corresponding the multiple second exposure area and corresponding the multiple third exposure region
Multiple second grooves in domain；And continuous continual plane-shape electrode is formed on the passivation layer as pixel electrode, wherein
The pixel electrode include the first recessed portion, multiple second recessed portions and multiple third recessed portions, first depressed area in
It is in contact and is formed with the drain electrode of the thin film transistor (TFT) in the via hole and be electrically connected, the multiple second recessed portion difference
In the multiple first groove, the multiple third recessed portion is located in the multiple second groove, and described first
Recessed portion has the first depth, the multiple second recessed portion the second depth having the same, the multiple third recessed portion tool
Have an identical third depth, first depth is greater than second depth and the third depth, and second depth with
The third depth is different.
In one embodiment of the application, for the production method of the dot structure, the pixel electrode includes main pixel
Electrode district and sub-pixel electrode district, the multiple second depressed area is in the main pixel electrode area and has multiple and different take
To direction, the multiple third depressed area is in the sub-pixel electrode district and has multiple and different differently-s oriented directivity, and described
Second depth is less than the third depth.
In one embodiment of the application, for the production method of the dot structure, the multiple second recessed portion has
Four different differently-s oriented directivity, different differently- oriented directivity that there are four the multiple third recessed portion tools, and the main pixel electrode
The area in area is less than the area of the sub-pixel electrode district.
In one embodiment of the application, for the production method of the dot structure, first exposure area is complete exposes
Light region, the multiple second exposure area and the multiple third exposure area are the different half-exposure region of transparency, and
The multiple second exposure area and the multiple third exposure area are set up separately in the not ipsilateral of first exposure area.
From the foregoing, it will be observed that the recessed portion of different depth, energy are arranged by the different zones in pixel electrode for the embodiment of the present application
It is enough to obtain the electric field of varying strength in different zones.Deep recessed portion corresponds to weak electric field, and scrobicula concave portion corresponds to strong electrical field.In strong electrical field
Region obtains biggish light transmittance, obtains lesser light transmittance in weak electric field region, and then a pixel can be divided into
Bright field area and dark field area, making liquid crystal cell in different directions has colour cast compensation effect.And the pixel that the embodiment of the present application proposes
The production method of structure is exposed and is developed to layer of passivation material by a photoetching process using a multistage tune mask plate
Etc. patterned process, avoid since via hole all has different depth from channel, need two mask plates in a photolithographic process
Higher and working efficiency the decline of production cost caused by yellow light twice and twice etching technique is carried out, work can be simplified by reaching
The effect of skill and raising efficiency.
Detailed description of the invention
Technical solution in ord to more clearly illustrate embodiments of the present application, below will be to required use in embodiment description
Attached drawing be briefly described, it should be apparent that, the drawings in the following description are only some examples of the present application, for this
For the those of ordinary skill of field, without creative efforts, it can also be obtained according to these attached drawings others
Attached drawing.
Fig. 1 is the cross-sectional view of the embodiment of the present application dot structure.
Fig. 2 is the structural schematic diagram of the embodiment of the present application pixel electrode.
Fig. 3 is the flow chart of the production method of the embodiment of the present application dot structure.
Fig. 4 A-4C is the dependency structure schematic diagram of the production method of the embodiment of the present application dot structure.
Fig. 5 is the structural schematic diagram of the embodiment of the present application display panel.
Specific embodiment
Specific structure and function details disclosed herein are only representative, and are for describing showing for the application
The purpose of example property embodiment.But the application can be implemented by many alternative forms, and be not interpreted as
It is limited only by the embodiments set forth herein.
In the description of the present application, it is to be understood that term " center ", " transverse direction ", "upper", "lower", "left", "right",
The orientation or positional relationship of the instructions such as "vertical", "horizontal", "top", "bottom", "inner", "outside" be orientation based on the figure or
Positional relationship is merely for convenience of description the application and simplifies description, rather than the device or element of indication or suggestion meaning must
There must be specific orientation, be constructed and operated in a specific orientation, therefore should not be understood as the limitation to the application.In the application
Description in, unless otherwise indicated, the meaning of " plurality " is two or more.In addition, term " includes " and its any change
Shape, it is intended that cover and non-exclusive include.
The application is described further in the following with reference to the drawings and specific embodiments.
As shown in Figure 1, Fig. 1 is the cross-sectional view of the embodiment of the present application dot structure.Dot structure 10 includes: substrate
12, the drain electrode 16 of setting passivation layer 14, the thin film transistor (TFT) being arranged between substrate 12 and passivation layer 14 on the base 12, with
And the pixel electrode 18 of the side of the separate substrate 12 of passivation layer 14 is set.Wherein, pixel electrode 18 is continuous continual
Plane-shape electrode.Pixel electrode 18 includes recessed portion (the first recessed portion) 102, multiple recessed portions (the second recessed portion) 104 and multiple
Recessed portion (third recessed portion) 106.Particularly, the depth of multiple recessed portions 104 is identical and is H2 (the second depth), multiple recess
The depth in portion 106 is also identical and is H3 (third depth).Recessed portion 102 is in contact and is formed with drain electrode 16 and is electrically connected namely recessed
Concave portion 102 runs through passivation layer 14.Multiple recessed portions 104 and multiple recessed portions 106 are for example located at opposite the two of recessed portion 102
Side, certain multiple recessed portions 104 and multiple recessed portions 106 can also be located at the same side of recessed portion 102, only be located at recessed
Effect is more preferable when the opposite sides of concave portion 102.The depth of recessed portion 102 is H1 (the first depth) and H1 > H3 > H2, namely recess
102 depth H 1 is greater than the depth H 2 of recess 104 greater than the depth H 3 of recess 106 and the depth H 3 of recess 106.
Fig. 2 is referred to, Fig. 2 is the structural schematic diagram of the embodiment of the present application pixel electrode.Pixel electrode 18 is for example including master
Pixel electrode area 182 and sub-pixel electrode district 184.Multiple recessed portions 104 are located in main pixel electrode area 182 and multiple recessed portions
104 have such as 45 °, 135 °, 225 ° and 315 ° of multiple and different differently-s oriented directivity.Multiple recessed portions 106 are located at sub-pixel electrode
Area 184 and multiple recessed portions 106 have such as 45 °, 135 °, 225 ° and 315 ° of multiple and different differently-s oriented directivity.Furthermore it is worth one
It is mentioned that, Fig. 2 is primarily to illustrate main pixel electrode area 182 and sub-pixel electrode district 184, therefore be recessed 102 in Fig. 2
It does not draw, however, it will be understood that recess 102 is, for example, between main pixel electrode area 182 and sub-pixel electrode district 184
In the region being connected, or recess 102 is located at the upside in main pixel electrode area 182 or the downside of sub-pixel electrode district 184.
More specifically, main pixel electrode area 182 includes a pixel electrode frame 1822, main pixel electrode area 182 is by one
A cross pixel electrode skeleton 1824 has been divided into four sub-regions, has in each subregion several from pixel electrode skeleton
1824 horizontal parts 1826 extended to pixel electrode frame 1822, and horizontal part 1826 is to be arranged alternately with recessed portion 104.It is each
Horizontal part 1826 in subregion is parallel with the differently- oriented directivity of recessed portion 104, and horizontal part 1826 between all subregion and recessed
The differently- oriented directivity of concave portion 104 is all different.Similarly, sub-pixel electrode district 184 includes a pixel electrode frame 1842, sub-pixel
Electrode district 184 is divided into four sub-regions by a cross pixel electrode skeleton 1844, is equipped in each subregion from bone
The horizontal part 1846 that frame 1844 extends to pixel electrode frame 1842, horizontal part 1846 and recessed portion 106 in each subregion
It can be to be alternately arranged in parallel, and the differently- oriented directivity of the horizontal part 1846 and recessed portion 106 between all subregion is all different.At this
In embodiment, pixel electrode 18 is divided into eight domains (domain), and the area in main pixel electrode area 182 is less than sub-pixel electrode district
184 area.Due to the area equation of each subregion in main pixel electrode area 182, each of in sub-pixel electrode district 184
Subregion area is also equal, so again smaller than one sub-pixel electrode of the area of the subregion in a Ge Zhu pixel electrode area 182
The area of subregion in area 184.It is appreciated that above-mentioned area relationship can change, no in the other embodiments of the application
The area of area and all subregion with pixel electrode area can be equal, can also be unequal.
In addition, the recessed portion in same pixel electrode district in adjacent subarea domain can be with the pixel between two sub-regions
Electrode skeleton is axial symmetry, or asymmetric geometry.Such as the sub-pixel electrode district 184 of pixel electrode 18 shown in Fig. 2
Two sub-regions of lower part in recessed portion 106 using vertical portion of the pixel electrode skeleton 1844 in figure as axial symmetry.In this Shen
Please be in other embodiments, the recessed portion in different subregions can be using skeleton as axial symmetry, or unsymmetric structure, such as
Recessed portion in horizontal part in one subregion and adjacent subarea domain is using the pixel electrode skeleton between the two subregions as axis
Symmetrically.Recessed portion 104,106 can respectively have there are four different differently-s oriented directivity, further, it is to be appreciated that the structure of pixel electrode 18
It is not limited to above description, such as recessed portion 104,106 can be respectively provided with the direction of more or fewer different orientations.In short,
Other designs by pixel electrode subregion and each region recess with different depths, shall fall in the protection scope of this application.
It is the flow chart of the production method of the embodiment of the present application dot structure please also refer to Fig. 3 and Fig. 4 A-4C, Fig. 3, figure
4A-4C is the dependency structure schematic diagram of the production method of the embodiment of the present application dot structure.
Step S1: referring to Fig. 4 A, provides substrate 12, sequentially forms the drain electrode 16 of thin film transistor (TFT) and blunt on the base 12
Change material layer 140；
Step S2: referring to Fig. 4 B and 4C, carries out photoetching using multistage tune mask plate (multi-tone mask, MTM) 30
Technique obtains passivation layer 14 to pattern layer of passivation material 140；
Step S3: continuous continual plane-shape electrode is formed on passivation layer 14 as pixel electrode 18, as shown in Figure 1.
More specifically, as shown in Figure 4 C, multistage tune mask plate 30 includes the exposure area 32 (first with different transparencies
Exposure area), multiple exposure areas 34 (the second exposure area) and multiple exposure areas 36 (third exposure area), can be corresponding
Ground forms multiple grooves 144 (the of the via hole 142 of corresponding exposure area 32, corresponding multiple exposure areas 34 on passivation layer 14
One groove) and corresponding multiple exposure areas 36 multiple grooves 146 (second groove).Due to the recessed portion 102 of pixel electrode 18
In via hole 142, recessed portion 104 is located in groove 144, recessed portion 106 is located in groove 146, so via hole 142 accordingly has
There is maximum depth, the drain electrode 16 being disposed below can be exposed；The depth of groove 144 and the depth of groove 146 do not wait and have
Body in the present embodiment groove 144 depth be less than groove 146 depth.In order to obtain via hole 142 with different depths and
Groove 144,146, exposure area 32 can run through the layer of passivation material 140 for full exposure area to pattern, exposure area 34,
36 can be the different half-exposure region of transparency to form the different groove 144,146 of depth in layer of passivation material 140；Exposure
Region 34 and 36 is respectively provided at the two sides of exposure area 32.And when the depth of groove 144 is less than the depth of groove 146, expose
The transparency in light region 34 is, for example, less than the transparency of exposure area 36, and the thickness that specifically can behave as exposure area 34, which is greater than, to expose
The thickness in light region 36.
It holds above-mentioned, using a multistage tune mask plate 30 layer of passivation material 140 is exposed, is developed etc. at patternings
It manages, concretely the coating photoresist in layer of passivation material 140, the photoresist is exposed using multistage tune mask plate 30,
Development obtains patterning photoresist layer (not shown), then using above-mentioned photoresist layer as shielding layer, performs etching to layer of passivation material 140,
It removes remaining photoresist and obtains passivation layer 14.At this time passivation layer 14 have positioned at 14 upper surface of passivation layer several grooves,
And the via hole 142 above passivation layer 14 and corresponding drain electrode 16.In this way, which a photoetching process can be made simultaneously
Hole 142 and groove with different depths 144,146, avoiding has different depth from groove due to via hole, and is etching
When need two mask plates to carry out raising and the working efficiency of production cost caused by yellow light twice and twice etching technique
Decline, technique and raising efficiency can be simplified.Then the pixel electrode 18 of a flood planar, such picture are plated on passivation layer 14
Plain electrode 18 just has pattern identical with passivation layer 14, ultimately forms dot structure 10.Wherein, pixel electrode 18 can pass through
Hole 142 is connected with drain electrode 16.The material of pixel electrode 18 can be indium tin oxide (ITO), i.e. pixel electrode 18 can be one
Layer indium and tin oxide film.
Fig. 5 is referred to, Fig. 5 is the structural schematic diagram of one display panel of the embodiment of the present application.Display panel 70 includes opposite
The substrate 72 and 74 of setting and the display dielectric layer 76 between substrate 72 and 74.Display panel 70 can be liquid crystal display
(LCD) panel, substrate 72 and 74 can be thin film transistor (TFT) array (array) substrate and color membrane substrates respectively at this time, and display is situated between
Matter layer 76 can be liquid crystal layer.The display panel 70 of the application can also be PSVA type liquid crystal display panel, OLED (Organic
Light-Emitting Diode) panel or other kinds of panel.By taking LCD panel as an example, in such as array substrate of substrate 72
Including several dot structures 10 as described above, the specific descriptions of each dot structure 10 are referred to above, are not repeated herein；
Such as color membrane substrates of substrate 74 are equipped with public electrode 78, and public electrode 78 can be ITO electrode layer.Substrate 72 is equipped with pixel
The side that the side of structure 10 and substrate 74 are equipped with public electrode 78 is opposite, and two substrates, which are aligned, can be prepared by a liquid crystal at box
Show panel.
The above embodiments of the present application by be arranged in different pixel electrode area 182,184 different depth recessed portion 104,
106, keep the pixel electrode 18 in different pixels electrode district 182,184 different from the electric field between public electrode 78.Specifically, by
It is less than the depth of recessed portion 106 in the depth of recessed portion 104, the main pixel electrode area 182 with recessed portion 104 on substrate 72
Pixel electrode 18 and substrate 74 on public electrode 78 between electric field can be greater than with recessed portion 106 sub-pixel electrode district
Electric field between 184 pixel electrode 18 and public electrode 78, and then the penetrance of the light in main pixel electrode area 182 can be greater than secondary
The penetrance of the light in pixel electrode area 184, therefore a pixel is divided into the bright field region in corresponding main pixel electrode area 182
With the dark field region of corresponding sub-pixel electrode district 184.This set helps compensate for the colour cast of liquid crystal cell in different directions
(color shift) expands the visible angle (viewing angle) of panel.Furthermore, it is worth mentioning at this point that, main pixel electrode
The depth of each recessed portion 104 in area 182 is identical, is conducive to form uniform electric field in main pixel electrode area 182；Equally
The depth on ground, each recessed portion 106 of sub-pixel electrode district 184 is identical, is conducive to be formed in sub-pixel electrode district 184 equal
Even electric field.
A kind of method for preparing dot structure that the embodiment of the present application proposes, since the depth of groove 144,146 is different,
For needing to carry out using two mask plates in the related technology, yellow light and twice etching technique will cause the inclined of production cost twice
The problem of high and working efficiency decline, the embodiment of the present application using an exposure area 32 for having multiple and different transparencies,
34,36 multistage tune mask plate 30 is completed the patterning of layer of passivation material 140 with a photoetching process, simplifies technique and mention
Efficiency is risen.Meanwhile the method that the embodiment of the present application does not use patterned pixel electrode, but by 140 figure of layer of passivation material
After case chemical conversion is passivation layer 14, cover entire pixel electrode 18 on passivation layer 14, such pixel electrode 18 can have with it is blunt
Change the corresponding pattern of layer 14.Again since pixel electrode 18 is continual plane-shape electrode, so as described by previous embodiment
The pixel electrode 18 for being divided into eight domains be still the whole face electrode of no disconnection.
The above content is combine specific embodiment to further description made by the application, and it cannot be said that the application
Specific implementation be only limited to these instructions.For those of ordinary skill in the art to which this application belongs, it is not departing from
Under the premise of the application conceives, a number of simple deductions or replacements can also be made, all shall be regarded as belonging to the protection model of the application
It encloses.
Claims (10)
1. a kind of dot structure characterized by comprising
Substrate；
Passivation layer, setting is on the substrate；
The drain electrode of thin film transistor (TFT) is arranged between the substrate and the passivation layer；And
The side far from the substrate of the passivation layer is arranged in pixel electrode, and the pixel electrode is continuous uninterrupted
Plane-shape electrode；
Wherein, the pixel electrode includes the first recessed portion, multiple second recessed portions and multiple third recessed portions, and described first is recessed
Concave portion is in contact to be formed be electrically connected through the passivation layer and with the drain electrode of the thin film transistor (TFT), and the multiple second
Recessed portion and the multiple third depressed area in first recessed portion side or be located at first recessed portion
Opposite sides；First recessed portion has the first depth, and the multiple second recessed portion the second depth having the same is described
Multiple third recessed portion third depth having the same, first depth are greater than second depth and the third depth,
And second depth is different from the third depth.
2. dot structure as described in claim 1, which is characterized in that the pixel electrode includes main pixel electrode area and time picture
Plain electrode district, the multiple second depressed area is in the main pixel electrode area and has multiple and different differently-s oriented directivity, described
Multiple third depressed area are in the sub-pixel electrode district and have multiple and different differently-s oriented directivity, and second depth is less than
The third depth.
3. dot structure as claimed in claim 2, which is characterized in that the multiple second recessed portion tool takes there are four different
To direction, there are four different differently-s oriented directivity for the multiple third recessed portion tool, and the area in the main pixel electrode area is less than
The area of the sub-pixel electrode district.
4. a kind of display panel characterized by comprising
The first substrate and the second substrate being oppositely arranged；
Display dielectric layer between the first substrate and the second substrate；
Wherein, the first substrate includes several dot structures, and each dot structure includes:
Substrate；
Passivation layer, setting is on the substrate；
The drain electrode of thin film transistor (TFT) is arranged between the substrate and the passivation layer；
The side far from the substrate of the passivation layer is arranged in pixel electrode, and the pixel electrode is continuous uninterrupted
Plane-shape electrode；
Wherein, the pixel electrode includes the first recessed portion, multiple second recessed portions and multiple third recessed portions, and described first is recessed
Concave portion is in contact to be formed be electrically connected through the passivation layer and with the drain electrode of the thin film transistor (TFT), and the multiple second
Recessed portion and the multiple third depressed area in first recessed portion side or be located at first recessed portion
Opposite sides；First recessed portion has the first depth, and the multiple second recessed portion the second depth having the same is described
Multiple third recessed portion third depth having the same, first depth are greater than second depth and the third depth,
And second depth is different from the third depth.
5. display panel as claimed in claim 4, which is characterized in that the pixel electrode includes main pixel electrode area and time picture
Plain electrode district, the multiple second depressed area is in the main pixel electrode area and has multiple and different differently-s oriented directivity, described
Multiple third depressed area are in the sub-pixel electrode district and have multiple and different differently-s oriented directivity, and second depth is less than
The third depth.
6. display panel as claimed in claim 5, which is characterized in that the multiple second recessed portion tool takes there are four different
To direction, there are four different differently-s oriented directivity for the multiple third recessed portion tool, and the area in the main pixel electrode area is less than
The area of the sub-pixel electrode district.
7. a kind of production method of dot structure characterized by comprising
Substrate is provided, wherein being sequentially formed with the drain electrode and layer of passivation material of thin film transistor (TFT) in the substrate；
Photoetching process is carried out using multistage tune mask plate and obtains passivation layer to pattern the layer of passivation material, wherein described multistage
Adjusting mask plate includes first exposure area with different transparencies, multiple second exposure areas and multiple third exposure areas,
Correspondingly the passivation layer formation has the via hole of corresponding first exposure area, corresponds to the more of the multiple second exposure area
Multiple second grooves of a first groove and corresponding the multiple third exposure area；And
Continuous continual plane-shape electrode is formed on the passivation layer and is used as pixel electrode, wherein the pixel electrode includes the
One recessed portion, multiple second recessed portions and multiple third recessed portions, first depressed area in the via hole with it is described thin
The drain electrode of film transistor is in contact to form electrical connection, and the multiple second recessed portion is located at the multiple first ditch
In slot, the multiple third recessed portion is located in the multiple second groove, and first recessed portion has the first depth,
The multiple second recessed portion the second depth having the same, the multiple third recessed portion third depth having the same, institute
The first depth is stated greater than second depth and the third depth, and second depth is different from the third depth.
8. the production method of dot structure as claimed in claim 7, which is characterized in that the pixel electrode includes main pixel electricity
Polar region and sub-pixel electrode district, the multiple second depressed area is in the main pixel electrode area and has multiple and different orientations
Direction, the multiple third depressed area is in the sub-pixel electrode district and has multiple and different differently-s oriented directivity, and described the
Two depth are less than the third depth.
9. the production method of dot structure as claimed in claim 8, which is characterized in that the multiple second recessed portion has four
A different differently- oriented directivity, different differently- oriented directivity that there are four the multiple third recessed portion tools, and the main pixel electrode area
Area be less than the sub-pixel electrode district area.
10. the production method of dot structure as claimed in claim 7, which is characterized in that first exposure area is complete exposes
Light region, the multiple second exposure area and the multiple third exposure area are the different half-exposure region of transparency, and
The multiple second exposure area and the multiple third exposure area are set up separately in the not ipsilateral of first exposure area.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910280423.6A CN109856879A (en) | 2019-04-09 | 2019-04-09 | Dot structure and preparation method thereof and display panel |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910280423.6A CN109856879A (en) | 2019-04-09 | 2019-04-09 | Dot structure and preparation method thereof and display panel |
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| CN109856879A true CN109856879A (en) | 2019-06-07 |
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| CN201910280423.6A Pending CN109856879A (en) | 2019-04-09 | 2019-04-09 | Dot structure and preparation method thereof and display panel |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022048003A1 (en) * | 2020-09-03 | 2022-03-10 | Tcl华星光电技术有限公司 | Display panel and display device |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1928644A (en) * | 2006-09-12 | 2007-03-14 | 广辉电子股份有限公司 | Liquid crystal display panel and array substrate for liquid crystal display |
| US20090128765A1 (en) * | 2007-11-16 | 2009-05-21 | Samsung Electronics Co., Ltd. | Display device |
| CN104503155A (en) * | 2014-11-17 | 2015-04-08 | 深圳市华星光电技术有限公司 | Liquid crystal display pixel structure and manufacturing method thereof |
| CN104777693A (en) * | 2015-04-28 | 2015-07-15 | 深圳市华星光电技术有限公司 | High-transparency PSVA (polymer-stabilized vertical alignment) type liquid crystal display panel and manufacturing method thereof |
| CN105045002A (en) * | 2015-09-09 | 2015-11-11 | 深圳市华星光电技术有限公司 | Psva type liquid crystal display panel and manufacturing method thereof |
| CN105068325A (en) * | 2015-08-31 | 2015-11-18 | 深圳市华星光电技术有限公司 | PSVA liquid crystal display panel |
| CN107085330A (en) * | 2017-06-23 | 2017-08-22 | 深圳市华星光电技术有限公司 | PSVA dot structures |
| CN107942589A (en) * | 2017-11-07 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | A kind of pixel unit, array base palte and display panel |
-
2019
- 2019-04-09 CN CN201910280423.6A patent/CN109856879A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1928644A (en) * | 2006-09-12 | 2007-03-14 | 广辉电子股份有限公司 | Liquid crystal display panel and array substrate for liquid crystal display |
| US20090128765A1 (en) * | 2007-11-16 | 2009-05-21 | Samsung Electronics Co., Ltd. | Display device |
| CN104503155A (en) * | 2014-11-17 | 2015-04-08 | 深圳市华星光电技术有限公司 | Liquid crystal display pixel structure and manufacturing method thereof |
| CN104777693A (en) * | 2015-04-28 | 2015-07-15 | 深圳市华星光电技术有限公司 | High-transparency PSVA (polymer-stabilized vertical alignment) type liquid crystal display panel and manufacturing method thereof |
| CN105068325A (en) * | 2015-08-31 | 2015-11-18 | 深圳市华星光电技术有限公司 | PSVA liquid crystal display panel |
| CN105045002A (en) * | 2015-09-09 | 2015-11-11 | 深圳市华星光电技术有限公司 | Psva type liquid crystal display panel and manufacturing method thereof |
| CN107085330A (en) * | 2017-06-23 | 2017-08-22 | 深圳市华星光电技术有限公司 | PSVA dot structures |
| CN107942589A (en) * | 2017-11-07 | 2018-04-20 | 深圳市华星光电半导体显示技术有限公司 | A kind of pixel unit, array base palte and display panel |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2022048003A1 (en) * | 2020-09-03 | 2022-03-10 | Tcl华星光电技术有限公司 | Display panel and display device |
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Application publication date: 20190607 |