CN109766226A - A kind of multilayer secondary design realizes the digital circuit of multi-mode redundant voting function - Google Patents
A kind of multilayer secondary design realizes the digital circuit of multi-mode redundant voting function Download PDFInfo
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- CN109766226A CN109766226A CN201811622650.4A CN201811622650A CN109766226A CN 109766226 A CN109766226 A CN 109766226A CN 201811622650 A CN201811622650 A CN 201811622650A CN 109766226 A CN109766226 A CN 109766226A
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Abstract
A kind of multilayer secondary design realizes the digital circuit of multi-mode redundant voting function, comprising: M functional module and voting circuit module, that is the first functional module, the second functional module ... and M functional module, the first functional module include N1 sub-function module, the second functional module include N2 sub-function module ... with M functional module include Nm sub-function module；Wherein, choose the first functional module, the second functional module ... and M functional module, or the one or more in N1 sub-function module, N2 sub-function module ... and Nm sub-function module is as reinforcement elements, each reinforcement elements are designed to that multi-mode redundant structure, multi-mode redundant structure include K-1 and phases identical as the reinforcement elements chosen and the redundancy unit connect；The output end of reinforcement elements and redundancy unit in multi-mode redundant structure is connected with the input terminal of voting circuit module, and voting circuit module is that decision logic circuit is fault-tolerant by voting output progress.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of safety circuit reinforced using multi-mode redundant,
The digital circuit of multi-mode redundant voting function is realized in particular it relates to a kind of multilayer secondary design.
Background technique
Scene based on static random access memory (Static Random Access Memory, abbreviation SRAM) can
It is special for the external environment of charged particle to program gate array (Field Programmable Gate Array, abbreviation FPGA)
Sensitivity, the especially appearance of high-density integration chip in recent years, circuit capacity increases, operation voltage reduces so that they are in outside
Reliability under environment reduces.Wherein, soft fault is main failure, it is a kind of caused by particle and PN junction interaction
Transient fault, soft fault have the influence of especially severe to the circuit realized on the FPGA based on SRAM.Due to triplication redundancy
Technically simple property and high reliability, it is the sporadic fault being directed on FPGA being widely used
Fault-toleranr technique.
Triple-modular redundancy system abbreviation TMR (Triple Modular Redundancy), is a kind of most common fault-tolerant design
Technology.Its basic thought is to realize identical function with three identical modules, finally passes through a majority voting in delivery outlet
Device selects data to realize fault-tolerant purpose.
Fig. 1 and Fig. 2 are please referred to, Fig. 1 is triplication redundancy trigger schematic diagram in the prior art；Fig. 2 is triplication redundancy in Fig. 1
The physical circuit schematic diagram of trigger.As long as can be covered as shown, not occurring two identical mistakes in three modules simultaneously
Cover the mistake of malfunctioning module, guarantee system correctly exports.Since three modules are independent of each other, and different module point
Cloth is in the different geometric positions of chip, and reality is by the accidental influence of external environment, while the probability to malfunction is lower, and two modules are simultaneously
Mistake occur is minimum probability event, therefore can greatly improve the credibility of system, so triplication redundancy structure is present compares
The fault-tolerant method of one kind that is effective and being widely used.
Triplication redundancy (TMR) technology is a kind of sequence circuit reinforcement technique, there is spatial redundancy and time again in structure
Point of redundancy, time redundancy are exactly the presence of certain delay between 3 tunnel clock signals, and length of delay should be greater than the maximum of sporadic fault
Pulsewidth.The effect of time redundancy is the input burr for sequence circuit, and at most only clock can sample error value all the way, because
This can be effectively prevented mistake brought by combinational logic burr.
Although triplication redundancy technology can greatly improve the reliability of system, cost is also huge.By TMR's
Basic structure is not difficult to find out two major defects using TMR technology:
Firstly, since having carried out hardware redundancy, to cause chip area to increase to original more than 3 times；
Secondly as delay between three tunnel clock signals and joined voting circuit in output end, in critical path
Additional delay is introduced, the speed of service of circuit is caused to decline.
Specifically, then referring to Fig. 2, if doing three times redundancy in storage unit, all resources all can * 3, cost is very
Greatly；Three times redundancy is done in internal submodule level, then workload is difficult to control；If doing three times redundancy in each functional module,
So the most flexibly, but the most complicated, easy error is designed.
Summary of the invention
The present invention provides a kind of multilayer secondary design realization multi-mode redundant throwing to overcome the problems of the above-mentioned prior art
The digital circuit of ticket function, the digital circuit include:
M functional module, i.e. the first functional module, the second functional module ... and M functional module, first function
Module include N1 sub-function module, second functional module include N2 sub-function module ... and M functional module includes
Nm sub-function module；Wherein, choose first functional module, the second functional module ... and M functional module or described
One or more in N1 sub-function module, N2 sub-function module ... and Nm sub-function module, will as reinforcement elements
Each reinforcement elements are designed to multi-mode redundant structure, and the multi-mode redundant structure includes K-1 and the reinforcing chosen
Unit is identical and mutually and the redundancy unit that connects；
The digital circuit further includes a voting circuit module, reinforcement elements and redundancy in the multi-mode redundant structure
The output end of unit is connected with the input terminal of the voting circuit module, and the voting circuit module is sentenced for what the minority is subordinate to the majority
Certainly logic circuit has ballot arbitration function, is carried out by majority voting output fault-tolerant；Wherein, the K be more than or equal to
3 odd number.
Further, the functional module or sub-function module are with high timing performance unit, have highly reliable requirement
Functional unit or storage unit.
3. multilayer secondary design according to claim 1 realizes the digital circuit of multi-mode redundant voting function, further
Ground, the multi-mode redundant structure are triplication redundancy structure or five mould redundancy structures.
Further, the multi-mode redundant structure is triplication redundancy structure, and the voting circuit module includes Three-State
Device and a small number of voting machines, the triplication redundancy structure export accordingly by after the three state buffer and minority voting machines by three
The output of a output pin, last line or becomes a signal；Wherein, a small number of voting machines are responsible for judging the triplication redundancy knot
Whether the signal of structure is a small number of values, is worth if it is minority, then makes the three state buffer output high resistant；If it is not, then making institute
Three state buffer signal is stated normally to export.
Further, the multi-mode redundant structure is triplication redundancy structure, and the voting circuit module includes 3 D types
3, trigger, main latch and multiple selector；The triplication redundancy structure generate 3 clock signals clk1, clk2 and
Clk3 controls 3 D type flip-flops and 3 main latch respectively, and exports fault-tolerant knot by multiple selector selection
Fruit.
Further, the voting circuit module is using the device formed to the insensitive material of external environment.
Further, the reinforcement elements are functional module or sub- function of the configuration in critical path in the digital circuit
Energy module, the multi-mode redundant structure that the reinforcement elements are formed includes debouncing circuit module.
Further, the reinforcement elements are function of the configuration in non-critical path and period update in the digital circuit
Energy module or sub-function module, the multi-mode redundant structure that the reinforcement elements are formed includes driving reinforcing module, to improve driving
Ability.
Compared with prior art, implement safety circuit of the invention with higher reliability, and the mode reinforced and
Method can have very much, such as functional module three times redundancy: internal submodule three times redundancy, only to storage unit three times redundancy,
Exclusive segment sensitivity library unit is comprehensive, adds Key dithering module, and building reinforcing module and replacing ... can really realize and add by different level
Gu realizing the optimal compromise of area power consumption and highly reliable ability.
Detailed description of the invention
Its example embodiment is described in detail by referring to accompanying drawing, above and other feature of the invention and advantage will become
It is more obvious.
Fig. 1 is triplication redundancy trigger schematic diagram in the prior art
Fig. 2 is the physical circuit schematic diagram of triplication redundancy trigger in Fig. 1
Fig. 3 show multilayer secondary design of the present invention and realizes that one functional module of digital circuit of multi-mode redundant voting function uses
Five select the schematic diagram of three time-sharing work ballot circuit
Fig. 4 show shown in Fig. 3 five and three time-sharing work is selected to vote simulation waveform schematic diagram corresponding to circuit
Fig. 5 show the hardware description language that multilayer secondary design of the present invention realizes the digital circuit of multi-mode redundant voting function
HDL design logic functional schematic
Fig. 6 show multilayer secondary design of the present invention and realizes that the logic function of the digital circuit of multi-mode redundant voting function is corresponding
Hardware realization (submodule level) schematic diagram
Fig. 7 is making on the basis of submodule for the digital circuit that multilayer secondary design of the present invention realizes multi-mode redundant voting function
The schematic diagram of highly reliable function (functional module grade) is realized plus ballot with triplication redundancy
Specific embodiment
Example embodiment is described more fully with reference to the drawings.However, example embodiment can be with a variety of shapes
Formula is implemented, and is not understood as limited to example set forth herein；On the contrary, thesing embodiments are provided so that the disclosure will more
Fully and completely, and by the design of example embodiment comprehensively it is communicated to those skilled in the art.Described feature, knot
Structure or characteristic can be incorporated in any suitable manner in one or more embodiments.To make the purpose of the present invention, technology
Scheme and advantage are clearer, and combining Fig. 3 to Fig. 7 further below, the present invention is described in detail.
It should be noted that the principle of the present invention is, the present invention selects the benefit of multi-mode redundant structure, for functional module
And its submodule requires the difference of performance, for example, high timing performance module use, which is built, reinforces module replacement, highly reliable requirement
Functional module local use three times redundancy or five times of redundancy structures；Local use three times redundancy or five times are also considered storage unit
Redundancy structure；It can really realize and reinforce by different level in this way, realize the optimal compromise of area power consumption and highly reliable ability.
In an embodiment of the present invention, which realizes the digital circuit of multi-mode redundant voting function comprising:
M functional module, i.e. the first functional module, the second functional module ... and M functional module, first functional module include
N1 sub-function module, second functional module include N2 sub-function module ... and M functional module includes Nm sub- function
It can module；Wherein, choose first functional module, the second functional module ... and M functional module or the N1 sub- function
One or more in energy module, N2 sub-function module ... and Nm sub-function module, will be each described as reinforcement elements
Reinforcement elements are designed to that multi-mode redundant structure, the multi-mode redundant structure include K-1 identical as the reinforcement elements chosen
And mutually and the redundancy unit that connects；The digital circuit further includes a voting circuit module, adding in the multi-mode redundant structure
Gu the output end of unit and redundancy unit is connected with the input terminal of the voting circuit module, the voting circuit module is minority
Most decision logic circuits is obeyed, there is ballot arbitration function, is carried out by majority voting output fault-tolerant；Wherein, described
K be odd number more than or equal to 3.
It is emphasized that the present invention does not use this circuit module to carry out multi-mode redundant structure, it is based on functional module/son
Many Gradation processings such as module/cell library only the module to part or submodule can carry out Design of Reinforcement, can be largely
The chip area of ground saving chip.
Fig. 6 and Fig. 7 are please referred to, Fig. 6 show the number electricity that multilayer secondary design of the present invention realizes multi-mode redundant voting function
The logic function on road corresponds to hardware realization (submodule level) schematic diagram, and Fig. 7 is that multilayer secondary design of the present invention realizes multi-mode redundant
The digital circuit of voting function realizes highly reliable function (functional module plus ballot using triplication redundancy on the basis of submodule
Grade) schematic diagram.
Referring to Fig. 3, Fig. 3 show one function of digital circuit that multilayer secondary design of the present invention realizes multi-mode redundant voting function
Energy module selects the schematic diagram of three time-sharing work ballot circuits using five.Wherein, functional module or sub-function module can be tool
There is high timing performance unit, require functional unit or storage unit etc. with highly reliable.As shown, five triggers are pair
Some trigger to need reinforcement carries out five times of redundancy structures of part.In this embodiment, voting circuit module also includes 5
3, five main latch of D type flip-flop and multiple selector.Five mould redundancy structures generation, 5 clock signal clk1, clk2,
Clk3, clk4 and clk5 control 5 D type flip-flops and 5 main latch respectively, and defeated by multiple selector selection
Fault-tolerant result out.That is, reinforcing using five mould redundancy of local use, 5 identical modules are generated to module is reinforced, then lead to
Majority voting output is crossed, even if there is module circuit that breaks down still to can work normally.
Specifically, to further avoid not sharing due to clock generating module, the area of entire chip increases very much, also
The clock generating module for generating five mould redundancy flip-flop element clock ports can be put into inside TMR_DFF, such five mould is superfluous
Remaining trigger clock port just only has 1, so that it may avoid the sporadic fault generated in combinational circuit.TMR-1 structure is more general
Logical triplication redundancy reduces the area of a delay unit δ and 4 latch, to reduce area overhead.
Certainly, above-mentioned technical proposal also needs to avoid the critical path delay in design between multiple redundancy triggers too short
(such as shift register), in operation it is possible that the problem of circuit output indefinite state and circuit state mistake.
In another embodiment of the present invention, which is triplication redundancy structure, voting circuit module packet
Three state buffer and a small number of voting machines are included, triplication redundancy structure is exported accordingly through the three state buffer and a small number of voting machines
Afterwards by three output pins outputs, last line or as a signal；Wherein, a small number of voting machines are responsible for judging the triplication redundancy
Whether the signal of structure is a small number of values, is worth if it is minority, then three state buffer is made to export high resistant；If it is not, then making tri-state
Buffer signal normally exports.
Three time-sharing work simulation waveform corresponding to circuit of voting is selected to show referring to Fig. 4, Fig. 4 show shown in Fig. 3 five
It is intended to.As shown, the present invention on the basis of five mould Redundancy Designs, increases ballot arbitration function, then defeated by majority voting
Out, even if there is a module to break down, circuit still available correct result.As seen from Figure 4, for five mould redundant circuits
For, it is only necessary to obtain the result of 3 units in (shown in dotted line), so that it may which ballot judgement obtains highly reliable output.
Referring to Fig. 5, Fig. 5 show the hard of the digital circuit of multilayer secondary design realization multi-mode redundant voting function of the present invention
Part description language HDL design logic functional schematic.
Those skilled in the art after considering the specification and implementing the invention disclosed here, will readily occur to its of the disclosure
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the disclosure, these modifications, purposes or
Person's adaptive change follows the general principles of this disclosure and including the undocumented common knowledge in the art of the disclosure
Or conventional techniques.The description and examples are only to be considered as illustrative, and the true scope and spirit of the disclosure are by appended
Claim is pointed out.
Claims (8)
1. the digital circuit that a kind of multilayer secondary design realizes multi-mode redundant voting function characterized by comprising M function mould
Block, i.e. the first functional module, the second functional module ... and M functional module, first functional module includes N1 subfunction
Module, second functional module include N2 sub-function module ... and M functional module includes Nm sub-function module；Its
In, choose first functional module, the second functional module ... and M functional module or the N1 sub-function module, N2
One or more in a sub-function module ... and Nm sub-function module sets each reinforcement elements as reinforcement elements
Multi-mode redundant structure is counted into, the multi-mode redundant structure includes K-1 and phases identical as the reinforcement elements chosen and connects
Redundancy unit；
The digital circuit further includes a voting circuit module, reinforcement elements and redundancy unit in the multi-mode redundant structure
Output end be connected with the input terminal of the voting circuit module, the voting circuit module is that the judgement that the minority is subordinate to the majority is patrolled
Circuit is collected, there is ballot arbitration function, is carried out by majority voting output fault-tolerant；Wherein, the K is more than or equal to 3
Odd number.
2. the digital circuit that multilayer secondary design according to claim 1 realizes multi-mode redundant voting function, which is characterized in that
The functional module or sub-function module are to require functional unit or storage single with high timing performance unit, with highly reliable
Member.
3. the digital circuit that multilayer secondary design according to claim 1 realizes multi-mode redundant voting function, which is characterized in that
The multi-mode redundant structure is triplication redundancy structure or five mould redundancy structures.
4. the digital circuit that multilayer secondary design according to claim 3 realizes multi-mode redundant voting function, which is characterized in that
The multi-mode redundant structure is triplication redundancy structure, and the voting circuit module includes three state buffer and a small number of voting machines, institute
Triplication redundancy structure is stated to export accordingly by being exported after the three state buffer and a small number of voting machines by three output pins, most
Afterwards line or become a signal；Wherein, a small number of voting machines are responsible for judging whether the signal of the triplication redundancy structure is few
Numerical value is worth if it is minority, then makes the three state buffer output high resistant；If it is not, then making the three state buffer signal
Normal output.
5. the digital circuit that multilayer secondary design according to claim 3 realizes multi-mode redundant voting function, which is characterized in that
The multi-mode redundant structure is triplication redundancy structure, and the voting circuit module includes 3 D type flip-flops 3, main latch
And multiple selector；The triplication redundancy structure generates 3 clock signals clk1, clk2 and clk3, controls 3 D respectively
Type flip-flop and 3 main latch, and fault-tolerant result is exported by multiple selector selection.
6. the digital circuit that multilayer secondary design according to claim 1 realizes multi-mode redundant voting function, which is characterized in that
The voting circuit module is using the device formed to the insensitive material of external environment.
7. the digital circuit that multilayer secondary design according to claim 1 realizes multi-mode redundant voting function, which is characterized in that
The reinforcement elements are functional module or sub-function module of the configuration in critical path in the digital circuit, and the reinforcing is single
The multi-mode redundant structure that member is formed includes debouncing circuit module.
8. the digital circuit that multilayer secondary design according to claim 7 realizes multi-mode redundant voting function, which is characterized in that
The reinforcement elements are functional module or subfunction mould of the configuration in non-critical path and period update in the digital circuit
Block, the multi-mode redundant structure that the reinforcement elements are formed includes driving reinforcing module, to improve driving capability.
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| CN111525919A (en) * | 2020-05-27 | 2020-08-11 | 上海微阱电子科技有限公司 | Redundancy structure with feedback correction |
| CN112214350A (en) * | 2020-09-02 | 2021-01-12 | 中国船舶重工集团公司第七0九研究所 | Software voting method for distributed multi-mode redundancy fault-tolerant system |
| CN112445751A (en) * | 2020-12-01 | 2021-03-05 | 航天新长征大道科技有限公司 | Computer host interface board suitable for multi-mode redundant system |
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Application publication date: 20190517 |