CN109741714B - Source electrode driving circuit - Google Patents
Source electrode driving circuit Download PDFInfo
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- CN109741714B CN109741714B CN201910116062.1A CN201910116062A CN109741714B CN 109741714 B CN109741714 B CN 109741714B CN 201910116062 A CN201910116062 A CN 201910116062A CN 109741714 B CN109741714 B CN 109741714B
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Abstract
The present disclosure provides a source driving circuit. The source driving circuit comprises a plurality of source driving modules. Each source electrode driving module comprises a source electrode driving unit and a plurality of one-to-many selection units. Each of the one-to-many selection units includes a plurality of data lines. The source driving unit comprises a plurality of data signal lines and a plurality of channel selection buses. Each data signal line is correspondingly connected to one of the one-to-many selection units. Each channel selection bus is correspondingly connected to one-to-many selection unit.
Description
[ technical field ] A method for producing a semiconductor device
The present disclosure relates to display technologies, and more particularly, to a source driving circuit.
[ background of the invention ]
In a conventional Liquid Crystal Display (LCD) driving system, an output channel of a Source Driver (Source Driver) and a Data Line (Data Line) of a display panel are in one-to-one correspondence. As the resolution of the LCD is larger and larger, the number of Data-lines on the panel is also larger and the number of channels of the source driving unit is also larger. With the conventional scheme, the larger the number of source driving units. And the larger the number of channels of the source driving unit, the smaller the pitch (pitch) of the bonding pad (pad) for fixing the IC to the flexible circuit board (Chip On FPC, COF), which is a serious test for the bonding process.
Therefore, it is desirable to provide a source driving circuit to solve the problems of the prior art.
[ summary of the invention ]
In order to solve the above-mentioned problems, an objective of the present disclosure is to provide a source driving circuit, which can reduce the number of source driving units and effectively reduce the difficulty of COF bonding.
To achieve the above objective, the present disclosure provides a source driving circuit including a plurality of source driving modules. Each source electrode driving module comprises a source electrode driving unit and a plurality of one-to-many selection units. Each of the one-to-many selection units includes a plurality of data lines. The source driving unit comprises a plurality of data signal lines and a plurality of channel selection buses. Each data signal line is correspondingly connected to one of the one-to-many selection units. Each channel selection bus is correspondingly connected to one-to-many selection unit.
In one embodiment of the present disclosure, the one-to-many selection unit is a demultiplexer (demultiplexer).
In one embodiment of the present disclosure, the source driving unit further includes a plurality of multiplexers (multiplexers). Wherein each of the multiplexers corresponds to one of the data signal lines.
In one embodiment of the present disclosure, the one-to-many selection unit includes a plurality of transistor switches. The channel selection bus includes a plurality of channel selection lines. Each channel selection line is correspondingly connected and used for controlling one transistor switch.
The present disclosure also provides a source driving circuit including a plurality of source driving modules, a timing control unit, a plurality of low voltage channel selection buses, and a plurality of high voltage channel selection buses. Each source electrode driving module comprises a source electrode driving unit, a plurality of one-to-many selection units and a boosting unit. The one-to-many selection unit includes a plurality of data lines. The source driving unit includes a plurality of data signal lines. Each data signal line is correspondingly connected to one of the one-to-many selection units. Each low-voltage channel selection bus is correspondingly connected to one boosting unit. Each high-voltage channel selection bus is correspondingly connected to one-to-many selection unit. The timing control unit provides selection signals to the corresponding boosting units through the plurality of low-voltage channel selection buses. The boosting unit is used for boosting the selection signals and then correspondingly connecting the selection signals to the one-to-many selection units through the high-voltage channel selection buses.
In one embodiment of the present disclosure, the one-to-many selection unit is a demultiplexer.
In one embodiment of the present disclosure, the source driving unit further includes a plurality of multiplexers. Wherein each of the multiplexers corresponds to one of the data signal lines.
In one embodiment of the present disclosure, the timing control unit is electrically connected to the plurality of source driving modules for providing a timing signal.
In one embodiment of the present disclosure, the one-to-many selection unit includes a plurality of transistor switches. The high voltage channel selection bus includes a plurality of high voltage channel selection lines. Each high-voltage channel selection line is correspondingly connected with one transistor switch and used for controlling the transistor switch.
In one embodiment of the present disclosure, the transistor switch is an N-channel field effect transistor.
In the source driving circuit of the embodiment of the disclosure, each of the source driving modules includes one source driving unit and a plurality of one-to-many selection units. The source driving unit comprises a plurality of data signal lines and a plurality of channel selection buses. Each data signal line is correspondingly connected to one of the one-to-many selection units. The output time of the source driving unit is divided into a plurality of parts, and the parts are output to the data line through the one-to-many selection unit and a specific sequence, so that the time-sharing multiplexing of the output of the source driving unit is realized. Therefore, the embodiment of the disclosure can reduce the number of source driving units, and effectively reduce the difficulty of COF binding.
In order to make the aforementioned and other aspects of the present disclosure more comprehensible, preferred embodiments accompanied with figures are described in detail below:
[ description of the drawings ]
FIG. 1 is a schematic diagram of a source driver circuit according to an embodiment of the disclosure;
FIG. 2 is a schematic diagram of a source driver circuit according to another embodiment of the disclosure;
FIG. 3 is a schematic diagram illustrating a source driving unit according to an embodiment of the disclosure; and
FIG. 4 is a diagram illustrating a structure of a one-to-many selection unit according to an embodiment of the disclosure.
[ detailed description ] embodiments
In order to make the aforementioned and other objects, features and advantages of the present disclosure comprehensible, preferred embodiments accompanied with figures are described in detail below. Furthermore, directional phrases used in this disclosure, such as, for example, upper, lower, top, bottom, front, rear, left, right, inner, outer, lateral, peripheral, central, horizontal, lateral, vertical, longitudinal, axial, radial, uppermost or lowermost, etc., refer only to the orientation of the attached drawings. Accordingly, the directional terms used are used for the purpose of illustration and understanding of the present disclosure, and are not used to limit the present disclosure.
In the drawings, elements having similar structures are denoted by the same reference numerals.
Referring to fig. 1 and 3, the present disclosure provides a source driving circuit 1000 including a plurality of source driving modules 100. Each of the source driving modules 100 includes a source driving unit 10 and a plurality of one-to-many selection units 20. Each of the one-to-many selection units 20 includes a plurality of data lines 30. The source driving unit 10 includes a plurality of data signal lines 11 and a plurality of channel selection buses 12. Each of the data signal lines 11 is correspondingly connected to one of the one-to-many selection units 20. Each of the channel selection buses 12 is connected to one of the one-to-many selection units 20.
Specifically, the source driving unit 10 transmits a data line signal to the one-to-many selection unit 20 through the data signal line 11, and controls the one-to-many selection unit 20 to select the corresponding data line 30 for transmission through the channel selection bus 12.
Specifically, the one-to-many selection unit 20 and the data lines 30 may be disposed on a substrate 60. The one-to-many selection unit 20 may be a Gate On Array (GOA) line scan driving circuit.
In one embodiment of the present disclosure, the one-to-many selection unit 20 is a demultiplexer.
Referring to fig. 3, in an embodiment of the present disclosure, the source driving unit 10 further includes a plurality of multiplexers 13. Wherein each of the multiplexers 13 corresponds to one of the data signal lines 11.
Specifically, the source driving unit 10 may be formed by a conventional source driving unit 10 ' and a plurality of multiplexers 13, so as to reduce the number of data signal lines 11 ' of the conventional source driving unit 10 '.
Specifically, the channel selection bus 12 includes a plurality of channel selection lines 121. Wherein 1 of the channel selection lines 121 correspondingly controls 2 channels of the multiplexer 13, 2 of the channel selection lines 121 correspondingly controls 4 channels of the multiplexer 13, and n of the channel selection lines 121 correspondingly controls n channels of the multiplexer 132A channel. Therefore, the multiplexer 13 can be controlled with a smaller number of the channel select lines 121.
Referring to FIG. 4, in one embodiment of the present disclosure, the one-to-many selection unit 20 includes a plurality of transistor switches Q1-Qn. The channel selection bus 12 includes a plurality of channel selection lines 121. Each of the channel selection lines 121 is correspondingly connected to control one of the transistor switches.
Referring to fig. 2, the present disclosure further provides a source driving circuit 1000' including a plurality of source driving modules, a timing control unit 40, a plurality of low voltage channel selection buses 41 and a plurality of high voltage channel selection buses 51. Each of the source driving modules includes a source driving unit 10, a plurality of one-to-many selecting units 20, and a boosting unit 50. The one-to-many selection unit 20 includes a plurality of data lines 30. The source driving unit 10 includes a plurality of data signal lines 11. Each of the data signal lines 11 is correspondingly connected to one of the one-to-many selection units 20. Each of the low-voltage channel selection buses 41 is correspondingly connected to one of the boosting units 50. Each of the high-voltage channel selection buses 51 is connected to one of the one-to-many selection units 20. The timing control unit 40 provides a selection signal to the corresponding boosting unit 50 through the low voltage channel selection buses 41. The boosting unit 50 is used for boosting the selection signal and then correspondingly connecting to the one-to-many selection units 20 through the high-voltage channel selection buses 51.
Specifically, the source driving unit 10 transmits a data line signal to the one-to-many selecting unit 20 through the data line 11, and the timing control unit 40 provides a selecting signal to the corresponding boosting unit 50 through the low voltage channel selecting buses 41. The boosting unit 50 is configured to boost the selection signal and then correspondingly connect to the one-to-many selection unit 20 through the plurality of high-voltage channel selection buses 51 to control the one-to-many selection unit 20 to select the corresponding data line 30 for transmission.
Specifically, the one-to-many selection unit 20 and the data lines 30 may be disposed on a substrate 60. The one-to-many selection unit 20 may be a Gate On Array (GOA) line scan driving circuit.
In one embodiment of the present disclosure, the one-to-many selection unit 20 is a demultiplexer.
Referring to fig. 3, in an embodiment of the present disclosure, the source driving unit 10 further includes a plurality of multiplexers 13. Wherein each of the multiplexers 13 corresponds to one of the data signal lines 11.
Specifically, the source driving unit 10 may be formed by a conventional source driving unit 10 ' and a plurality of multiplexers 13, so as to reduce the number of data signal lines 11 ' of the conventional source driving unit 10 '.
Specifically, the channel selection bus 12 includes a plurality of channel selection lines 121. Wherein 1 of the channel selection lines 121 correspondingly controls 2 channels of the multiplexer 13, 2 of the channel selection lines 121 correspondingly controls 4 channels of the multiplexer 13, and n of the channel selection lines 121 correspondingly controls n channels of the multiplexer 132A channel. Therefore, the multiplexer 13 can be controlled with a smaller number of the channel select lines 121.
Referring to fig. 2, in an embodiment of the present disclosure, the timing control unit 40 is electrically connected to the source driving modules 10 for providing timing signals.
Referring to fig. 4, in one embodiment of the present disclosure, the one-to-many selection unit 20 includes a plurality of transistor switches Q1-Qn. The high voltage channel selection bus 51 includes a plurality of high voltage channel selection lines 511. Each of the high voltage channel selection lines 511 is correspondingly connected to one of the transistor switches and is used for controlling the transistor switch.
In one embodiment of the present disclosure, the transistor switches Q1-Qn are N-channel field effect transistors.
In the source driving circuit of the embodiment of the disclosure, each of the source driving modules includes one source driving unit and a plurality of one-to-many selection units. The source driving unit comprises a plurality of data signal lines and a plurality of channel selection buses. Each data signal line is correspondingly connected to one of the one-to-many selection units. The output time of the source driving unit is divided into a plurality of parts, and the parts are output to the data line through the one-to-many selection unit and a specific sequence, so that the time-sharing multiplexing of the output of the source driving unit is realized. Therefore, the embodiment of the disclosure can reduce the number of source driving units, and effectively reduce the difficulty of COF binding.
Although the disclosure has been shown and described with respect to one or more implementations, equivalent alterations and modifications will occur to others skilled in the art based upon a reading and understanding of this specification and the annexed drawings. The present disclosure includes all such modifications and alterations, and is limited only by the scope of the appended claims. In particular regard to the various functions performed by the above described components, the terms used to describe such components are intended to correspond, unless otherwise indicated, to any component which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the specification. In addition, while a particular feature of the specification may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for a given or particular application. Furthermore, to the extent that the terms "includes," has, "" contains, "or variants thereof are used in either the detailed description or the claims, such terms are intended to be inclusive in a manner similar to the term" comprising.
The foregoing is merely a preferred embodiment of the present disclosure, and it should be noted that modifications and refinements may be made by those skilled in the art without departing from the principle of the present disclosure, and these modifications and refinements should also be construed as the protection scope of the present disclosure.
Claims (8)
1. A source electrode driving circuit is characterized by comprising a plurality of source electrode driving modules, a plurality of driving units and a plurality of one-to-many selection units, wherein each source electrode driving module comprises a source electrode driving unit and a plurality of one-to-many selection units; each of the one-to-many selection units includes a plurality of data lines; the source driving unit comprises a plurality of data signal lines and a plurality of channel selection buses, wherein each data signal line is correspondingly connected to one of the one-to-many selection units and each channel selection busThe channel selection buses are correspondingly connected to one pair of the multiple selection units, each channel selection bus comprises n channel selection lines, the source electrode driving unit further comprises a plurality of multiplexers, each multiplexer corresponds to one data signal line, and each multiplexer comprises n2And n is a positive integer.
2. The source driver circuit of claim 1, wherein the one-to-many selection unit is a demultiplexer.
3. The source driver circuit of claim 1, wherein the one-to-many selection unit comprises a plurality of transistor switches, wherein each of the channel selection lines is connected to control one of the transistor switches.
4. A source electrode driving circuit is characterized by comprising a plurality of source electrode driving modules, a time sequence control unit, a plurality of low-voltage channel selection buses and a plurality of high-voltage channel selection buses, wherein each source electrode driving module comprises a source electrode driving unit, a plurality of one-to-many selection units and a boosting unit; the one-to-many selection unit comprises a plurality of data lines; the source electrode driving unit comprises a plurality of data signal lines, and each data signal line is correspondingly connected to one of the one-to-many selection units; each low-voltage channel selection bus is correspondingly connected to one boosting unit, each high-voltage channel selection bus is correspondingly connected to one multi-pair selection unit, the timing control unit provides selection signals to the corresponding boosting units through the low-voltage channel selection buses, the boosting units are used for boosting the selection signals and then are correspondingly connected to the multi-pair selection units through the high-voltage channel selection buses, each high-voltage channel selection bus comprises n high-voltage channel selection lines, the source electrode driving unit further comprises a plurality of multiplexers, each multiplexer corresponds to one data signal line, and each multiplexer comprisesContaining n2And n is a positive integer.
5. The source driver circuit of claim 4, wherein the one-to-many selection unit is a demultiplexer.
6. The source driving circuit of claim 4, wherein the timing control unit is electrically connected to the plurality of source driving modules for providing timing signals.
7. The source driver circuit as claimed in claim 4, wherein the one-to-many selection unit comprises a plurality of transistor switches, wherein each of the high voltage channel selection lines is connected to and controls one of the transistor switches.
8. The source driver circuit of claim 7, wherein the transistor switch is an N-channel field effect transistor.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910116062.1A CN109741714B (en) | 2019-02-15 | 2019-02-15 | Source electrode driving circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910116062.1A CN109741714B (en) | 2019-02-15 | 2019-02-15 | Source electrode driving circuit |
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| CN109741714A CN109741714A (en) | 2019-05-10 |
| CN109741714B true CN109741714B (en) | 2020-11-10 |
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| JP3982249B2 (en) * | 2001-12-11 | 2007-09-26 | 株式会社日立製作所 | Display device |
| CN1763824A (en) * | 2004-10-20 | 2006-04-26 | 统宝光电股份有限公司 | Display panel and method for driving an LCD panel |
| KR101985247B1 (en) * | 2011-12-02 | 2019-06-04 | 엘지디스플레이 주식회사 | LCD and driving method thereof |
| JP6805604B2 (en) * | 2016-07-26 | 2020-12-23 | セイコーエプソン株式会社 | Electro-optics and electronic equipment |
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Address after: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee after: TCL China Star Optoelectronics Technology Co.,Ltd. Address before: 9-2 Tangming Avenue, Guangming New District, Shenzhen City, Guangdong Province Patentee before: Shenzhen China Star Optoelectronics Technology Co.,Ltd. |
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