CN1097337C - Gate control circuit for voltage drive switching element - Google Patents
Gate control circuit for voltage drive switching element Download PDFInfo
- Publication number
- CN1097337C CN1097337C CN99104531A CN99104531A CN1097337C CN 1097337 C CN1097337 C CN 1097337C CN 99104531 A CN99104531 A CN 99104531A CN 99104531 A CN99104531 A CN 99104531A CN 1097337 C CN1097337 C CN 1097337C
- Authority
- CN
- China
- Prior art keywords
- switch
- semiconductor device
- insulated gate
- gate semiconductor
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/0406—Modifications for accelerating switching in composite switches
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/38—Means for preventing simultaneous conduction of switches
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/04—Modifications for accelerating switching
- H03K17/041—Modifications for accelerating switching without feedback from the output circuit to the control circuit
- H03K17/0412—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit
- H03K17/04123—Modifications for accelerating switching without feedback from the output circuit to the control circuit by measures taken in the control circuit in field-effect transistor switches
Landscapes
- Power Conversion In General (AREA)
- Dc-Dc Converters (AREA)
- Electronic Switches (AREA)
Abstract
A gate control circuit for turning on and off an insulated gate semiconductor device includes a first DC power source coupled to the gate terminal via a first switch; a parallel circuit of a diode and a capacitor coupled in series to the second switch; and a turn off assist circuit configured to produce a negative charge on the capacitor to assist in turning off the insulated gate semiconductor device. In a power converter circuit having a plurality of insulated gate semiconductor devices, equalization of delay times for turning off the insulated gate semiconductor devices is achieved by controlling a charged stored in the capacitor of each gate control circuit based on detected collector-emitter voltages or detected emitter currents.
Description
The application requires the priority of Japanese patent application No.JP-1085435, and this Japanese patent application was submitted on March 31st, 1998, and its full content is here with reference to introducing.
The present invention relates to a kind of grid control circuit, be used to switch on and off a voltage-driven switch element, the insulated gate semiconductor device of mos gate structure for example is such as MOS-FET, IGBT (igbt) and IEGT (IEGT).
Insulated gate semiconductor device is as the switch element of electric power converter, and electric power converter for example has the converter of driven induction motor, frequency modulator, and the uninterrupted power supply of under the power failure situation ancillary equipment being powered.
Especially, IGBT is widely used in the industrial equipment owing to the ability of its voltage starting characteristic and the relative high electric current of its switching.
Fig. 1 represents to be used for the conventional grid control circuit of IGBT1.In Fig. 1, IGBT1 is an insulated gate semiconductor device, and it has a collector terminal C, an emitter terminal E and a gate terminal G.A grid control circuit 100 of representing with chain-dotted line is connected between end G and the E.
IGBT1 connects by apply a positive voltage between end G and E, and disconnects by apply a negative voltage between end G and E.
Fig. 2 is a time diagram, when being illustrated in the IGBT1 disconnection, and between the voltage Vce and electric current I c between the collector terminal C of IGBT1 and the emitter terminal E, and voltage Vge between the gate terminal G of IGBT1 and the emitter terminal E and the relation between the electric current I g.
When disconnecting, second switch 3B connects, so that apply the negative voltage of a driving voltage Vg.So, disconnect transition period, between end G and E, keep being called the voltage Vge of mirror image voltage.During transition grid current Ig is almost constant.When the integration (electric charge) of grid current Ig when reaching a certain amount of electric charge, the electric current I c that flows into IGBT1 reduces, and final IGBT1 disconnects.
Yet, as shown in Figure 2 because mirror image voltage (mirror image time) in a period of time have on the occasion of, so after closed second switch 3B, arranged a time of delay so that IGBT1 disconnects fully.In that caused mirror image voltage remains to till the parasitic capacitance stored charge discharges fully between end G and the E by the mirror effect that is suitable for IGBT1 between end G and the E always.Have adverse effect to efficient this time of delay.
A method that reduces time of delay is to reduce the resistance of grid resistor 4, and increases grid current Ig.But because grid current Ig rises suddenly, so this method causes surge voltage between end G and E.Therefore, the resistance of reduction grid resistor 4 causes that the switching loss of IGBT1 increases.As a result, the resistance of grid resistor 4 can not easily change.
In addition, if the insulated gate semiconductor device that electric power converter is connected by a plurality of serial or parallel connections separately, for example IGBT1 constitutes, and turn-off delay time is different mutually, then electric power converter on being applied to insulated gate semiconductor device voltage or electric current in disequilibrium.As a result, in a plurality of insulated gate semiconductor devices one of high voltage or current concentration.
Therefore, an object of the present invention is to provide a kind of grid control circuit, it can reduce the time of delay that insulated gate semiconductor device is disconnected under the situation of the resistance that does not reduce grid resistor.
Another object of the present invention provides a kind of grid control circuit, and it can stop the outburst that is applied to the surge voltage on the insulated gate semiconductor device.
Another object of the present invention provides a kind of electric power converter circuit, and it can be switched on or switched off a plurality of insulated gate semiconductor devices simultaneously.
These and other purposes realize by a kind of novel and modified model grid control circuit is provided, this grid control circuit is used to switch on and off an insulated gate semiconductor device with grid, emitter and collector end, it comprises one the one DC power supply, be coupled to gate terminal by one first switch, and be arranged as gate terminal is applied a positive voltage, when disconnecting, connect insulated gate semiconductor device with convenient first switch connection and second switch; One the 2nd DC power supply is coupled to gate terminal by a second switch, and is arranged as gate terminal is applied a negative voltage, connects and first switch when disconnecting with convenient second switch, disconnects insulated gate semiconductor device; The parallel circuits of diode and capacitor is coupled in series to second switch; And a disconnection help circuit, be arranged as and on capacitor, produce negative electrical charge, to help to disconnect insulated gate semiconductor device.
According to one aspect of the present invention, a kind of electric power converter circuit is provided, have a plurality of insulated gate semiconductor devices, each insulated gate semiconductor device has a collector terminal, an emitter terminal and a gate terminal, comprise: a plurality of current sensors are arranged as and detect the electric current that flows into each described insulated gate semiconductor device; A plurality of grid control circuits, be arranged as and switch on and off each described insulated gate semiconductor device, each described grid control circuit comprises: one the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting with described first switch connection of box lunch and described second switch, connect described insulated gate semiconductor device, one the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting with described second switch connection of box lunch and described first switch, disconnect described insulated gate semiconductor device, and the parallel circuits of diode and capacitor, with described second switch series coupled; And setting apparatus, be arranged as the output that receives described transducer, and electric current according to described sensor, determine the time of delay of described insulated gate semiconductor device, the quantity of electric charge of described setting apparatus control store in each described capacitor, when surpassing a scheduled time with one in described time of delay of one in the described insulated gate semiconductor device of box lunch, described setting apparatus increases the quantity of electric charge that is stored in the capacitor corresponding to described one in the described insulated gate semiconductor device.
According to another aspect of the present invention, a kind of electric power converter circuit is provided, have a plurality of insulated gate semiconductor devices, each described insulated gate semiconductor device has a collector terminal, an emitter terminal and a gate terminal, comprise: a plurality of voltage sensors are arranged as the detection collector emitter voltage that detects between the described insulated gate semiconductor device two ends; A plurality of grid control circuits, be used to switch on and off each described insulated gate semiconductor device, each described grid control circuit comprises: one the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting with described first switch connection of box lunch and described second switch, connect described insulated gate semiconductor device, one the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting with described second switch connection of box lunch and described first switch, disconnect described insulated gate semiconductor device, and the parallel circuits of diode and capacitor, with described second switch series coupled; And setting apparatus, be arranged as the output that receives described transducer, and voltage according to described sensor, determine the time of delay of described insulated gate semiconductor device, the quantity of electric charge of described setting apparatus control store in each described capacitor, with in described time of delay of one in the described insulated gate semiconductor device of box lunch one when surpassing a scheduled time, described setting apparatus increases the quantity of electric charge that is stored in the capacitor corresponding to described one in the described insulated gate semiconductor device.
According to one side more of the present invention, a kind of grid control circuit with insulated gate semiconductor device of collector terminal, emitter terminal and gate terminal that is used to switch on and off is provided, comprise: one the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting, connect described insulated gate semiconductor device with described first switch connection of box lunch and described second switch; And one the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting, disconnect described insulated gate semiconductor device with described second switch connection of box lunch and described first switch; The grid current that opens circuit that wherein described the 2nd DC power supply is applied is bigger than the pass gate electrode current that a described DC power supply applies.
According to another aspect of the present invention, a kind of grid control circuit with insulated gate semiconductor device of collector terminal, emitter terminal and gate terminal that is used to switch on and off is provided, comprise: one the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting, connect described insulated gate semiconductor device with described first switch connection of box lunch and described second switch; One the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting, disconnect described insulated gate semiconductor device with described second switch connection of box lunch and described first switch; The series circuit of resistor and the 3rd switch, be coupling between described gate terminal and the described emitter terminal, wherein said the 3rd switch is connected when described insulated gate semiconductor device is connected, and described the 3rd switch disconnects when described insulated gate semiconductor device disconnects.
Together with being described in detail below the referenced drawings, the understanding more fully with obtaining easily the present invention and many attendant advantages thereof becomes better understood equally, wherein:
Fig. 1 is the circuit diagram of the conventional grid control circuit of IGBT;
Fig. 2 is a time diagram, between the collector terminal and the voltage and current between the emitter terminal of expression IGBT, and the gate terminal of IGBT and the relation between the voltage and current between the emitter terminal;
Fig. 3 is the circuit diagram of the grid control circuit of the first embodiment of the present invention;
Fig. 4 is a time diagram, in the presentation graphs 3 between the collector terminal and the voltage and current between the emitter terminal of IGBT, and the gate terminal of IGBT and the relation between the voltage and current between the emitter terminal;
Fig. 5 is the circuit diagram of the grid control circuit of the second embodiment of the present invention;
Fig. 6 is the circuit diagram of the grid control circuit of the third embodiment of the present invention;
Fig. 7 is the circuit diagram of the grid control circuit of the fourth embodiment of the present invention;
Fig. 8 is the circuit diagram of the grid control circuit of the fifth embodiment of the present invention;
Fig. 9 is the circuit diagram of the grid control circuit of the sixth embodiment of the present invention;
Figure 10 is the circuit diagram of the grid control circuit of the seventh embodiment of the present invention;
Figure 11 is the circuit diagram of the grid control circuit of the eighth embodiment of the present invention;
Figure 12 is the circuit diagram of the grid control circuit of the ninth embodiment of the present invention;
Figure 13 is the circuit diagram of the grid control circuit of the tenth embodiment of the present invention;
Figure 14 is the circuit diagram of the grid control circuit of the 11st embodiment of the present invention;
Figure 15 is a time diagram, the relation between the grid current Ig of the IGBT of the voltage of expression DC power supply 2A and 2B and inflow Figure 14;
Figure 16 is the circuit diagram of the grid control circuit of the 12nd embodiment of the present invention;
Figure 17 is a time diagram, the relation between the grid current Ig of the IGBT of the voltage of expression DC power supply 2A and 2B and inflow Figure 16;
Figure 18 is the circuit diagram of the grid control circuit of the 13rd embodiment of the present invention;
Figure 19 is the circuit diagram of the grid control circuit of the 14th embodiment of the present invention;
Figure 20 is the circuit diagram of the grid control circuit of the 15th embodiment of the present invention;
Figure 21 is the circuit diagram of the grid control circuit of the 16th embodiment of the present invention;
Figure 22 is a time diagram, the electric current I C of transistor 3E and the relation between the on-off regularly among expression Figure 21;
Figure 23 is the circuit diagram of the grid control circuit of the 17th embodiment of the present invention;
Figure 24 is a time diagram, the voltage Vce of transistor 3E and the relation between the on-off regularly among expression Figure 23;
Figure 25 is the circuit diagram of the electric power converter circuit of the first embodiment of the present invention; And
Figure 26 is the circuit diagram of the electric power converter circuit of the second embodiment of the present invention.
With reference now to accompanying drawing,, wherein same numeral is represented same or counterpart in whole several figure.Fig. 3 represents the grid control circuit 101 of the first embodiment of the present invention.In Fig. 3, IGBT1 is an insulated gate semiconductor device, and it has a collector terminal C, an emitter terminal E and a gate terminal G.The grid control circuit of being represented by chain-dotted line 101 is connected between end G and the E.
Grid control circuit 101 has a DC (direct current) power supply 2A, and the 2nd DC power supply 2B is used for IGBT1 is applied the first switch 3A of positive voltage, is used for IGBT1 is applied the second switch 3B of negative voltage, and grid resistor 4.The series circuit of grid resistor 4, the first switch 3A and a DC power supply 2A is connected between the end G and E of IGBT1.In addition, the series circuit of the 2nd DC power supply 2B and second switch 3B is connected between the junction point of the junction point of negative terminal of end E and a DC power supply 2A and the first switch 3A and grid resistor 4.In addition, end C and end E are connected to the main circuit (not shown) of an electric power converter.Above-mentioned formation is identical with Fig. 1.
As described below, the grid control circuit 101 that is not both between Fig. 1 and Fig. 3 also comprises 6, one the 3rd switch 3C of 5, one capacitors of a diode and one the 3rd DC power supply 2C.
At first, the parallel circuits of diode 5 and capacitor 6 is connected between second switch 3B and the grid resistor 4.Secondly, the series circuit of the 3rd switch 3C and the 3rd DC power supply 2C is connected between the junction point of the junction point of the first switch 3A and a DC power supply and diode 5 and capacitor 6.Under switch 3C action, the amount that DC power supply 2C disconnects IGBT1 with specific energy wants little amount that capacitor 6 is charged.
According to the time diagram of Fig. 4, the operation of the grid control circuit 101 of the narration first embodiment of the present invention.In Fig. 4, electric current I c is the electric current that flows between the collector terminal C of IGBT1 and emitter terminal E.Voltage Vce is the voltage between the collector terminal C of IGBT1 and emitter terminal E.Grid voltage Vge is the voltage between gate terminal G and emitter terminal E, and driving voltage Vg is the voltage that IGBT1 is switched on and off.Grid current Ig is the electric current that IGBT1 is switched on and off.Be the time that after connecting second switch 3B IGBT1 is disconnected fully time of delay.
IGBT1 connects by apply a positive voltage between end G and E, and disconnects by apply a negative voltage between end G and E.
The first switch 3A and the 3rd switch 3C switch on and off simultaneously, and when all connecting with convenient first switch 3A and the 3rd switch 3C, capacitor 6 is by the voltage charging of the 3rd DC power supply 2C.When disconnecting IGBT1, that is to say that when the first switch 3A and the 3rd switch 3C disconnect, and second switch 3B is when connecting, the voltage of the voltage of capacitor 6 and DC power supply 2B and be applied on the IGBT1 as driving voltage Vg.So when the electric charge of capacitor 6 was discharged into no-voltage, driving voltage Vg reached the voltage of the 2nd DC power supply 2B by diode 5.
As shown in Figure 4, owing to during transition have big relatively grid current Ig to flow, so can reduce time of delay.Because capacitor 6 is almost finished discharge when electric current I c begins to reduce, so when IGBT1 disconnected, only the voltage of the 2nd DC power supply 2B was applied on the IGBT1.
Fig. 5 represents the grid control circuit 102 of the second embodiment of the present invention.
In a second embodiment, the junction point of the 2nd DC power supply 2B, second switch 3B and capacitor 6 is different with first embodiment shown in Figure 3.
As shown in Figure 5, switch 3B and capacitor 6 out of position, and the anode of the 3rd DC power supply 2C is connected to the negative terminal of the 2nd DC power supply 2B.
Second embodiment has and first embodiment identical operations and the effect, and switch 3A, 3B transfer in the mode identical with first embodiment with 3C.
Fig. 6 represents the grid control circuit 103 of the third embodiment of the present invention.
In the following description, only narration and the different element of the described element of first embodiment.
In the 3rd embodiment, remove the 3rd DC power supply 2C among Fig. 3, and arrange that the 2nd DC power supply 2B is to replace the 3rd DC power supply 2C.In addition, add one the 4th switch 3D.More particularly, the 4th switch 3D is connected between the negative terminal and capacitor 6 of diode 5.The end of the 3rd switch 3C is connected to the junction point of capacitor 6 and the 4th switch 3D.The other end of the 3rd switch 3C is connected to the junction point of a DC power supply 2A and the 2nd DC power supply 2B.
In the 3rd embodiment, switch 3A and 3B are to operate with Fig. 1 grid control circuit 100 identical modes.No matter when second switch 3B connects, and the 3rd switch 3C just connects, and the 4th switch 3D disconnects.Therefore, capacitor 6 is by the voltage charging of the 2nd DC power supply 2B.Other operations of the 3rd embodiment are identical with first embodiment.
According to the 3rd embodiment, owing to omit the 3rd DC power supply 2C, so can reduce the number of DC power supply.
Fig. 7 represents the grid control circuit 104 of the fourth embodiment of the present invention.
In the following description, only narration and the different element of the described element of first embodiment.
In the 4th embodiment, replace the 3rd DC power supply 2C among Fig. 3 with a variable DC power supply 7. Switch 3A, 3B and 3C are to operate with the identical mode of first embodiment shown in Figure 3.According to the 4th embodiment, owing to replace the 3rd DC power supply 2C with variable DC power supply 7, so charge stored amount in any regulating capacitor 6 of energy.In addition, the 4th embodiment has the effect identical with first embodiment.
Fig. 8 represents the grid control circuit 105 of the fifth embodiment of the present invention.
In the 5th embodiment, the junction point of the 2nd DC power supply 2B, second switch 3B and capacitor 6 is different with Fig. 7 the 4th embodiment.
As shown in Figure 8, switch 3B and capacitor 6 out of position, and the anode of variable DC power supply 7 is connected to the negative terminal of the 2nd DC power supply 2B.
The 5th embodiment has and the 4th embodiment identical operations and effect, and switch 3A, 3B transfer in the mode identical with the 4th embodiment with 3C.
Fig. 9 represents the grid control circuit 106 of the sixth embodiment of the present invention.
In the following description, only narration and the different element of the described element of first embodiment.
In the 6th embodiment, between the junction point of the 3rd switch 3C and diode 5 and capacitor 6, be connected a resistor 8, so that the charging rate of regulating capacitor 6.The operation of the 6th embodiment is as follows.
Under the first switch 3A on-condition, when the 3rd switch 3C connected, capacitor 6 was charged by resistor 8 by the 3rd DC power supply 2C.Therefore, by regulating the opening time of the 3rd switch 3C, charge stored amount in the energy control capacitor 6.Other operations are identical with first embodiment.
Figure 10 represents the grid control circuit 107 of the seventh embodiment of the present invention.
In the 7th embodiment, the junction point of the 2nd DC power supply 2B, second switch 3B and capacitor 6 is different with Fig. 9 the 6th embodiment.
As shown in figure 10, switch 3B and capacitor 6 out of position, and the anode of the 3rd DC power supply 2C is connected to the negative terminal of the 2nd DC power supply 2B.
The 7th embodiment has and the 6th embodiment identical operations and effect, and switch 3A, 3B transfer in the mode identical with the 6th embodiment with 3C.
Figure 11 represents the grid control circuit 108 of the eighth embodiment of the present invention.
In the following description, only narration and the different element of the described element of first embodiment.
In the 8th embodiment of Figure 11, remove the 3rd DC power supply 2C shown in Figure 3, and add a reactor 9 and a diode 10.As shown in figure 11, diode 10 is connected between the junction point of negative terminal of the 3rd switch 3C and capacitor 6 and diode 5.In addition, an end of reactor 9 is connected to the junction point of the anode and the 3rd switch 3C of diode 10, and the other end of reactor 9 is connected to the anode of a DC power supply 2A.In addition, the end of the 3rd switch 3C is connected to the anode of diode 10, and the other end of the 3rd switch 3C is connected to the junction point between a DC power supply 2A and the 2nd DC power supply 2B.
In the 8th embodiment, reactor 9 is by a DC power supply 2A energize.The energy that the one DC power supply 2A supplies with depends on the duration that the 3rd switch 3C connects.Just, form a boost chopper by reactor 9 and the 3rd switch 3C.So if the 3rd switch 3C disconnects, the energy that then is stored in the reactor 9 is just transferred to capacitor 6 by diode 10.Therefore, by changing the duration that the 3rd switch 3C connects, charge stored amount in the energy control capacitor 6.In other respects, operation is identical with first embodiment.
Figure 12 represents the grid control circuit 109 of the ninth embodiment of the present invention.
In the following description, only narration and the different element of the described element of first embodiment.
Such as following discussion, in the 9th embodiment, remove the 3rd DC power supply 2C among Fig. 3, and add a reactor 9 and a diode 10.
As shown in figure 12, diode 10 is connected between the junction point of negative electrode of the end of the 3rd switch 3C and capacitor 6 and diode 5.In addition, the other end of the 3rd switch 3C is connected to the negative terminal of the 2nd DC power supply 2B and the junction point between the second switch 3B.In addition, an end of reactor 9 is connected to the junction point of the anode and the 3rd switch 3C of diode 10, and the other end of reactor 9 is connected to the junction point between a DC power supply 2A and the 2nd DC power supply 2B.
In the 9th embodiment, when the 3rd switch 3C connected, reactor 9 was by the 2nd DC power supply 2B energize.The energy that the 2nd DC power supply 2B supplies with depends on the duration that the 3rd switch 3C connects.So if the 3rd switch 3C disconnects, then the energy of reactor 9 is just transferred to capacitor 6 by diode 10.Therefore, the quantity of electric charge that is stored in the capacitor 6 depends on the energy that is stored in the reactor 9.Therefore, by changing the duration that the 3rd switch 3C connects, charge stored amount in the energy control capacitor 6.Other operations of the 9th embodiment are identical with first embodiment.
Figure 13 represents the grid control circuit 110 of the tenth embodiment of the present invention.
In the following description, only narration and the different element of the described element of the 9th embodiment.
In the tenth embodiment, as shown in figure 10, switch 3B and capacitor 6 out of position.In addition, the end of the 3rd switch 3C is connected to the junction point between the negative terminal of end of reactor 9 and diode 10, and the other end of the 3rd switch 3C is connected to the junction point between a DC power supply 2A and the 2nd DC power supply 2B.In addition, the other end of reactor 9 is connected to the junction point of negative terminal and the capacitor 6 of the 2nd DC power supply 2B.
The tenth embodiment has and the 9th embodiment identical operations and effect, and switch 3A, 3B transfer in the mode identical with the 9th embodiment with 3C.
Figure 14 represents the grid control circuit 111 of the 11st embodiment of the present invention, and its grid current Ig that opens circuit that breaks IGBT1 can be bigger than the grid current Ig that connects IGBT1.
In Figure 14, the absolute voltage of the 2nd DC power supply 2B is 30V for example, than the absolute voltage of DC power supply 2A 15V height for example, as shown in figure 15.One end of grid resistor 4 is connected to the gate terminal G of IGBT1, and the other end of grid resistor 4 is connected to switch, for example the junction point of npn-transistor 23A and pnp-transistor 23B.As shown in figure 14, transistor 23A and 23B are connected in series.The series circuit of the series circuit of transistor 23A and transistor 23B and a DC power supply 2A and the 2nd DC power supply 2B is connected in series.Emitter terminal E is connected to the junction point of a DC power supply 2A and the 2nd DC power supply 2B.In addition, the base terminal of transistor 23A and 23B is connected to an end of a base resistor 13.The other end of base resistor 13 is connected to a setting apparatus (not shown), and this setting apparatus applies a positive voltage to base resistor 13, so that connect transistor 23A, or the base stage of transistor 13 is applied a negative voltage, so that connect transistor 23B.
In the embodiment of Figure 14, if positive current flows into base resistor 13, then transistor 23A connects, so IGBT1 is disconnected.Have parasitic capacitance 14 between the end G of IGBT1 and E, it is for example feature of IGBT1 of insulated gate semiconductor device.
According to the embodiment of Figure 14, because the absolute value of the voltage of the 2nd DC power supply 2B is than the absolute value height of the voltage of a DC power supply 2A, so the grid current Ig that opens circuit of disconnection IGBT1 can be bigger than the pass gate electrode current Ig that connects IGBT1.As a result, grid control circuit 111 can reduce time of delay.
Figure 16 represents the grid control circuit 112 of the 12nd embodiment of the present invention.
In the following description, only narration and the different element of the described element of the 11 embodiment shown in Figure 14.
In the 12 embodiment, the absolute value of the voltage of a DC power supply 2A is identical with the absolute value of the voltage of the 2nd DC power supply 2B.In addition, with the grid resistor 4 diode 5A that is connected in parallel, so that by the grid current Ig that opens circuit.As shown in figure 14, one end of base resistor 13 is connected to the base stage of transistor 23A and 23B, and the other end of base resistor 13 is connected to a setting apparatus (not shown), this setting apparatus applies a positive voltage to base resistor 13, so that connect transistor 23A, or the base stage of resistor 13 applied a negative voltage, so that connect transistor 23B.
In the embodiment of Figure 16, if transistor 23A connects, then pass gate electrode current Ig flows through a current path that comprises a DC power supply 2A, transistor 23A, grid resistor 4 and parasitic capacitance 14, and IGBT1 connects.On the other hand, if transistor 23B connects, the grid current Ig that then opens circuit flows through a current path that comprises the 2nd DC power supply 2B, parasitic capacitance 14, diode 5 and transistor 23B, and IGBT1 disconnects.Just, the current path of connecting IGBT1 comprises grid resistor 4, and the current path of disconnection IGBT1 does not comprise grid resistor 4.Therefore, as shown in figure 17, even the absolute value of the voltage of a DC power supply 2A and the 2nd DC power supply 2B equates that the grid current Ig that opens circuit is also big than pass gate electrode current Ig.As a result, grid control circuit 112 can reduce time of delay.
Figure 18 represents the grid control circuit 113 of the 13rd embodiment of the present invention.
In the following description, only narration and the different element of the described element of Figure 16 the 12 embodiment.
In the 13 embodiment, the parallel circuits of a capacitor 6A and resistor 4A and diode 5A are connected in series.The electric capacity of the capacity ratio parasitic capacitance 14 of capacitor 6A is big, and the resistance height of the resistance ratio grid resistor 4 of resistor 4A.
In the 13 embodiment, if transistor 23A connects, then pass gate electrode current Ig flows through a current path that comprises a DC power supply 2A, transistor 23A, grid resistor 4 and parasitic capacitance 14, and IGBT1 connects.In this case, pass gate electrode current Ig is owing to grid resistor 4 reduces.On the other hand, if transistor 23B connects, the grid current Ig that then opens circuit flows through a current path that comprises the 2nd DC power supply 2B, parasitic capacitance 14, capacitor 6A, resistor 4A, diode 5 and transistor 23B, and IGBT1 disconnects.In this case, parasitic capacitance 14 discharges, and the electric charge that is stored in the parasitic capacitance 14 is transferred to capacitor 6A.Before capacitor 6A charged fully, the grid current Ig that opens circuit flowed into resistor 4A hardly.Therefore, nearly all grid current Ig that opens circuit mainly flows into capacitor 6A, and the grid current Ig that opens circuit is bigger than pass gate electrode current Ig.Finally, if capacitor 6A charges fully, the grid current Ig that then opens circuit flows into resistor 4A, and relatively reduces after connecting transistor 23B with being right after.
In addition, even IGBT1 fault and short circuit, transistor 23B is also protected by the parallel circuits of capacitor 6A and resistor 4A.
Figure 19 represents the grid control circuit 114 of the 14th embodiment of the present invention.In the present embodiment, the series circuit of grid resistor 4, transistor 23A and a DC power supply 2A is connected between the end G and E of IGBT1.The series circuit of the 2nd DC power supply 2B and capacitor 6A is connected in parallel with it.The collector terminal of transistor 23B is connected to the junction point between the gate terminal G of grid resistor 4 and IGBT1, and the emitter terminal of transistor 23B is connected to the junction point between the negative terminal of capacitor 6A and the 2nd DC power supply 2B.
In the embodiment of Figure 19, if transistor 23A connects, then pass gate electrode current Ig flows through grid resistor 4.On the other hand, if transistor 23B connects, the grid current Ig that then opens circuit does not flow through grid resistor 4.As a result, with Figure 16 and grid control circuit shown in Figure 180 open circuit grid current Ig relatively, the grid current Ig that opens circuit of Figure 19 flows soon.
In grid control circuit shown in Figure 16,, produce transient voltage in the moment of grid current Ig of opening circuit sometimes from liter above freezing owing in the circuit that flows through the grid current that opens circuit, there is diode 5.The grid current Ig that opens circuit rises big more suddenly, and transient voltage rises also big more.If the generation transient voltage then applies one to IGBT1 and subtracts voltage, i.e. poor between transient voltage and the 2nd DC power source voltage.As a result, the grid current Ig that opens circuit slowly rises, and prolong time of delay.On the contrary, because grid control circuit 114 does not have diode among Figure 19 in the grid current path of opening circuit, so there is not transient voltage.Therefore, do not reduce owing to be applied to the voltage of IGBT1, so the grid current Ig that opens circuit rises at once.
Figure 20 represents the grid control circuit 115 of the 15th embodiment of the present invention.In the following description, only narration and the different element of the described element of Figure 14 the 11 embodiment.
In the embodiment of Figure 20, grid control circuit shown in Figure 14 111 is added a transistor 3E, a resistor 4A and a resistor 13.Base stage-the collector electrode of resistor 13 and transistor 3E and grid resistor 4 are connected in parallel.The emitter terminal of transistor 3E is connected with the emitter terminal E of IGBT1 by resistor 4A.When transistor 23A and 3E connected, IGBT1 connected.So the voltage of a DC power supply 2A is applied to IGBT1, and pass gate electrode current Ig flows into the current path that comprises a DC power supply 2A, transistor 3C, grid resistor 4, resistor 13, transistor 3E, resistor 4A and IGBT1.On the other hand, when transistor 23B connected, IGBT1 disconnected, so the voltage of the 2nd DC power supply 23B is applied to IGBT1, and the grid current Ig that opens circuit flows into the path that comprises IGBT1, grid resistor 4, transistor 3D and the 2nd DC power supply 2B.
Finally, even a DC power supply 2A is identical with the absolute value of the voltage of the 2nd DC power supply 2B, it is lower than the grid current Ig that opens circuit that pass gate electrode current Ig also becomes, because when pass gate electrode current Ig flows, voltage Vge is littler than a DC power supply 2A, and when the grid current Ig that opens circuit flowed, voltage Vge equaled the 2nd DC power supply 2B.
When IGBT1 connects, following calculating voltage Vge.
Vge＝V
2A×(R
4A/(R
4+R
4A))
Wherein:
Voltage between Vge: gate terminal G and the emitter terminal E,
V
2A: the voltage of a DC power supply 2A,
R
4: the resistance of grid resistor 4, and
R
4A: the resistance of grid resistor 4A.
Figure 21 represents the grid control circuit 116 of the 16th embodiment of the present invention.In the following description, only narration and the different element of the described element of the 15 embodiment shown in Figure 20.
When overcurrent occurring, may cause overvoltage surge.Therefore, as shown in figure 21, in the present embodiment, Figure 20 grid control circuit 115 is added 15, one current comparators 16 of a current sensor, diode 18a and 18b, and a setting apparatus 17.In Figure 21, current sensor 15 detects the emitter current that flows into IGBT1, and 16 outputs detect current value to current comparator.Current comparator 16 compares this current value and the reference current Iref from setting apparatus 17.Surpass reference current Iref if detect the emitter current value, then comparator 16 is just exported a signal X by the base terminal of diode 18a and 13 couples of transistor 3E of resistor, so that connect transistor 3E.The anti-stop signal X of diode 18b flows to IGBT1 as a pass gate electrode current Ig.
As shown in figure 22, surpass reference current Iref if flow into the detection current value of IGBT1, then transistor 3E connects.When transistor 3E connected, the low relatively grid current Ig that opens circuit flowed into IGBT1.Therefore, can stop the outburst of overvoltage surge.Grid control circuit 115 with the 15 embodiment shown in Figure 20 is identical in other respects with effect in operation.
Figure 23 represents the grid control circuit 117 of the 17th embodiment of the present invention.In the following description, only narration and the different element of the described element of Figure 20 the 15 embodiment.
When the rate of change of the voltage that is applied to IGBT1 surpasses a definite value, may cause surge voltage.Therefore, as shown in figure 23, in the present embodiment, Figure 20 grid control circuit 115 is added 20, one comparators 21 of a voltage change ratio detector, diode 18a and 18b, and a setting apparatus 22.
In the present embodiment, voltage change ratio detector 20 detects the rate of change of the collector emitter voltage Vce of IGBT1, and detected value is outputed to comparator 21.Comparator 21 compares detected value and the reference threshold Vref from setting apparatus 22.If voltage change surpasses reference threshold Vref, comparator 21 is just exported a signal X by the base terminal of diode 18a and 13 couples of transistor 3E of resistor, so that connect transistor 3E.The anti-stop signal X of diode 18b flows to IGBT1 as a pass gate electrode current Ig.
As shown in figure 24, if change detected rate value surpasses reference voltage threshold Vref, then transistor 3E connects.When transistor 3E connected, the low relatively grid current Ig that opens circuit flowed into IGBT1.Therefore, can stop the outburst of surge voltage.
Figure 25 represents the electric power converter circuit of the first embodiment of the present invention.In this electric power converter circuit, three insulated gate semiconductor devices that correspondingly are connected in parallel, for example IGBT1, and each IGBT1 has a collector terminal, an emitter terminal and a gate terminal.Each IGBT1 is connected between anode P and the negative terminal N.
In Figure 25, current sensor 11 detects the electric current that flows through each IGBT1 separately.Three grid control circuits 118 apply gate signal to the gate terminal of each IGBT1.One in the above-mentioned grid control circuit 101 to 110 as grid control circuit 118.Setting apparatus 119 is from current sensor 11 received current values, and according to this current value to grid control circuit 118 output control signals.Just, the duration that setting apparatus 119 configuration switch 3C connect is so that the quantity of electric charge of control store in capacitor 6.Setting apparatus 119 detects the timing that disconnects each IGBT1, just, and the timing that the electric current I c of setting apparatus 119 each IGBT1 of detection inflow begins to reduce.So, if detecting an IGBT1, setting apparatus 119 has slow timing, then setting apparatus 119 is set the amount of charge stored in the capacitor 6 that enough increases grid control circuit 118 corresponding to the IGBT1 with slow timing.On the other hand, have fast timing if setting apparatus 119 detects an IGBT1, setting apparatus 119 is set charge stored amount in the capacitor 6 that reduces grid control circuit 118 corresponding to the IGBT1 with fast timing.Therefore, owing to shorten the time of delay of the IGBT1 with slow timing, so can disconnect all IGBT1 simultaneously.As a result, grid current Ig does not concentrate among each IGBT1 one.
Figure 26 represents the electric power converter circuit of the second embodiment of the present invention, three insulated gate semiconductor devices that wherein correspondingly are connected in series, and for example IGBT1, and each IGBT1 has a collector terminal, an emitter terminal and a gate terminal.The series circuit of IGBT1 is connected between anode P and the negative terminal N.
In Figure 26, voltage sensor 12 detects the relevant voltage Vce that produces between the collector and emitter of each IGBT1.Three grid control circuits 118 apply gate signal to the gate terminal of each IGBT1.One in the aforesaid grid control circuit 101 to 110 as grid control circuit 118.Setting apparatus 119 receives magnitude of voltage as input from voltage sensor 12, and according to magnitude of voltage grid control circuit 118 is exported control signals.The timing that setting apparatus 119 begins to rise by the voltage Vce that detects each IGBT1, response disconnects IGBT1, and configuration switch 3C duration of connecting then is so that the quantity of electric charge of control store in capacitor 6.So if in the setting apparatus 119 one detects an IGBT1 and has slow timing, then setting apparatus 119 increases the turn-on time of switch 3C corresponding to the IGBT1 with slow timing, so that increase charge stored in the capacitor 6 of grid control circuit 118.On the other hand, if in the setting apparatus 119 one detects an IGBT1 and has fast timing, then setting apparatus 119 reduces the turn-on time of switch 3C corresponding to the IGBT1 with fast timing, with charge stored on the capacitor 6 that reduces grid control circuit 118.Therefore, owing to shorten the time of delay of the IGBT1 with slow timing, so can disconnect all IGBT1 simultaneously.As a result, voltage Vge does not concentrate among each IGBT1 one.
According to above-mentioned technology, it will be apparent to one skilled in the art that the present invention has countless changes and change.For example, semiconductor switch such as transistor switch can be used for 3A, 3B and the 3C of grid control circuit 101 to 110.In addition, other semiconductor device or mechanical switch can replace transistor 23A and the 23B in the grid control circuit 111 to 117.The inverse parallel semiconductor switch can be pressed the semiconductor switch of bidirectional flow overcurrent, or other can replace the transistor 3E in the grid control circuit 115 to 117 by the switch of bidirectional flow overcurrent.Therefore much less, in the scope of accessory claim, the present invention can implement by the mode of removing specifically described here.
Claims (18)
1. one kind is used to switch on and off a grid control circuit with insulated gate semiconductor device of collector terminal, emitter terminal and gate terminal, comprising:
One the one DC power supply is coupled to described gate terminal by one first switch, and is arranged as described gate terminal is applied a positive voltage, when disconnecting with described first switch connection of box lunch and described second switch, connects described insulated gate semiconductor device;
One the 2nd DC power supply is coupled to described gate terminal by a second switch, and is arranged as described gate terminal is applied a negative voltage, connects and described first switch when disconnecting with the described second switch of box lunch, disconnects described insulated gate semiconductor device;
The parallel circuits of diode and capacitor is with described second switch series coupled; And
One disconnects the help circuit, is arranged as on described capacitor and produces negative electrical charge, to help to disconnect described insulated gate semiconductor device.
2. grid control circuit as claimed in claim 1, wherein said disconnection help circuit to comprise:
One the 3rd DC power supply is with one the 3rd switch series coupled.
3. grid control circuit as claimed in claim 1, wherein said disconnection help circuit to comprise:
One the 3rd switch is coupling between the end of junction point between the described first and second DC power supplys and described capacitor; And
One the 4th switch is coupling between the described end and the described junction point between described the 3rd switch of described diode and described capacitor.
4. grid control circuit as claimed in claim 1, the amount that the amount that wherein said disconnection helps circuit with specific energy described insulated gate semiconductor device to be disconnected will be lacked is charged to described capacitor.
5. grid control circuit as claimed in claim 2, wherein said the 3rd DC power supply comprises a variable dc voltage source.
6. grid control circuit as claimed in claim 2 also comprises:
A resistor is with described the 3rd DC power supply series coupled, to control the charging interval of described capacitor.
7. grid control circuit as claimed in claim 1, wherein said disconnection help circuit to comprise:
A coil, between a described DC both ends of power with one the 3rd switch series coupled, and has an end that is coupled to described capacitor, described coil arrangement is during described insulated gate semiconductor device is connected, pass through described the 3rd switch energize by a described DC power supply, and at described insulated gate semiconductor device off period, to described capacitor charging, to help to disconnect described insulated gate semiconductor device.
8. grid control circuit as claimed in claim 1, wherein said disconnection help circuit to comprise:
A coil, between described the 2nd DC both ends of power with one the 3rd switch series coupled, and has an end that is coupled to described capacitor, described coil arrangement is during described insulated gate semiconductor device is connected, pass through described the 3rd switch energize by described the 2nd DC power supply, and at described insulated gate semiconductor device off period, to described capacitor charging, to help to disconnect described insulated gate semiconductor device.
9. an electric power converter circuit has a plurality of insulated gate semiconductor devices, and each insulated gate semiconductor device has a collector terminal, and an emitter terminal and a gate terminal comprise:
A plurality of current sensors are arranged as and detect the electric current that flows into each described insulated gate semiconductor device;
A plurality of grid control circuits are arranged as and switch on and off each described insulated gate semiconductor device, and each described grid control circuit comprises:
One the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting with described first switch connection of box lunch and described second switch, connect described insulated gate semiconductor device
One the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting with described second switch connection of box lunch and described first switch, disconnect described insulated gate semiconductor device, and
The parallel circuits of diode and capacitor is with described second switch series coupled; And
A setting apparatus, be arranged as the output that receives described transducer, and electric current according to described sensor, determine the time of delay of described insulated gate semiconductor device, the quantity of electric charge of described setting apparatus control store in each described capacitor, when surpassing a scheduled time with one in described time of delay of one in the described insulated gate semiconductor device of box lunch, described setting apparatus increases the quantity of electric charge that is stored in the capacitor corresponding to described one in the described insulated gate semiconductor device.
10. an electric power converter circuit has a plurality of insulated gate semiconductor devices, and each described insulated gate semiconductor device has a collector terminal, and an emitter terminal and a gate terminal comprise:
A plurality of voltage sensors are arranged as the detection collector emitter voltage that detects between the described insulated gate semiconductor device two ends;
A plurality of grid control circuits are used to switch on and off each described insulated gate semiconductor device, and each described grid control circuit comprises:
One the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting with described first switch connection of box lunch and described second switch, connect described insulated gate semiconductor device
One the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting with described second switch connection of box lunch and described first switch, disconnect described insulated gate semiconductor device, and
The parallel circuits of diode and capacitor is with described second switch series coupled; And
A setting apparatus, be arranged as the output that receives described transducer, and voltage according to described sensor, determine the time of delay of described insulated gate semiconductor device, the quantity of electric charge of described setting apparatus control store in each described capacitor, with in described time of delay of one in the described insulated gate semiconductor device of box lunch one when surpassing a scheduled time, described setting apparatus increases the quantity of electric charge that is stored in the capacitor corresponding to described one in the described insulated gate semiconductor device.
11. one kind is used to switch on and off a grid control circuit with insulated gate semiconductor device of collector terminal, emitter terminal and gate terminal, comprises:
One the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting, connect described insulated gate semiconductor device with described first switch connection of box lunch and described second switch; And
One the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting, disconnect described insulated gate semiconductor device with described second switch connection of box lunch and described first switch;
Wherein the grid current that opens circuit that is applied by described the 2nd DC power supply is bigger than the pass gate electrode current that a described DC power supply applies.
12. grid control circuit as claimed in claim 11, wherein:
The absolute value of described the 2nd DC power source voltage is bigger than the absolute value of a described DC power source voltage.
13. grid control circuit as claimed in claim 11 also comprises:
The parallel circuits of diode and grid resistor is coupled to described gate terminal, so that flow through the grid current that opens circuit from described gate terminal.
14. grid control circuit as claimed in claim 11 also comprises:
A grid resistor is coupling between a described gate terminal and the described DC power supply, so that a described DC power supply applies a positive voltage by described grid resistor to described gate terminal, so that connect described insulated gate semiconductor device.
15. grid control circuit as claimed in claim 14 also comprises:
A series circuit, with described grid resistor parallel coupled, described series circuit comprises a diode, with the parallel circuits series coupled of a capacitor and resistor.
16. one kind is used to switch on and off a grid control circuit with insulated gate semiconductor device of collector terminal, emitter terminal and gate terminal, comprises:
One the one DC power supply, be coupled to the gate terminal of each insulated gate semiconductor device by one first switch, and be arranged as described gate terminal is applied a positive voltage, when disconnecting, connect described insulated gate semiconductor device with described first switch connection of box lunch and described second switch;
One the 2nd DC power supply, be coupled to the described gate terminal of each insulated gate semiconductor device by a second switch, and be arranged as described gate terminal is applied a negative voltage, when disconnecting, disconnect described insulated gate semiconductor device with described second switch connection of box lunch and described first switch;
The series circuit of resistor and the 3rd switch is coupling between described gate terminal and the described emitter terminal,
Wherein said the 3rd switch is connected when described insulated gate semiconductor device is connected, and described the 3rd switch disconnects when described insulated gate semiconductor device disconnects.
17. grid control circuit as claimed in claim 16 also comprises:
A current detector is coupled to described the 3rd switch, and is arranged as the electric current that detects the described insulated gate semiconductor device of inflow,
Described the 3rd switch arrangement is connected when the described electric current that flows into described insulated gate semiconductor device surpasses a predetermined value for detecting at described current detector.
18. grid control circuit as claimed in claim 16 also comprises:
A voltage change ratio detector is arranged as the rate of change of the voltage between the collector and emitter end that detects described insulated gate semiconductor device,
Described the 3rd switch arrangement is connected when described rate of change surpasses a scheduled volume for detecting at described voltage change ratio detector.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP08543598A JP3447949B2 (en) | 1998-03-31 | 1998-03-31 | Gate drive circuit and power converter for insulated gate semiconductor device |
| JP085435/98 | 1998-03-31 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1230820A CN1230820A (en) | 1999-10-06 |
| CN1097337C true CN1097337C (en) | 2002-12-25 |
Family
ID=13858787
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN99104531A Expired - Lifetime CN1097337C (en) | 1998-03-31 | 1999-03-31 | Gate control circuit for voltage drive switching element |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6285235B1 (en) |
| JP (1) | JP3447949B2 (en) |
| CN (1) | CN1097337C (en) |
| AU (1) | AU726077B2 (en) |
| CA (1) | CA2267544C (en) |
Families Citing this family (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4823470B2 (en) * | 2000-07-13 | 2011-11-24 | シーティー−コンセプト・ホールディング・アクチェンゲゼルシャフト | Method and apparatus for controlling transient state of power semiconductor switch according to the state |
| JP3788926B2 (en) * | 2001-10-19 | 2006-06-21 | 三菱電機株式会社 | Semiconductor device and transistor driving method |
| JP4364651B2 (en) * | 2004-01-07 | 2009-11-18 | 三菱電機株式会社 | Booster and motor controller |
| US7542258B2 (en) * | 2004-01-16 | 2009-06-02 | Lutron Electronics Co., Inc. | DV/dt-detecting overcurrent protection circuit for power supply |
| DE102004013599A1 (en) * | 2004-03-19 | 2005-10-06 | Robert Bosch Gmbh | Control circuit for driving a power electronic circuit and method for this purpose |
| FR2874767B1 (en) * | 2004-08-27 | 2006-10-20 | Schneider Toshiba Inverter | DEVICE FOR CONTROLLING A POWER TRANSISTOR |
| ATE487277T1 (en) * | 2005-04-22 | 2010-11-15 | Ebm Papst Mulfingen Gmbh & Co | CIRCUIT ARRANGEMENT FOR CONTROLLING AN ELECTRICAL CIRCUIT SWITCH AT HIGH VOLTAGE POTENTIAL |
| JP2009050118A (en) * | 2007-08-22 | 2009-03-05 | Fuji Electric Systems Co Ltd | Method of controlling gate driving circuit |
| JP5456615B2 (en) * | 2010-08-24 | 2014-04-02 | 日本電信電話株式会社 | Semiconductor cutoff circuit |
| EP2445110B1 (en) * | 2010-10-22 | 2014-05-14 | ABB Research Ltd | Gate driver unit for electrical switching device |
| JP5796450B2 (en) * | 2011-10-18 | 2015-10-21 | 富士電機株式会社 | Switching device control device |
| CN103166435B (en) * | 2011-12-19 | 2014-12-03 | 中国电力科学研究院 | Voltage self-adaptive control method based on insulated gate bipolar translator (IGBT) series connection loss optimization |
| US8653881B2 (en) | 2012-01-31 | 2014-02-18 | Infineon Technologies Austria Ag | Half bridge flyback and forward |
| US8779841B2 (en) * | 2012-01-31 | 2014-07-15 | Infineon Technologies Austria Ag | Cascode switch with robust turn on and turn off |
| JP6009815B2 (en) * | 2012-05-22 | 2016-10-19 | 株式会社東芝 | Gate drive circuit |
| JP5741605B2 (en) * | 2013-02-04 | 2015-07-01 | 株式会社デンソー | Electronic equipment |
| US9041433B2 (en) | 2013-06-21 | 2015-05-26 | Infineon Technologies Austria Ag | System and method for driving transistors |
| JP2015177591A (en) * | 2014-03-13 | 2015-10-05 | 富士電機株式会社 | Semiconductor device and semiconductor system |
| US10491095B2 (en) | 2014-10-06 | 2019-11-26 | Ford Global Technologies, Llc | Dynamic IGBT gate drive for vehicle traction inverters |
| CN106991221B (en) * | 2017-03-24 | 2020-04-24 | 清华大学 | Segmented broken line modeling method based on transient physical process of IGBT device |
| JP7183797B2 (en) * | 2019-01-08 | 2022-12-06 | 株式会社デンソー | power converter |
| JP7226099B2 (en) * | 2019-05-27 | 2023-02-21 | 株式会社明電舎 | gate drive circuit |
| CN111487514B (en) * | 2020-04-20 | 2022-07-22 | 全球能源互联网研究院有限公司 | Method and system for extracting stray capacitance of IGBT dynamic parameter test circuit |
| CN116888893A (en) * | 2021-02-25 | 2023-10-13 | 松下知识产权经营株式会社 | On-state voltage measuring circuit |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1119364A (en) * | 1994-06-06 | 1996-03-27 | 株式会社东芝 | Gate drive circuit for voltage-driven type power switching device |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4553082A (en) * | 1984-05-25 | 1985-11-12 | Hughes Aircraft Company | Transformerless drive circuit for field-effect transistors |
| AU6174186A (en) * | 1986-08-22 | 1988-02-25 | Micro Controls Ltd. | Fluorescent lamp control circuit |
| US4885486A (en) * | 1987-12-21 | 1989-12-05 | Sundstrand Corp. | Darlington amplifier with high speed turnoff |
| US5055721A (en) * | 1989-04-13 | 1991-10-08 | Mitsubishi Denki Kabushiki Kaisha | Drive circuit for igbt device |
| US5500619A (en) * | 1992-03-18 | 1996-03-19 | Fuji Electric Co., Ltd. | Semiconductor device |
| JP2793946B2 (en) | 1993-08-26 | 1998-09-03 | 三菱電機株式会社 | Power switching device |
| US5475329A (en) * | 1994-01-04 | 1995-12-12 | Texas Instruments Incorporated | Turn-off circuit to provide a discharge path from a first node to a second node |
| DE4403941C2 (en) | 1994-02-08 | 2000-05-18 | Abb Schweiz Ag | Method and circuit arrangement for controlling semiconductor switches in a series circuit |
| JP3373704B2 (en) * | 1995-08-25 | 2003-02-04 | 三菱電機株式会社 | Insulated gate transistor drive circuit |
| JP3421507B2 (en) * | 1996-07-05 | 2003-06-30 | 三菱電機株式会社 | Driver circuit for semiconductor device |
-
1998
- 1998-03-31 JP JP08543598A patent/JP3447949B2/en not_active Expired - Fee Related
-
1999
- 1999-03-12 US US09/266,774 patent/US6285235B1/en not_active Expired - Lifetime
- 1999-03-23 AU AU21372/99A patent/AU726077B2/en not_active Expired
- 1999-03-30 CA CA002267544A patent/CA2267544C/en not_active Expired - Lifetime
- 1999-03-31 CN CN99104531A patent/CN1097337C/en not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1119364A (en) * | 1994-06-06 | 1996-03-27 | 株式会社东芝 | Gate drive circuit for voltage-driven type power switching device |
Also Published As
| Publication number | Publication date |
|---|---|
| AU726077B2 (en) | 2000-11-02 |
| AU2137299A (en) | 1999-10-14 |
| CA2267544A1 (en) | 1999-09-30 |
| US6285235B1 (en) | 2001-09-04 |
| JPH11285238A (en) | 1999-10-15 |
| JP3447949B2 (en) | 2003-09-16 |
| CA2267544C (en) | 2002-01-29 |
| CN1230820A (en) | 1999-10-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN1097337C (en) | Gate control circuit for voltage drive switching element | |
| CN1193486C (en) | DC-DC converter | |
| CN1144348C (en) | Grid circuit | |
| CN1050475C (en) | Power generating equipment for vehicle | |
| CN1209866C (en) | Switch power device and electronic device for using said switch power device | |
| CN1360392A (en) | Noise reducing device for electric power conversion device | |
| CN1961471A (en) | PWM cycloconverter and method for controlling the same | |
| CN1042993C (en) | Load driving device | |
| CN1357957A (en) | Charging method and charger | |
| CN101079576A (en) | System and method for switch of power adjuster | |
| CN1445928A (en) | Drive circuit of power semiconductor element | |
| CN1860671A (en) | Switching-mode power supply | |
| CN1885704A (en) | Switching power supply device | |
| CN1201291A (en) | Power conversion device having voltage driven switch element | |
| CN1538584A (en) | Motor control equipment | |
| CN1968017A (en) | Driver for voltage driven type switching element | |
| CN1677824A (en) | Semiconductor device for controlling switching power supply | |
| CN1173068A (en) | Switching module, power converter and power converter composed of using switching modules | |
| CN101065891A (en) | Switching power supply and its control circuit, and electronic apparatus employing such switching power supply | |
| CN1842957A (en) | Switching regulator, power supply circuit and secondary cell charging circuit including the same | |
| CN1691479A (en) | Switching power supply circuit | |
| CN1222099C (en) | Grid driver for thyratron | |
| CN1199267A (en) | Electric generator controlling device for vehicle | |
| CN1841900A (en) | Switching regulator circuit | |
| CN1806382A (en) | Swithching power supply device and electronic apparatus |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C06 | Publication | ||
| PB01 | Publication | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: TOSHIBA MITSUBISHI ELECTRIC INDUSTRIAL SYSTEM CO. Free format text: FORMER OWNER: TOSHIBA CORPORATION Effective date: 20041022 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20041022 Address after: Tokyo, Japan, Japan Patentee after: Toshiba Mitsubishi Electric Industrial Systems Co., Ltd. Address before: Kanagawa Patentee before: Toshiba Corp |
|
| CX01 | Expiry of patent term |
Granted publication date: 20021225 |
|
| CX01 | Expiry of patent term |