CN109683550B - Control method of startup and shutdown system - Google Patents
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/10—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using selector switches
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Abstract
The invention particularly relates to a control method of a startup and shutdown system. The control method of the power on/off system comprises an RJ45 interface, an Ethernet PHY chip, an FPGA chip, a PMOS switch array and a local PC serial port interface, wherein the Ethernet PHY chip is accessed to the Ethernet through an RJ45 interface, the Ethernet PHY chip is connected to the FPGA chip, and the FPGA chip is connected to a pin for power on/off of a main board of the equipment through the PMOS switch array; the system input power is connected to the PMOS switch array, and the system output power is connected to a pin of the equipment mainboard startup and shutdown through the PMOS switch array, so that the equipment startup and shutdown are controlled. The control method of the startup and shutdown system is compatible with various devices with different current amount requirements, is compatible with the existing local equipment switching power supply, has the advantages of strong compatibility, high system integration level, simple implementation, reduced use cost, greatly improved user experience and wide application prospect.
Description
Technical Field
The invention relates to the technical field of intelligent equipment, in particular to a control method of a startup and shutdown system.
Background
With the change of science and technology, various electronic devices are becoming more and more inseparable with people's daily life. In work, people can not leave office equipment such as a notebook, a desktop, a server and the like; in life, household appliances such as household water heaters, refrigerators, televisions, air conditioners and the like provide daily services for people at any time. The realization of remote on-off of various office equipment and household appliances is a new requirement of users at the present stage.
Remote boot, also known as remote wake-up technology, or WOL for short, refers to remote boot that can be achieved through a lan, the internet, or a communications network, and can be started at any time as long as the lan, the internet, or the communications network is used, no matter how far away the accessed computer is from the user or where the accessed computer is located.
Currently, when a plurality of people use the same server for office work or development, access is generally realized by using software such as VNC and Xmanager. However, once the remote server is powered off by the software, the server cannot be remotely powered on. The method cannot guarantee the requirement of a user for starting up at any time and any place, is inconvenient for the user to use, and cannot guarantee the information security and the office requirement of the user.
Meanwhile, most of the existing remote power on and off methods are specific devices and systems developed for the specific devices, so that the compatibility is poor, and the new requirements of users at the present stage cannot be met; and the use and maintenance cost is high, and the smooth realization of remote startup and shutdown can be ensured only by timely finding the same type of equipment and system replacement when a fault occurs.
Based on the situation, the invention provides a control method of a startup and shutdown system, aiming at improving the compatibility of a remote startup and shutdown system and reducing the use and installation cost.
Disclosure of Invention
In order to make up for the defects of the prior art, the invention provides a simple and efficient control method of a startup and shutdown system.
The invention is realized by the following technical scheme:
a startup and shutdown system comprises an RJ45 interface, an Ethernet PHY chip, an FPGA chip, a PMOS switch array and a local PC serial port interface, wherein the Ethernet PHY chip is accessed to an Ethernet through an RJ45 interface, the Ethernet PHY chip is connected to the FPGA chip, and the FPGA chip is connected to a pin of an input power supply of a device mainboard through the PMOS switch array; the system input power is accessed to the PMOS switch array, and the system output power is accessed to the equipment mainboard input power pin through the PMOS switch array, so that the on-off control of the equipment is realized; the FPGA chip is also connected with a local PC serial port interface, and can realize on-off control locally through the PC serial port interface.
The pin of the output power supply of the equipment mainboard is also connected with the output power supply of a local switching power supply system, and the button on-off mechanism of the original equipment is compatible.
The FPGA chip comprises an SGMII IP core, a Tri-mode Ethernet MAC IP core, a frame analysis module and a serial port module, wherein the Ethernet PHY chip is connected to the Tri-mode Ethernet MAC IP core through the SGMII IP core, the Tri-mode Ethernet MAC IP core is connected with the frame analysis module, and the analysis of an Ethernet packet can be carried out through the frame analysis module; the local PC serial port interface is connected to the frame analysis module through the serial port module, and serial port frames can be analyzed through the frame analysis module; and the Tri-mode Ethernet MAC IP core and the serial port module are both connected to the PMOS switch array through the frame analysis module.
The PMOS switch array comprises n parallel P-type MOS tubes, and each P-type MOS tube is connected to each pin of the FPGA chip respectively.
The FPGA chip is connected with the grid G of each P-type MOS tube, the system input power supply is connected with the drain D of each P-type MOS tube, and the system output power supply is connected with the source S of each P-type MOS tube.
When the FPGA chip drives the n P-type MOS tubes to be completely conducted, the current magnitude of the system output power supply is not less than the current magnitude required by the on-off of the equipment mainboard.
The number n of the P-type MOS tubes in the PMOS switch array is set according to a control _ reg register of a control register of a frame analysis module in the FPGA chip, each bit of the control _ reg register corresponds to one P-type MOS tube, and the numerical value of the control _ reg register can be programmed.
A control method of a startup and shutdown system is characterized by comprising the following steps:
(1) a user sends a device starting signal through a self-defined two-layer protocol of an Ethernet IP protocol, namely a private protocol specified on the basis of an Ethernet IP frame, the value of the device starting signal is influenced by the current amount required by the on-off of a device mainboard, and the current amount required by the on-off of the device mainboard and the current amount capable of being carried by one P-type MOS tube are calculated to obtain the number of the P-type MOS tubes to be conducted;
(2) after the FPGA chip receives an equipment starting signal sent by the Ethernet, a frame analysis module analyzes according to a private protocol and sends an analysis value to a control _ reg register;
(3) the control _ reg register sends out a plurality of high level signals according to the analytic numerical value to conduct a corresponding number of P-type MOS tubes, so that the current magnitude of the system output power supply can reach the current magnitude required by the on-off of the equipment mainboard, and the remote on-off is realized;
(4) after the user receives the equipment shutdown signal through the Ethernet equipment, the FPGA chip sends a low level signal through the control _ reg register to disconnect the conducted P-type MOS tube, namely, the system output power supply and the system input power supply are disconnected, so that remote shutdown is realized.
The device can also send out a power-on/power-off signal through a local PC serial port interface, the serial port module sends the power-on/power-off signal to the frame analysis module, the FPGA chip sends out a driving signal through a control _ reg register, and the power-on/power-off of the device can be realized by controlling the on/off of the P-type MOS tube.
The invention has the beneficial effects that: the control method of the startup and shutdown system is compatible with various devices with different current amount requirements, is compatible with the existing local equipment switching power supply, has the advantages of strong compatibility, high system integration level, simple implementation, reduced use cost, greatly improved user experience and wide application prospect.
Drawings
FIG. 1 is a schematic diagram of the power on/off system of the present invention.
Detailed Description
In order to make the technical problems, technical solutions and advantageous effects to be solved by the present invention more clearly apparent, the present invention is described in detail below with reference to the accompanying drawings and embodiments. It should be noted that the specific embodiments described herein are only for explaining the present invention and are not used to limit the present invention.
The power on/off system comprises an RJ45 interface, an Ethernet PHY chip, an FPGA chip, a PMOS switch array and a local PC serial port interface, wherein the Ethernet PHY chip is accessed to the Ethernet through an RJ45 interface, the Ethernet PHY chip is connected to the FPGA chip, and the FPGA chip is connected to a pin of an input power supply of an equipment mainboard through the PMOS switch array; the system input power is accessed to the PMOS switch array, and the system output power is accessed to the equipment mainboard input power pin through the PMOS switch array, so that the on-off control of the equipment is realized; the FPGA chip is also connected with a local PC serial port interface, and can realize on-off control locally through the PC serial port interface.
The pin of the output power supply of the equipment mainboard is also connected with the output power supply of a local switching power supply system, and the button on-off mechanism of the original equipment is compatible.
The FPGA chip comprises an SGMII IP core, a Tri-mode Ethernet MAC IP core, a frame analysis module and a serial port module, wherein the Ethernet PHY chip is connected to the Tri-mode Ethernet MAC IP core through the SGMII IP core, the Tri-mode Ethernet MAC IP core is connected with the frame analysis module, and the analysis of an Ethernet packet can be carried out through the frame analysis module; the local PC serial port interface is connected to the frame analysis module through the serial port module, and serial port frames can be analyzed through the frame analysis module; and the Tri-mode Ethernet MAC IP core and the serial port module are both connected to the PMOS switch array through the frame analysis module.
The SGMII IP core, the Tri-mode Ethernet MAC IP core, the frame analysis module and the serial port module can be upgraded through FPGA chip firmware, and programming is achieved.
The PMOS switch array comprises n parallel P-type MOS tubes, and each P-type MOS tube is connected to each pin of the FPGA chip respectively. As long as one P-type MOS tube is conducted, the system output power supply has current, and only the current can drive the current amount which can be borne by one P-type MOS tube. The FPGA chip can be according to the required current capacity of the equipment mainboard switching on and shutting down of the actual carry of this remote switch machine system, and a plurality of control pin foot is sent out the high level and can is opened a plurality of P type MOS pipe for thereby a plurality of P type MOS pipe connects in parallel and increases the current bearing capacity of system output power, thereby satisfies the demand of equipment mainboard switching on and shutting down to the current capacity.
The FPGA chip is connected with the grid G of each P-type MOS tube, the system input power supply is connected with the drain D of each P-type MOS tube, and the system output power supply is connected with the source S of each P-type MOS tube.
When the FPGA chip drives the n P-type MOS tubes to be completely conducted, the current magnitude of the system output power supply is not less than the current magnitude required by the on-off of the equipment mainboard.
The number n of the P-type MOS tubes in the PMOS switch array is set according to a control _ reg register of a control register of a frame analysis module in the FPGA chip, each bit of the control _ reg register corresponds to one P-type MOS tube, and the numerical value of the control _ reg register can be programmed.
The control method based on the startup and shutdown system comprises the following steps:
(1) a user sends a device starting signal through a self-defined two-layer protocol of an Ethernet IP protocol, namely a private protocol specified on the basis of an Ethernet IP frame, the value of the device starting signal is influenced by the current amount required by the on-off of a device mainboard, and the current amount required by the on-off of the device mainboard and the current amount capable of being carried by one P-type MOS tube are calculated to obtain the number of the P-type MOS tubes to be conducted;
(2) after the FPGA chip receives an equipment starting signal sent by the Ethernet, a frame analysis module analyzes according to a private protocol and sends an analysis value to a control _ reg register;
(3) the control _ reg register sends out a plurality of high level signals according to the analytic numerical value to conduct a corresponding number of P-type MOS tubes, so that the current magnitude of the system output power supply can reach the current magnitude required by the on-off of the equipment mainboard, and the remote on-off is realized;
(4) after the user receives the equipment shutdown signal through the Ethernet equipment, the FPGA chip sends a low level signal through the control _ reg register to disconnect the conducted P-type MOS tube, namely, the system output power supply and the system input power supply are disconnected, so that remote shutdown is realized.
When a user is beside the equipment, the power-on/off of the equipment can be carried out through an original local switching power supply system, or a power-on/off signal can be sent out through a local PC serial port interface, the serial port module sends the power-on/off signal to the frame analysis module, the FPGA chip sends out a driving signal through the control _ reg register, and the power-on/off of the equipment can be realized by controlling the on/off of the P-type MOS tube.
The control method of the startup and shutdown system is compatible with various devices with different current magnitude requirements, is compatible with the existing local equipment switching power supply, has strong compatibility and high system integration level, can realize local and remote startup and shutdown mechanisms, and is convenient for users to use the devices to the maximum extent; and the implementation is simple and convenient, the use cost is reduced, the user experience is greatly improved, and the method has a wide application prospect.
Claims (5)
1. A control method of a startup and shutdown system is characterized by comprising the following steps: the power on-off system comprises an RJ45 interface, an Ethernet PHY chip, an FPGA chip, a PMOS switch array and a local PC serial port interface, wherein the Ethernet PHY chip is accessed to the Ethernet through an RJ45 interface, the Ethernet PHY chip is connected to the FPGA chip, and the FPGA chip is connected to a pin of an input power supply of the equipment mainboard through the PMOS switch array; the system input power is accessed to the PMOS switch array, and the system output power is accessed to the equipment mainboard input power pin through the PMOS switch array, so that the on-off control of the equipment is realized; the FPGA chip is also connected with a local PC serial port interface, and can realize on-off control locally through the PC serial port interface;
the FPGA chip comprises an SGMII IP core, a Tri-mode Ethernet MAC IP core, a frame analysis module and a serial port module, wherein the Ethernet PHY chip is connected to the Tri-mode Ethernet MAC IP core through the SGMII IP core, the Tri-mode Ethernet MAC IP core is connected with the frame analysis module, and the analysis of an Ethernet packet can be carried out through the frame analysis module; the local PC serial port interface is connected to the frame analysis module through the serial port module, and serial port frames can be analyzed through the frame analysis module; the Tri-mode Ethernet MAC IP core and the serial port module are both connected to the PMOS switch array through the frame analysis module;
the PMOS switch array comprises n parallel P-type MOS tubes, and each P-type MOS tube is connected to each pin of the FPGA chip respectively;
the number n of the P-type MOS tubes in the PMOS switch array is set according to a control _ reg register of a control register of a frame analysis module in an FPGA chip, each bit of the control _ reg register corresponds to one P-type MOS tube, and the numerical value of the control _ reg register can be programmed;
the control method comprises the following steps:
(1) a user sends a device starting signal through a self-defined two-layer protocol of an Ethernet IP protocol, namely a private protocol specified on the basis of an Ethernet IP frame, the value of the device starting signal is influenced by the current amount required by the on-off of a device mainboard, and the current amount required by the on-off of the device mainboard and the current amount capable of being carried by one P-type MOS tube are calculated to obtain the number of the P-type MOS tubes to be conducted;
(2) after the FPGA chip receives an equipment starting signal sent by the Ethernet, a frame analysis module analyzes according to a private protocol and sends an analysis value to a control _ reg register;
(3) the control _ reg register sends out a plurality of high level signals according to the analytic numerical value to conduct a corresponding number of P-type MOS tubes, so that the current magnitude of the system output power supply can reach the current magnitude required by the on-off of the equipment mainboard, and the remote on-off is realized;
(4) after the user receives the equipment shutdown signal through the Ethernet equipment, the FPGA chip sends a low level signal through the control _ reg register to disconnect the conducted P-type MOS tube, namely, the system output power supply and the system input power supply are disconnected, so that remote shutdown is realized.
2. The control method of the on/off system according to claim 1, wherein: the device can also send out a power-on/power-off signal through a local PC serial port interface, the serial port module sends the power-on/power-off signal to the frame analysis module, the FPGA chip sends out a driving signal through a control _ reg register, and the power-on/power-off of the device can be realized by controlling the on/off of the P-type MOS tube.
3. The control method of the on/off system according to claim 1, wherein: the pin of the output power supply of the equipment mainboard is also connected with the output power supply of a local switching power supply system, and the button on-off mechanism of the original equipment is compatible.
4. The control method of the on/off system according to claim 1, wherein: the FPGA chip is connected with the grid G of each P-type MOS tube, the system input power supply is connected with the drain D of each P-type MOS tube, and the system output power supply is connected with the source S of each P-type MOS tube.
5. The control method of the on/off system according to claim 1, wherein: when the FPGA chip drives the n P-type MOS tubes to be completely conducted, the current magnitude of the system output power supply is not less than the current magnitude required by the on-off of the equipment mainboard.
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| CN110688263B (en) * | 2019-09-30 | 2023-04-11 | 中国工程物理研究院计算机应用研究所 | Application method of hard disk automatic switching device based on FPGA |
| CN110708173B (en) * | 2019-09-30 | 2021-06-15 | 中国工程物理研究院计算机应用研究所 | Remote startup and shutdown module applied to image acquisition equipment |
| CN117032814A (en) * | 2023-10-10 | 2023-11-10 | 成都申威科技有限责任公司 | Remote starting system and method for computer |
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