CN109635336A - Electromagnetism side channel modeling method based on space electric dipole array - Google Patents
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- G—PHYSICS
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- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
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Abstract
The present invention relates to integrated circuit trustability technical fields, to propose electromagnetism side channel modeling method, this method can assist reducing the time for obtaining credible female parent and resources costs for the hardware Trojan horse detection field based on side Multiple Channel Analysis, have certain practical significance and reference value.For this reason, the technical scheme adopted by the present invention is that the electromagnetism side channel modeling method based on space electric dipole array, steps are as follows: step 1: carrying out the emulation of transistor level transient current using Hspice simulation software, obtain the transient current of each branch current；Step 2: extracting the spatial positional information of each layer branch current using chip layout data, establish space electric dipole Array Model；Step 3: calculating the electromagnetic radiation of space electric dipole array, obtain the electromagnetism side channel time domain waveform of integrated circuit.Present invention is mainly applied to IC design occasions that manufactures.
Description
Technical field
The present invention relates to integrated circuit trustability technical fields, and in particular to a kind of based on space electric dipole array
Electromagnetism side channel modeling method.
Background technique
With the rapid development of EDA Technique and semiconductor fabrication process, single-chip digital IC chip
Integrated function becomes increasingly complex, and circuit scale is increasing, and integrated level is higher and higher, to be widely used in modern science and technology
Every field, especially in finance device, mobile communication, communications and transportation, the Sensitive Domains such as government and the energy.Integrated circuit is to society
Can progress and expanding economy play increasing impetus, have become support socio-economic development it is strategic,
Basic and advanced sector.
In today of business globalization, design and the manufacture of IC chip gradually tend to globalize.Ic core
The listing of piece needs to undergo design, manufacture, packaging and testing four-stage.Due to the advance and complexity of IC products
Property, while in order to more reasonably utilize resource and fund to configure, the design and manufacturing process of monolithic integrated optical circuit are completely by more families
Unit consolidation is completed, wherein being no lack of joint venture or overseas-funded enterprise.The design of integrated circuit and the separation of manufacturing process, to collection
Great risk is brought at the safety of circuit, such as is largely multiplexed third party's IP kernel in the design phase, in the fabrication process
There are incredible mask plates, and there may be redundancy encapsulation etc. in encapsulation process.This kind of security threat is all referred to as hardware wood
Horse, hardware Trojan horse penetrate in terms of bottom hardware, and attacker is cleverly designed for specific system, hidden in electricity
The bottom on road, can independent implementation attack, such as change function, leakage information, privilege upgrading, refusal service etc.,
Attack can be combined in conjunction with software attacks.
Hardware Trojan horse problem is becoming the important safety hidden danger of integrated circuit, once the chip quilt influenced by hardware Trojan horse
Applied in military hardware and national economy core realm, it will serious disaster and imponderable economic loss are brought, because
This carry out hardware Trojan horse detection and guard technology study, guarantee integrated circuit it is secure and trusted be countries in the world common concern
Topic.
In recent years, gradually go deep into research, brilliant achievement is achieved in terms of hardware Trojan horse detection technique.And side
Multiple Channel Analysis has lower implementation cost, higher detection accuracy, preferable transplantability and ductility, just shows once proposition
More optimistic application prospect has been come out, the mainstream of current detection method is become.Hardware Trojan horse based on side Multiple Channel Analysis
Detection method depends critically upon the presence of credible maternal circuit, and the side channel by comparing credible maternal circuit and circuit under test is believed
The difference of breath, to differentiate whether chip to be measured contains hardware Trojan horse.However in practice due to the uncontrollable of chip supply chain and
Credible chip verifies the cost of great number, and the acquisition of credible female parent circuit is extremely difficult, therefore using the design data of chip, establishes
Credible side channel reference model has the development of hardware Trojan horse detection technique important just without the maternal chip actually manufactured
Meaning.
In terms of the channel information emulation of side, power consumption and delay etc. have mature eda tool and policy method and utilize.?
In terms of Electromagnetic Simulation, the calculating of integrated circuit electromagnetic radiation is directly carried out using business softwares such as existing ANSYS, needs to expend
The excessively high time and resources costs.In addition pass through the retrieval of pertinent literature and patent, there has been no related mature electromagnetism sides at present
Information channel simulation method is delivered
In order to quickly obtain the side channel simulation model of credible maternal circuit, saves the time and resources costs, this patent mention
A kind of electromagnetism side channel modeling method based on space electric dipole array out.RTL code is carried out using selected technology library
Chip layout is obtained after comp comprehensive layout's wiring, extracts net meter file and parasitic parameter file, is carried out using Hspice simulation software
Current simulations obtain the current waveform file of each circuit node, establish equivalent electric dipole array, calculate equivalent eelctric dipole submatrix
The time domain electromagnetic of column radiates, and obtains electromagnetism side channel time domain trust model.
(3) bibliography
[1]Peeters E,Standaert F X,Quisquater J J.Power and electromagnetic
analysis:Improved model,consequences and comparisons[J].Integration the Vlsi
Journal,2007,40(1):52-60.
[2] Wang Zheng collection, Liu Zhu, recruit ocean, wait digital integrated electronic circuit electromagnetic field model extracting method [C] of the based on GDS //
2015 Chinese electromagnetic compatibility conference collection of thesis .2015:11-15.
[3]Smith K,M.Methodology for simulated power analysis attacks
on AES[C]//Military Communications Conference,2010-Milcom.IEEE,2010:1292-
1297.
[4]Yoshikawa M,Asai T.Platform for Verification of Electromagnetic
Analysis Attacks against Cryptographic Circuits[C]//International Conference
on Information Technology:New Generations.IEEE Computer Society,2013:653-658.
[5]A.Kumar,C.Scarborough,A.Yilmaz and M.Orshansky,"Efficient
simulation of EM side-channel attack resilience,"2017IEEE/ACM International
Conference on Computer-Aided Design(ICCAD),Irvine,CA,2017,pp.123-130。
Summary of the invention
In order to overcome the deficiencies of the prior art, the present invention is directed to propose electromagnetism side channel modeling method, this method can assist
For the hardware Trojan horse detection field based on side Multiple Channel Analysis, the time for obtaining credible female parent and resources costs are reduced, have one
Fixed practical significance and reference value.For this reason, the technical scheme adopted by the present invention is that the electromagnetism based on space electric dipole array
Side channel modeling method, steps are as follows:
Step 1: carrying out the emulation of transistor level transient current using Hspice simulation software, obtain the instantaneous of each branch current
Electric current；
Step 2: extracting the spatial positional information of each layer branch current using chip layout data, establish space electric dipole
Array Model；
Step 3: calculating the electromagnetic radiation of space electric dipole array, obtain the electromagnetism side channel time domain wave of integrated circuit
Shape.
Step 1 specifically refines as follows:
Step 1: logic synthesis being carried out to chip RTL code using selected technology library, generates chip version after placement-and-routing
Figure；
Step 2: extracting the ideal net meter file of domain, and extract domain using StarRCXT parasitic parameter extracting tool
Resistance and capacitive parasitic parameter；
After step 3:RC parasitic parameter reactionary slogan, anti-communist poster ideal net meter file, the circuit for carrying out transistor level using Hspice software is imitative
Very, the transient current variation file of each node of circuit is obtained.
Specifically refinement is as follows for step 2:
Step 1: in placement-and-routing's stage, extracting the physical message of each layer of chip, including placement position and wiring direction；
Step 2: by each layer physical message mark into branch current obtained in Hspice current simulations, obtaining chip version
Scheme the current distribution model of each layer；
Step 3: current source being equivalent to by electric dipole based on Biot-Savart law, and then establishes the equivalent sky of domain
Between electric dipole Array Model.
Further, it is radiated by the side channel electromagnetic that the superposition of the electromagnetic field of each space electric dipole can be obtained chip
The radiation formula of information, electric dipole is as follows:
Wherein, electric dipole length is l, and I is electric current on electric dipole,For observation point spherical coordinate system coordinate
Component,For magnetic-field component, and Er、EθFor electric field component.
The features of the present invention and beneficial effect are:
The present invention is based on electric dipole model opposite side channel electromagnetic information to be modeled, and posts first with chip layout extraction
Parameter information is given birth to, is imitated after progress Hspice domain and obtains each layer transient state branch current.The space for including using placement-and-routing's process
Physical message, obtains the position coordinates of each branch current, and then establishes space plane current distribution model.Finally utilize eelctric dipole
Submodel establishes corresponding space electric dipole array, and the electromagnetic radiation by calculating electric dipole array obtains the electromagnetism of chip
Side channel information.This method emulates electromagnetism side channel information using chip initial data, is based on as credible reference model
The hardware Trojan horse of side Multiple Channel Analysis detects, and without the maternal chip actually manufactured, relieves Current hardware Trojan Horse Detection pair
The dependence of maternal chip is of great significance to the development of hardware Trojan horse detection technique.
Detailed description of the invention:
Fig. 1 domain current simulations flow chart.
The flow chart of the space Fig. 2 electric dipole array modeling methods.
The radiation schematic diagram of Fig. 3 electric dipole.
Specific embodiment
The present invention problem difficult for maternal acquisition credible in the hardware Trojan horse detection process based on side Multiple Channel Analysis,
A kind of electromagnetism side channel modeling method based on space electric dipole array is proposed, i.e., circuit node is equivalent to eelctric dipole
Son, and current simulations are carried out using the parasitic parameter file extracted, the current excitation source of each electric dipole is obtained, and then establish core
The equivalent electric dipole array of piece domain, the electromagnetic radiation by calculating equivalent electric dipole array obtain circuit electromagnetism side channel
Time domain waveform.This method can assist reducing for the hardware Trojan horse detection field based on side Multiple Channel Analysis and obtaining credible female parent
Time and resources costs, have certain practical significance and reference value.
Complete technical solution of the invention is as follows:
Electromagnetism side channel modeling method based on space electric dipole array mainly comprises the steps that
Step 1: carrying out the emulation of transistor level transient current using Hspice simulation software, obtain the instantaneous of each branch current
Electric current.
Step 2: extracting the spatial positional information of each layer branch current using chip layout data, establish space electric dipole
Array Model.
Step 3: calculating the electromagnetic radiation of space electric dipole array, obtain the electromagnetism side channel time domain wave of integrated circuit
Shape.
Control unit of the electromagnetic radiation source in integrated circuit, the port I/O, data processing or other parts electric current stream
It is dynamic.By taking phase inverter as an example, when a bit is flipped, a bit of time can be connected in the NMOS tube and PMOS tube of phase inverter,
This results in a short-time current pulse from VDD to VSS, this electric current can generate the electromagnetism of a variation around chip
?.In addition, when input is flipped, parasitic capacitance can be according to different input signals due to the switching characteristic of digital circuit
Charge and discharge are carried out, charging and discharging currents are formed.Under the action of these, metallic conductor constantly generates electromagnetic radiation.
In view of the metal layer of chip, the metal layer length of integrated circuit is all on the micron order of magnitude and much smaller than electromagnetism
The wavelength of radiation can be equivalent to an electric dipole.Metal layer just has electric current in chip operation and passes through, by electromagnetic radiation
Known to principle, each section of metal layer is exactly an electrical dipole antenna to spatial emission electromagnetic radiation.Therefore of the invention by domain
On the curent change of each branch be equivalent to equivalent electric dipole array, calculate the electromagnetism side channel information that integrated circuit generates.
Fig. 1 is the flow chart of amperometry involved in technical solution, and main process is as follows:
Step 1: logic synthesis being carried out to chip RTL code using selected technology library, generates chip version after placement-and-routing
Figure.
Step 2: extracting the ideal net meter file of domain, and extract domain using StarRCXT parasitic parameter extracting tool
RC (resistance and capacitor) parasitic parameter.
After step 3:RC parasitic parameter reactionary slogan, anti-communist poster ideal net meter file, the circuit for carrying out transistor level using Hspice software is imitative
Very, the transient current variation file of each node of circuit is obtained.
Fig. 2 is the flow chart of space electric dipole array method for building up involved in technical solution, mainly includes following step
It is rapid:
Step 1: in placement-and-routing's stage, extracting the physical message of each layer of chip, including placement position and wiring direction etc..
Step 2: by each layer physical message mark into branch current obtained in Hspice current simulations, obtaining chip version
Scheme the current distribution model of each layer.
Step 3: current source being equivalent to by electric dipole based on Biot-Savart law, and then establishes the equivalent sky of domain
Between electric dipole Array Model.
Since the transient state branch current on domain is equivalent to space electric dipole, in this way, each electric dipole can produce
Raw respective electromagnetic field can be obtained the side channel electromagnetic radiation letter of chip by the superposition of the electromagnetic field of each space electric dipole
Breath.The radiation formula of electric dipole is as follows:
Wherein, electric dipole length is l, and I is electric current on electric dipole,For observation point spherical coordinate system coordinate
Component,For magnetic-field component, and Er、EθFor electric field component.
The radiation schematic diagram of electric dipole is shown in Fig. 3.
Claims (4)
1. a kind of electromagnetism side channel modeling method based on space electric dipole array, characterized in that steps are as follows:
Step 1: carrying out the emulation of transistor level transient current using Hspice simulation software, obtain the instantaneous electricity of each branch current
Stream；
Step 2: extracting the spatial positional information of each layer branch current using chip layout data, establish space electric dipole array
Model；
Step 3: calculating the electromagnetic radiation of space electric dipole array, obtain the electromagnetism side channel time domain waveform of integrated circuit.
2. as described in claim 1 based on the electromagnetism side channel modeling method of space electric dipole array, characterized in that step
1 specifically refine it is as follows:
Step 1): logic synthesis is carried out to chip RTL code using selected technology library, generates chip layout after placement-and-routing；
Step 2): extracting the ideal net meter file of domain, and the electricity of domain is extracted using StarRCXT parasitic parameter extracting tool
Resistance and capacitive parasitic parameter；
Step 3): after resistance and capacitive parasitic parameter reactionary slogan, anti-communist poster ideal net meter file, transistor level is carried out using Hspice software
Circuit simulation obtains the transient current variation file of each node of circuit.
3. as described in claim 1 based on the electromagnetism side channel modeling method of space electric dipole array, characterized in that step
2 specific refinements are as follows:
Step 1): in placement-and-routing's stage, the physical message of each layer of chip, including placement position and wiring direction are extracted；
Step 2): by each layer physical message mark into branch current obtained in Hspice current simulations, chip layout is obtained
The current distribution model of each layer；
Step 3): being equivalent to electric dipole for current source based on Biot-Savart law, and then establishes the equivalent space electricity of domain
Dipole array model.
4. as described in claim 1 based on the electromagnetism side channel modeling method of space electric dipole array, characterized in that into one
Step ground obtains the side channel electromagnetic radiation information of chip by the superposition of the electromagnetic field of each space electric dipole, electric dipole
Radiation formula is as follows:
Wherein, electric dipole length is l, and I is electric current on electric dipole,For observation point spherical coordinate system coordinate components,For magnetic-field component, and Er、EθFor electric field component.
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Application publication date: 20190416 |