CN109617666B - Feedforward timing method suitable for continuous transmission - Google Patents

Feedforward timing method suitable for continuous transmission Download PDF

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CN109617666B
CN109617666B CN201910095046.9A CN201910095046A CN109617666B CN 109617666 B CN109617666 B CN 109617666B CN 201910095046 A CN201910095046 A CN 201910095046A CN 109617666 B CN109617666 B CN 109617666B
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timing
data
value
interpolation filter
error value
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CN109617666A (en
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寇辰光
陈敬乔
李勇
王赛宇
尚春杰
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CETC 54 Research Institute
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0016—Arrangements for synchronising receiver with transmitter correction of synchronization errors
    • H04L7/002—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation
    • H04L7/0029—Arrangements for synchronising receiver with transmitter correction of synchronization errors correction by interpolation interpolation of received data signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0054—Detection of the synchronisation error by features other than the received signal transition
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/0079—Receiver details
    • H04L7/0087—Preprocessing of received signal for synchronisation, e.g. by code conversion, pulse generation or edge detection

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The invention discloses a feedforward timing method suitable for continuous transmission, and belongs to the technical field of signal processing of communication systems. The invention reflects the timing error to the subsequent step by a feedforward mode, interpolates the current sampling value by using an interpolation filter, and obtains approximate optimal sampling points as far as possible so as to achieve the aim of accurate timing synchronization of continuous signals. Compared with a feedback structure for timing synchronization of continuous signals, the feedback structure has the characteristic of simple structure, simplifies the processing flow, and solves the timing problem of continuous transmission while reducing the implementation complexity. The method also has the advantages of stability, reliability, strong portability, easy popularization and the like, and is particularly suitable for timing synchronization of symbols in the continuous transmission process.

Description

Feedforward timing method suitable for continuous transmission
Technical Field
The invention relates to the technical field of signal processing, in particular to a feedforward timing method suitable for continuous transmission.
Background
Symbol timing synchronization is a key link for signal demodulation of a receiving end and is an important premise for correct demodulation. Inaccurate timing synchronization can lead to degradation of demodulation performance, and in severe cases, even failure to perform proper demodulation. The accurate timing synchronization can obtain the optimal sampling point of the code element symbol, and a reliable reference is provided for the subsequent demodulation step.
The current timing synchronization method can be mainly divided into a feedback structure and a feedforward structure according to different implementation structures. The feedback structure adopts the related principle of the phase-locked loop, can obtain more accurate timing according to the feedback loop, and has stable work. However, this structure is relatively complex to implement and consumes a long locking time, and thus is not suitable for timing recovery of burst signals, which is generally used for continuous signal timing. Compared with a feedback structure, the feedforward structure is an open-loop structure, does not depend on the design of a feedback loop, can quickly track the phase change of the symbol, and has the advantage of short acquisition time. The feedforward structure can be divided into two methods of directly extracting the optimal sampling point according to the timing error and obtaining the optimal sampling point by interpolation filtering according to the timing error. The feedforward method of performing interpolation filtering to obtain the optimal sampling point is difficult to implement when processing the timing synchronization of continuous signals, and is therefore mostly used for the timing synchronization of burst communication signals.
Disclosure of Invention
The technical problem to be solved by the present invention is to avoid the above disadvantages in the background art, and to provide a feedforward timing method suitable for continuous transmission. The invention reflects the timing error to the subsequent step by a feedforward mode, interpolates the current sampling value by using an interpolation filter, obtains approximate optimal sampling points as far as possible, and solves the timing problem of continuous transmission while reducing the realization complexity. The invention has the characteristics of stable and reliable performance, high timing accuracy and low complexity.
The purpose of the invention is realized as follows:
a feed forward timing method for continuous transmission, comprising the steps of:
(1) the data after the matched filtering of the receiving end passes through a timing error detection module, and a timing error value is obtained through calculation according to the following formula
Figure BDA0001964286520000021
Figure BDA0001964286520000022
Wherein, L represents the observation length of each calculation error, N represents the number of sampling points of each symbol, m represents the current m-th observation length, rkIndicating the kth sample point of the data, k is 0,1,2, …, N-1,
Figure BDA0001964286520000023
is represented by rkComplex conjugate of (a), arg (·) denotes the operation of obtaining the phase, e is the base of the natural logarithm, j is the unit of imaginary number;
(2) will be the timing error value
Figure BDA0001964286520000024
Quantized to obtain an error value
Figure BDA0001964286520000025
Figure BDA0001964286520000026
Will be provided with
Figure BDA0001964286520000027
Sending the data to an address mapping module, and obtaining an address value addr required by the coefficient storage module according to the following formula:
Figure BDA0001964286520000031
wherein INT (-) represents quantizing the parameter into integer, INTtobit (-) represents obtaining binary representation corresponding to the parameter;
(3) will be provided with
Figure BDA0001964286520000032
Each within the range
Figure BDA0001964286520000033
Corresponding interpolation filter coefficient C-2、C-1、C0、C1Carry out quantization rounding according to
Figure BDA0001964286520000034
Corresponding addresses addr 'are respectively stored in four ROMs of the coefficient storage module, the addr' being in binary form
Figure BDA0001964286520000035
The interpolation filter coefficient is obtained according to a Lagrange cubic interpolation filter coefficient calculation formula:
C-2＝μ3/6-μ/6,
C-1＝-μ3/2+μ2/2+μ,
C0＝μ3/2-μ2-μ/2+1,
C1＝-μ3/6+μ2/2-μ/3
wherein,
Figure BDA0001964286520000036
(4) reading a ROM table value from the coefficient storage module according to the address value addr obtained in the step (2) to obtain four corresponding interpolation filter coefficients;
(5) error value of
Figure 1
Sending to a data selection module according to the error value
Figure 2
Obtaining a symbol clock; selecting four data r needing interpolation filtering from the buffer at the rising edge of the symbol clockm-1、rm、rm+1、rm+2(ii) a Phase and error value of symbol clock
Figure BDA0001964286520000039
The relationship of (a) to (b) is as follows:
Figure BDA0001964286520000041
(6) carrying out interpolation filtering according to the interpolation filter coefficient obtained in the step (4) and the data obtained in the step (5) to obtain an optimal sampling value yn：
Figure BDA0001964286520000042
The timing synchronization of the continuous signals is completed.
Compared with the background technology, the invention has the following advantages:
1. the invention adopts an interpolation filtering mode, and the timing accuracy is improved compared with the timing of directly selecting sampling points.
2. The invention adopts a design method of feeding forward the timing error, reduces the processing flow with complex feedback structure and shortens the locking time.
3. On the basis of a feed-forward structure, the invention generates the symbol clocks with different phases according to the timing error, and can realize accurate timing of continuous signals.
4. The invention has stable and reliable performance, simple structure, low realization complexity, strong transportability and popularization and application value.
Drawings
Fig. 1 is a schematic diagram of an embodiment of the present invention.
FIG. 2 is a diagram of a distribution of quantized timing error ranges in a timing method according to an embodiment of the present invention.
FIG. 3 is a schematic diagram illustrating a relationship between a symbol clock and interpolation filter data in the timing method according to the embodiment of the present invention.
Detailed Description
Referring to fig. 1 to 3, a feed forward timing method for continuous transmission, which performs accurate symbol timing synchronization on a signal at a signal receiving end. Fig. 1 is a schematic diagram of a principle of feedforward timing synchronization based on interpolation filtering in the method, and as can be seen from fig. 1, the method is simple to implement and low in complexity. Fig. 2 is a diagram of a quantization timing error range distribution in the timing method, and a plurality of parameters such as symbol clocks of different phases and address values of a filter coefficient memory can be obtained according to the range of the quantization timing error. FIG. 3 is a schematic diagram of the relationship between the symbol clock and the interpolation filter data in the timing method, T in FIG. 3iRepresenting a data sampling period; after the symbol clock is obtained according to the timing error and the sampling clock, the data to be filtered can be obtained under the symbol clock.
Specifically, the method comprises the following steps:
(1) the data after the matched filtering of the receiving end passes through a timing error detection module, and a timing error value is obtained through calculation according to the following formula
Figure BDA0001964286520000051
Figure BDA0001964286520000052
In the embodiment, the observation length L is set to 1024, the number N of sampling points of each symbol is set to 4, and the continuous signals after matched filtering are segmented and subjected to timing error estimation according to the timing error estimation algorithm in the timing error detection module to obtain a timing error value
Figure BDA0001964286520000053
(2) Will be the timing error value
Figure BDA0001964286520000054
Quantized to obtain an error value
Figure BDA0001964286520000055
Figure BDA0001964286520000056
Will be provided with
Figure BDA0001964286520000057
Sending the data to an address mapping module, and obtaining an address value addr required by the coefficient storage module according to the following formula:
Figure BDA0001964286520000061
wherein INT (-) represents quantizing the parameter into integer, INTtobit (-) represents obtaining binary representation corresponding to the parameter;
the step is based on the timing error value obtained in (1)
Figure BDA0001964286520000062
Obtaining the error value after quantization
Figure BDA0001964286520000063
And according to the error value
Figure BDA0001964286520000064
Mapping the address value addr of a ROM table in a coefficient storage module;
(3) is calculated to obtain
Figure BDA0001964286520000065
Each within the range
Figure BDA0001964286520000066
Corresponding interpolation filter coefficient C-2、C-1、C0、C1The interpolation filter coefficient is quantized and rounded and is respectively stored in four storage ROMs of a coefficient storage module, and a storage address addr' is in a binary form
Figure BDA0001964286520000067
Then the integer value range of addr' is (-128, -127, … 126,127, 126, 127); the interpolation filter coefficients can be obtained according to a lagrangian cubic interpolation filter coefficient calculation formula:
Figure BDA0001964286520000068
wherein,
Figure BDA0001964286520000069
the step is to determine the timing error value
Figure BDA00019642865200000610
The decimal interval mu is calculated in the range of (2), and then the coefficient C of the interpolation filter is obtained according to the decimal interval mu-2、C-1、C0、C1Then storing the coefficients in four ROM tables respectivelyCorresponding to the address addr';
(4) sending the address value addr into a filter coefficient storage module, and reading a ROM table value according to the address value addr to obtain a corresponding interpolation filter coefficient;
(5) will be the timing error value
Figure BDA0001964286520000071
Sending to a data selection module according to the error value
Figure BDA0001964286520000072
Obtaining a symbol clock; selecting four data r needing interpolation filtering from the buffer at the rising edge of the symbol clockm-1、rm、rm+1、rm+2(ii) a Phase and timing error values of a symbol clock
Figure BDA0001964286520000073
The relationship of (a) to (b) is as follows:
Figure BDA0001964286520000074
in this step, the sampling clock and the timing error value are used
Figure BDA0001964286520000075
Obtaining a symbol clock, wherein different timing errors correspond to different phases of the symbol clock; selecting four data r in a data buffer on rising edges of a symbol clockm-1、rm、rm+1、rm+2The data is the data value of the current to-be-interpolated filtering, and the method can ensure that the continuous signals still provide accurate interpolation filtering data values at the switching points of different observation windows;
(6) carrying out interpolation filtering according to the interpolation filter coefficient obtained in the step (4) and the data obtained in the step (5), and obtaining an optimal sampling value y through the following formula calculationn；
Figure BDA0001964286520000076
At this point, timing synchronization of the continuous signal is completed.
The invention reflects the timing error to the subsequent step by a feedforward mode, interpolates the current sampling value by using an interpolation filter, and obtains approximate optimal sampling points as far as possible so as to achieve the aim of accurate timing synchronization of continuous signals. Compared with a feedback structure for timing synchronization of continuous signals, the feedback structure has the characteristic of simple structure, simplifies the processing flow, and solves the timing problem of continuous transmission while reducing the implementation complexity. The method also has the advantages of stability, reliability, strong portability, easy popularization and the like, and is particularly suitable for timing synchronization of symbols in the continuous transmission process.

Claims (1)

1. A feed forward timing method for continuous transmission, comprising the steps of:
(1) the data after the matched filtering of the receiving end passes through a timing error detection module, and a timing error value is obtained through calculation according to the following formula
Figure FDA0002855353180000011
Figure FDA0002855353180000012
Wherein, L represents the observation length of each calculation error, N represents the number of sampling points of each symbol, m represents the current m-th observation length, rkIndicating the kth sample point of the data, k is 0,1,2, …, N-1,
Figure FDA0002855353180000013
is represented by rkComplex conjugate of (a), arg (·) denotes the operation of obtaining the phase, e is the base of the natural logarithm, j is the unit of imaginary number;
(2) will be the timing error value
Figure FDA0002855353180000014
Quantized to obtain an error value
Figure FDA0002855353180000015
Figure FDA0002855353180000016
Will be provided with
Figure FDA0002855353180000017
Sending the data to an address mapping module, and obtaining an address value addr required by the coefficient storage module according to the following formula:
Figure FDA0002855353180000018
wherein INT (-) represents quantizing the parameter into integer, INTtobit (-) represents obtaining binary representation corresponding to the parameter;
(3) will be provided with
Figure FDA0002855353180000019
Each within the range
Figure FDA00028553531800000110
Corresponding interpolation filter coefficient C-2、C-1、C0、C1Carry out quantization rounding according to
Figure FDA00028553531800000111
Corresponding addresses addr 'are respectively stored in four ROMs of the coefficient storage module, the addr' being in binary form
Figure FDA0002855353180000021
The interpolation filter coefficient is obtained according to a Lagrange cubic interpolation filter coefficient calculation formula:
C-2＝μ3/6-μ/6,
C-1＝-μ3/2+μ2/2+μ,
C0＝μ3/2-μ2-μ/2+1,
C1＝-μ3/6+μ2/2-μ/3
wherein,
Figure FDA0002855353180000022
(4) reading a ROM table value from the coefficient storage module according to the address value addr obtained in the step (2) to obtain four corresponding interpolation filter coefficients;
(5) error value of
Figure FDA0002855353180000023
Sending to a data selection module according to the error value
Figure FDA0002855353180000024
Obtaining a symbol clock; selecting four data r needing interpolation filtering from the buffer at the rising edge of the symbol clockm-1、rm、rm+1、rm+2(ii) a Phase and error value of symbol clock
Figure FDA0002855353180000025
The relationship of (a) to (b) is as follows:
Figure FDA0002855353180000026
(6) carrying out interpolation filtering according to the interpolation filter coefficient obtained in the step (4) and the data obtained in the step (5) to obtain an optimal sampling value yn：
Figure FDA0002855353180000027
The timing synchronization of the continuous signals is completed.
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