CN109600115B - Method for locating faults in series-connected photovoltaic power generation system - Google Patents

Method for locating faults in series-connected photovoltaic power generation system Download PDF

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CN109600115B
CN109600115B CN201710917375.8A CN201710917375A CN109600115B CN 109600115 B CN109600115 B CN 109600115B CN 201710917375 A CN201710917375 A CN 201710917375A CN 109600115 B CN109600115 B CN 109600115B
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CN109600115A (en
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张永
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Fonrich Shanghai New Energy Technology Co ltd
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02SGENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
    • H02S50/00Monitoring or testing of PV systems, e.g. load balancing or fault identification
    • H02J3/383
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/56Power conversion systems, e.g. maximum power point trackers

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Abstract

The invention mainly relates to a method for positioning faults in a series photovoltaic power generation system, which comprises the steps that a plurality of stages of power optimizers are connected in series and provide electric energy for an inverter to invert direct current to alternating current; each stage of power optimizer is used for executing maximum power point tracking on the photovoltaic component matched with the power optimizer. And detecting the potential of the output end of each stage of power optimizer for outputting power, and comparing the potential of the output end of each stage of power optimizer with the potential of the output end of the power optimizer of the previous stage, wherein when the potential of the output end of any stage of power optimizer is lower than the potential of the output end of the power optimizer of the previous stage, the position of the fault event is judged to occur at the power optimizer of any stage.

Description

Method for locating faults in series-connected photovoltaic power generation system
Technical Field
The invention mainly relates to the field of photovoltaic power generation, and particularly provides a method for positioning faults in a photovoltaic power generation system comprising a series power optimizer or other similar power equipment.
Background
The DC system for power generation and transformation is the working power supply of control and signal system, relay protection and automatic device, and also has the function of emergency power supply. Taking photovoltaic power generation as an example, the whole direct current system comprises a multi-branch network, and along with the improvement of the requirements of an owner on power supply quality and power supply reliability, the safe and reliable operation of the direct current system is more important to the reliability and stability of power supply of the power system. The dc system mainly includes a charging device, a battery pack, a voltage stabilizer, an inverter, and a dc network. The number of photovoltaic module arrays of a photovoltaic power station and the distributed regional distribution of the photovoltaic module arrays are huge, a centralized power station is particularly obvious, the important means for improving the reliability of a direct current network is to perform online monitoring and grounding line selection on the insulation of the whole network so as to find the insulation defect of the direct current system in time, and a battery string group formed by photovoltaic modules is an object which is mainly monitored by a proprietor, so that the insulation fault of the direct current system is prevented. Currently, there are several main methods for insulation monitoring and ground line selection of a dc system: the bridge balance principle or the method of injecting low-frequency signals is adopted. The insulation state of the direct current system is directly related to the reliability of the operation of the direct current system, so that the online accurate monitoring of the insulation resistance value of the system is very important, most photovoltaic power stations are located in the field, and the positioning of the insulation fault of power equipment is more important. The direct current systems of the power industry involve direct currents which are mostly operated floating relative to earth or are operated with a neutral point grounded. When the direct current system wants to operate reliably, the insulation condition of the positive pole and the negative pole of a bus and a branch of the system to the ground must be monitored on line in real time, and how to give an insulation fault point when the insulation resistance to the ground is too low can cause serious faults is desirable.
Another embodiment of the reliability and safety of the busbar or branch of the photovoltaic module in the photovoltaic power station is: efforts are made to avoid arcing in the system. There is currently no satisfactory solution for how to handle arcs when they occur. When a sufficiently high voltage is generated between two electrodes of some electrical equipment or cables, etc., an arc may be initiated. The voltage may cause ionization of the gas, typically air, between the electrodes, a plasma is gradually formed, and a current may flow between the electrodes. Such plasmas may heat up to several thousand degrees celsius, causing a representative bright arc to occur. Such high temperature temperatures may cause damage to the system and in extreme cases even fire the system or nearby equipment. There are two different types of arcs in the system as a whole: parallel arcs and series arcs. Parallel arcs occur between the positive and negative poles of the system or between one of the two poles and ground. In contrast, a series arc does not occur between two different lines or branches, but rather within the same current conducting line, i.e. between two sections or two partial segments of the same line. Serial arcs generally occur when the current in a line is interrupted, such as by opening a contact switch or in the event of a break in a plug, cable, etc. According to engineering experience: problems of connecting equipment, such as the pressure welding force can not meet the requirement and the connector is damaged; the joints of terminals, connector lugs, fuses and the like are not pressed; the connection position of the two terminals is oxidized for a long time, and the bolt is not screwed; reduced insulation of the connecting wires or cables; construction quality is not too close, a crimping line is not good or a terminal is not firmly fixed; problems with equipment insulation, etc.; the foregoing problems may cause arcing. By statistics the vast majority of station fires are caused by dc arcs and it is therefore desirable to give an arc fault point.
Disclosure of Invention
In an optional, but not required, embodiment of the present application, a method of locating faults in a tandem-type photovoltaic power generation system is disclosed: a plurality of first devices connected in series in a cascade fashion and forming a link, each first device for transferring electrical energy received at its input from one of the photovoltaic modules to its output for providing output power; the method comprises the following steps: detecting the output end potential of each first device; comparing the output end potential of each first device with the output end potential of the first device at the previous stage; when the output end potential of any one first device is detected to be lower than the output end potential of the first device at the previous stage, the position of the fault event is judged to occur at the any one first device.
The method described above, wherein: said first device is a bypass means: the photovoltaic module is used for bypassing the corresponding photovoltaic module and forbidding the supply of the electric energy into the link, or is used for switching the corresponding photovoltaic module from the bypass state to the access state and supplying the electric energy into the link.
The method described above, wherein: the first device is a power optimizer: for setting the output power of the one photovoltaic module corresponding thereto at the maximum power point.
The method described above, wherein: the fault event includes at least one of a fault arc, an insulation to ground fault, and a bad contact fault. The contact failure fault is, for example, a fault caused by a contact failure between the second output terminal of the first device of the preceding stage and the first output terminal of the succeeding stage.
The method described above, wherein: when a plurality of first devices are connected in series, the output end potential of the first device is lowest and the output end potential of the last first device is highest.
The method described above, wherein: the fault event is detected globally over a dc bus connecting a plurality of first devices in series without the need to detect at the output of each first device individually.
The method described above, wherein: the insulation state of the direct current bus is represented by the earth insulation leakage resistance value; the value of the insulation leakage resistance to the ground is equal to the voltage to the ground of the direct current bus divided by the current to the ground drain.
The method described above, wherein: each first device comprises first and second outputs for providing output power; when a plurality of first devices are connected in series, the second output terminal of any previous first device is coupled to the first output terminal of an adjacent subsequent first device; wherein the first output terminal of the first device as the leading one has the lowest potential; and the second output terminal of the first device as the last of the ends is at the highest potential; so that the plurality of first devices provides a total string voltage equal to a sum of voltages between the first output terminal of the first device and the second output terminal of the last first device among the plurality of first devices.
The method described above, wherein: the manner of detecting the output terminal potential for each first device to output power includes: the respective potentials of the first and second output terminals of each of the first devices are simultaneously detected.
The method described above, wherein: detecting the failure event of any one of the first devices comprises: and detecting whether the potential of the first output end of the first-stage output circuit is continuously equal to the potential of the second output end of the first-stage output circuit, and/or detecting whether the potential of the second output end of the first-stage output circuit is continuously higher than the potential of the second output end of the first-stage output circuit.
The method described above, wherein: detecting the failure event of any one of the first devices comprises: whether the potential of the first output terminal is lower than that of the second output terminal is detected.
In an optional, but not required, embodiment of the present application, a method of locating a fault in a tandem power optimizer system is disclosed, the method comprising: the multistage power optimizer is connected in series and provides electric energy for the inverter to invert direct current to alternating current; each stage of power optimizer is used for tracking the maximum power point of a photovoltaic module matched with the power optimizer; the method comprises the following steps: detecting the potential of an output end of each stage of power optimizer for outputting power; comparing the output end potential of each stage of power optimizer with the output end potential of the previous stage of power optimizer; when the output end potential of any stage of power optimizer is lower than that of the previous stage of power optimizer; thereby determining the location of the fault event occurring at the arbitrary level power optimizer.
The method described above, wherein: the fault event includes at least a fault arc event and/or a ground isolation fault event.
The method described above, wherein: when the multistage power optimizers are connected in series, the output end potential of the first stage power optimizer is lowest, and the output end potential of the last stage power optimizer is highest.
The method described above, wherein: the fault arc event is detected entirely on the dc bus connecting the multiple stages of power optimizers in series without the need to separately detect at the output of each stage of power optimizers.
The method described above, wherein: ground isolation fault events are detected collectively on a dc bus connecting multiple stages of power optimizers in series without the need to separately detect at the output of each stage of power optimizers.
The method described above, wherein: the insulation state of the direct current bus is represented by the earth insulation leakage resistance value; the value of the insulation leakage resistance to the ground is equal to the voltage to the ground of the direct current bus divided by the current to the ground drain.
The method described above, wherein: each stage of the power optimizer comprises a first output end and a second output end for outputting power; when the multistage power optimizers are connected in series, the second output end of any previous stage power optimizer is coupled to the first output end of the adjacent next stage power optimizer; wherein the first output terminal of the first-stage power optimizer is the lowest in potential; and the potential of the second output end of the power optimizer at the last stage at the end is highest; so that the total string voltage provided by the multi-stage power optimizer is equal to the sum of the voltages between the first output terminal of the first stage power optimizer and the second output terminal of the last stage power optimizer.
The method described above, wherein: detecting the mode of the output end potential of each stage of power optimizer for outputting power: and simultaneously detecting the respective potentials of the first output end and the second output end of each stage of the power optimizer.
The method described above, wherein: detecting a fault arc event for any one of the power optimizers includes detecting whether a first output terminal of the fault arc event is continuously equal to a second output terminal of the front power optimizer and/or detecting whether a second output terminal of the fault arc event is continuously higher than the second output terminal of the front power optimizer.
The method described above, wherein: detecting the ground insulation fault event of any one stage of power optimizer comprises detecting whether the first output end of the power optimizer is continuously the same as the second output end of the preceding stage power optimizer or not and/or detecting whether the second output end of the power optimizer is continuously higher than the second output end of the preceding stage power optimizer or not. Or: detecting a fault arc event for any stage of the power optimizer includes detecting whether the potential of its first output is lower than the potential of its second output. Or: detecting an insulation-to-ground fault event of any stage of the power optimizer includes detecting whether the potential of the first output terminal of the power optimizer is lower than the potential of the second output terminal of the power optimizer.
Drawings
To make the above objects, features and advantages more comprehensible, embodiments accompanied with figures are described in detail below, and features and advantages of the present application will become apparent upon reading the following detailed description and upon reference to the following figures.
Fig. 1 is an exemplary schematic diagram of an inverter powered by a series of multiple photovoltaic cells.
Fig. 2 is an exemplary schematic diagram of fault arc detection on the photovoltaic cell side.
FIG. 3 is a schematic diagram of a DC and leakage current model between the inverter system and the ground.
Fig. 4 is an exemplary diagram illustrating detection of leakage current on one side of a photovoltaic cell.
Fig. 5 is a schematic view showing the uniqueness in which an arc is detected only on the dc bus side.
Fig. 6 is a schematic view showing that insulation is detected only on the dc bus side in a single manner.
Fig. 7 is an example of a voltage converter using buck-boost as a power optimizer.
Fig. 8 is a bypass device that can bypass the photovoltaic module instead of the power optimizer.
Detailed Description
The technical solutions of the present invention will be clearly and completely described below with reference to various embodiments, but the described embodiments are only used for describing and illustrating the present invention and not for describing all embodiments, and the solutions obtained by those skilled in the art without making creative efforts belong to the protection scope of the present invention.
In a complete system of photovoltaic power generation, a core component usually consists of a panel array and a power inversion part, a low-frequency isolation transformer is arranged between an inverter and a mains supply alternating current network in a conventional scheme to realize the electrical isolation of a grid-connected part and a panel array, and the photovoltaic power generation system has the advantages of ensuring the safety of contact people and providing voltage matching and separation and inhibition of the direct current quantity of the current of the mains supply entering the network; the disadvantage is that the low frequency transformer causes extra costs in terms of grid construction cost and volume and weight, while being very low in conversion efficiency for conversion, the compromise advantages and disadvantages, while serving as an isolation, are not a good choice for the whole photovoltaic power generation system. In contrast, the non-isolated grid-connected inverter generally does not need any high-frequency or low-frequency transformer or equivalent equipment, so that the power conversion efficiency is very high, and the non-isolated grid-connected inverter also has obvious effective effect in the aspects of volume and cost control. If an isolation transformer is abandoned in the grid connection process of the inverter, an electrical connection relation is established between the photovoltaic cell panel array and the power grid, so that the common-mode current can be greatly increased, and the potential safety hazard can be caused. The elimination of the common mode current becomes a difficult problem which must be overcome by a non-isolated grid-connected inverter system, and the accuracy of monitoring the leakage current/insulation condition of the battery branch is a doubt which needs to be fully considered, and is a precondition for eliminating the leakage current/insulation fault and taking a countermeasure. Fault arcing/insulation faults are a problem that must be overcome, whether isolated or non-isolated inverter systems.
Referring to fig. 1, the voltages output by the series-connected multistage power optimizers 102 are superimposed to provide a total voltage with a higher potential to the inverter 101, the inverter 101 summarizes the maximum power collected by each of the series-connected multistage power optimizers 102 from the corresponding photovoltaic module, after the inverter 101 obtains the summarized total power of each of the power optimizers 102 through various types of communication, the bus current or other information of the power lines LN1-LN2 is calculated, and the bus current or other information is transmitted and notified to each of the power optimizers 102 through wireless or power carrier communication. Each power optimizer 102 has its own output voltage equal to the power it collects at the maximum power of the corresponding photovoltaic module divided by the bus current. Wireless communication or power line carrier communication can be typically adopted between the inverter and the power optimizer to realize real-time transmission of data information.
Referring to fig. 1, in an alternative embodiment, the inverter 101 may be a flying capacitor multilevel inverter, a single or multiphase BRIDGE H-BRIDGE inverter, or the like. The power optimizer 102 is a dc voltage converter and is used to receive electrical energy from photovoltaic modules/chemical cells/fuel cells etc. at its input terminals for further conversion to output power at the output terminals. Meaning of power optimization: a certain power optimizer needs to set the output current and output voltage of a certain battery or component with which it is paired to the maximum power point of that battery/component, in other words, a certain power optimizer needs to set the power of its input to the maximum power point of a battery/component with which it is paired. In other words, a certain power optimizer needs to set its output current to have no direct correlation with the output current of a battery/component with which it is paired, and a certain power optimizer needs to set its output voltage to have no direct correlation with the output voltage of a battery/component with which it is paired.
Referring to fig. 1, a photovoltaic module array is the basis for the conversion of light energy to electrical energy in a photovoltaic power generation system. The figure shows the installation of a basic string in a photovoltaic module array, with respect to the string: each cell string is formed by connecting a plurality of photovoltaic modules 103 which are connected in series with each other in series, and the photovoltaic modules 103 can also be replaced by fuel cells or chemical cells. The main functions of the battery string group are as follows: although each battery string is composed of a plurality of photovoltaic modules and the internal photovoltaic modules are in a series relationship, a plurality of different battery strings are in a parallel relationship and supply electric power to the inverter 101. In the present application, each photovoltaic cell or photovoltaic module 103 is configured with a power optimization circuit for performing MPPT maximum power tracking calculation, for example, the electric energy generated by the first stage photovoltaic module 103-1 is power-converted by the first power optimizer 102-1 to perform power optimization, the electric energy generated by the second stage photovoltaic module 103-2 is power-converted by the second power optimizer 102-2, and the photovoltaic electric energy generated by the nth stage photovoltaic module 103-N is power-converted by the nth stage power optimizer 102-N to perform power optimization, where N is a natural number. The power output by the power optimizer 102 corresponding to each photovoltaic cell 103 is indicative of the actual power provided by the photovoltaic cell 103 on the string.
Referring to fig. 1, in an optional but not necessary embodiment, assuming that a first-stage pv module 103-1, a second-stage pv module 103-2 … and so on are connected in series inside a cell string to an nth-stage pv module 103-N, a first-stage power optimizer 102-1 is configured to perform MPPT maximum power tracking on a voltage source of the first-stage pv cell 103-1 for voltage conversion and output V1And so on, the power optimizer 102-N of the Nth stage is used for carrying out maximum power tracking on the photovoltaic voltage source of the photovoltaic cell 103-N of the Nth stage for voltage conversion and outputting VN. It can be seen that the total string level voltage that can be provided across a single battery string is approximately equal to: voltage V output by the first stage power optimizer 102-11Plus the voltage V output by the power optimizer 102-2 of the second stage2Then, the voltage V outputted by the power optimizer 102-3 of the third stage is added3…, and so on, to the nth stage of the power optimizer 102-NNThe total cascade voltage is calculated to be equal to V1+V2+…VN. The power optimization circuit or the power optimizer 102 may be a boost-type voltage conversion circuit, a buck-type voltage conversion circuit, a boost-type voltage conversion circuit, or the like. The first-stage power optimizer 102-1, the second-stage power optimizer 102-2, to the Nth-stage power optimizer 102-N, and the like are connected in series through a power line, and a cascade voltage obtained by superimposing voltages output from the power optimizers 102-1 to 102-N on the power line is transmitted to electric equipment similar to a combiner box or an inverter for combination and inversion and then is connected to the grid, such as a combiner box or an inverterThe output power of each of the series-connected multi-stage power optimizers 102-1 to 102-N is collected and then transmitted to the inverter 101 for power supply, and different battery string groups are connected in parallel when supplying power to the inverter.
Referring to fig. 1, each of the voltage converting circuits of the first to nth stages of the power optimizers 102-1 to 102-N is provided with a processor 112 mentioned below, and the voltage converting circuits of the type of the converters BUCK, BOOST, BUCK-BOOST, etc. in the art perform power tracking MPPT calculation, which is implemented by a pulse width modulation signal PWM output by the processor 112. As known to those skilled in the art, the PWM signal mainly drives the power switching element in the voltage conversion circuit to boost, buck, boost, etc. the battery voltage. In a switching power supply system, a power supply uses a power semiconductor device as a switching element, and the duty ratio of the switching element is controlled to adjust an output voltage by periodically turning on and off the switch. The switching power supply mainly comprises an input circuit, a conversion circuit, an output circuit, a control unit and the like, power conversion is a core and mainly comprises a switching circuit, in order to meet the requirement of high power density, a converter needs to work in a high-frequency state, a switching transistor adopts a crystal arm with high switching speed and short conduction and turn-off time, and a typical power switch comprises a power thyristor, a power field effect transistor, an insulated bipolar transistor and the like. The control method is classified into various pulse width modulation, mixed modulation of pulse width modulation and frequency modulation, pulse frequency modulation, and the like, and the most common modulation method of the pulse width modulation method is the pulse width modulation method. DC-to-DC/DC converters such as voltage converters, current converters are suitable for the power optimizer 102, which is a DC-to-DC converter, belonging to the category of switching power supplies and also being a single component class of battery maximum power tracking power device. Meanwhile, an inverter circuit adopted by the inverter 101 also belongs to the application of the switching power supply system. The SMPS is classified into an AC/AC converter such as a frequency converter, a transformer, an AC/DC converter such as a rectifier, a DC/AC converter such as a rectifier, a DC/DC converter such as a voltage converter, a current converter, and the like, according to the input and output voltage forms. The inverter 101 in the present application is a converter for DC to AC DC/AC, such as various single-phase or multi-phase inverters, and belongs to the category of switching power supplies.
Referring to fig. 1, the power optimizers 102-1 to 102-N of the first to nth stages of the plurality of stages are connected in series to provide electric power/power to the inverter 101 through power lines LN1-LN2, the inverter 101 performs dc-to-ac inversion on the dc bus power, and the generated ac can be used locally or be grid-connected. Such as flying capacitor-containing multilevel inverters or single-phase half-bridge, single-phase full-bridge, push-pull, three-phase bridge inverters, etc., all of which require the processor 112, referred to hereinafter, to output so-called pulse width modulation PWM which drives the inverter switching devices. The theoretical basis in many inversion scenarios is to replace a sine wave with a series of narrow pulses of equal amplitude but different widths, where the sine wave is divided into several equal parts, or viewed as several pulse trains connected to each other. Principle of the industry SPWM waveform: a sine wave is taken as a desired waveform output by an inverter, an isosceles triangle wave with a frequency much higher than that of the desired wave is taken as a carrier wave, a sine wave with the same frequency as the desired waveform is taken as a modulation wave, and when the modulation wave intersects with the carrier wave, the on-off time of a switching device of the inverter is determined by the intersection point of the modulation wave and the carrier wave, so that rectangular waves with different amplitudes and widths are obtained in a series with narrow sides and wide middle in a half cycle of the sine modulation wave. Finally with SPWM waveform: that is, the pulse width changes according to sine rule and has equivalent PWM waveform with sine wave, thus realizing the inversion from DC to AC.
Referring to fig. 1, in a switching power supply system, the characteristics of the switching power supply itself, which is a dc-to-dc voltage converter considered as a power optimizer, are fully utilized: the first input NI1 of the first stage power optimizer 102-1 is coupled to the cathode of the corresponding first stage photovoltaic module 103-1, and the second input NI2 is coupled to the anode of the first stage photovoltaic module 103-1 so as to output the power-converted output power between the first output NO1 and the second output NO2 of the first stage power optimizer 102-1, and the output voltage of the first stage power optimizer 102-1 is usually equal to the output voltage obtained by subtracting the potential of the first output NO1 from the potential of the second output NO 2. Further, the following explanation is given by way of example: the first input NI1 of the nth stage power optimizer 102-N is coupled to the cathode of the corresponding nth stage photovoltaic module 103-N, and the second input NI2 is coupled to the anode of the nth stage photovoltaic module 103-N to output the power converted from the photovoltaic module between the first output NO1 and the second output NO2 of the nth stage power optimizer 102-N, and the output voltage of the nth stage power optimizer 102-N is generally equal to the output voltage obtained by subtracting the potential of the first output NO1 from the potential of the second output NO 2. Note that the power optimizer 102 converts the electrical energy of the photovoltaic module received between the first input NI1 and the second input NI2 into output power output from its first output NO1 and second output NO2, and that in the power optimization process, the module output current received at the input of the power optimizer is independent of the current at the output of the power optimizer, the module output voltage received at the input of the power optimizer is independent of the voltage at the output of the power optimizer, and the module output current and output voltage received at the input of the power optimizer are set to correspond to the maximum power point of the module.
The power optimizer is a voltage converter of a voltage reduction and boost type from direct current to direct current, and is also a single-component-level battery maximum power tracking power device. And after the single component is subjected to maximum power optimization by the power optimizer, the single component is transmitted to a terminal inverter to be subjected to direct current to alternating current processing, and then the single component is supplied for local use or power generation grid connection. The terminal inverter can be generally a pure inverter device without maximum power tracking or an inverter device equipped with two-stage maximum power tracking. The mainstream power optimizers are mainly classified into series type and parallel type, and the topologies are also different, such as CUK or BUCK or BOOST or BUCK-BOOST circuits.
The design concept of fixed voltage is adopted by the series type power optimizer. Roughly speaking, the inverter control end determines the voltage of a stable direct current bus according to the alternating current end voltage, summarizes the maximum power collected by each serially connected optimizer, and further calculates the bus current and transmits the bus current to the optimizers through wireless or power carriers. The voltage at the output of each optimizer is then equal to the power of the maximum power of the collected component divided by the bus current. When the assembly is shielded, the optimizer can re-determine the maximum output power value according to the volt-ampere curve and transmit the maximum output power value to the inverter control end wirelessly or through power carrier waves. And on the premise of maintaining the voltage of the direct current bus unchanged, the control end recalculates the bus current and feeds back the bus current to each optimizer if the bus current is reduced. As the power of the shaded components is reduced, the shaded optimizer will also step down to confirm that the output current is up to standard. The optimizers for other non-occluded components are boosted to meet the output current. If a component is too heavily shaded, the power optimizer bypasses the heavily shaded component until it returns to a workable state, and adjusts what is essentially a voltage makeup process, thereby providing the most stable and optimized dc side bus voltage to the inverter.
The biggest topological characteristic of the power optimizer on the system is to separate the components from the inverter functionality, which is different from the traditional photovoltaic power generation system. It seems that the components are connected to the inverter through the optimizer, and in fact the components are only used for starting the optimizer, and the optimizer collects the maximum power of the photovoltaic components and then mutually cooperates to the inverter function. For example, the technology of fixed voltage not only solves the problem of partial shading of a photovoltaic power generation system, but also does not need to be equal in the number of the components of each group of strings or even the sunlight orientation/position arrangement of the components in the same group of strings. In addition to the structural advantages of the circuit topology, the power optimizer also has great advantages in the maximum power point tracking algorithm. The traditional tracking algorithm of the maximum power point is basically based on two types: hill climbing method and logic measurement algorithm. Advanced tracking methods these also employ a combination method: for example, a hill climbing method is combined with a constant range method, and a full scanning method with a fixed time interval is matched to find a maximum power point; the accuracy of the algorithm for finding the maximum power point by combining a slope polarity method and a conductance incremental method and matching with a detection step control method can reach more than 99% under an ideal test condition. It is based on this power conversion mode advantage that the optimizer can have an electric power boost of about 5-30% compared to the conventional inverter. Unlike the limited ac power of the micro-inverter, the power optimizer may fully transfer the collected power to the inverter.
The power optimizer is compatible with all the silicon cells, and can be matched with part of the thin film battery system, and the industry is also trying to make the optimizer have a wider compatibility range. However, most micro-inverters are incompatible or self-functionally grounded, which makes them incompatible with some mainstream components currently on the market. At the same time, the input voltage range of the power optimizer is between about 5 volts and 50 volts, which ensures that the optimization circuit can still be started and continue to operate even if the components are severely covered. The power optimizer can be matched with a third-party inverter, and communication with the third-party inverter and regulation and control of a system are carried out through an additional control box. The power optimizer or voltage conversion circuit is essentially a dc-to-dc converter such as BUCK, BOOST, CUK and BUCK-BOOST circuits. It should be emphasized that any scheme for tracking the maximum power of the photovoltaic cell in the prior art is applicable to the voltage conversion circuit of the present application, and common maximum power tracking methods include a constant voltage method, a conductance increment method, a disturbance observation method, and the like, and the present application does not describe any scheme how the voltage conversion circuit performs maximum power tracking MPPT.
Referring to fig. 1, the multi-stage power optimizers 102-1 to 102-N are connected in series according to the following rule: the second output terminal of any previous stage power optimizer is coupled to the first output terminal of an adjacent next stage power optimizer through a power line. Demonstrating the actual connection relationship: the power optimizer 102-1 and the power optimizer 102-2 are adjacent and in series. In a series relationship of power optimizers in multi-stage form and in series: the second output terminal NO2 of the previous stage power optimizer 102-1 is connected to the first output terminal NO1 of the next stage power optimizer 102-2, the second output terminal NO2 of the previous stage power optimizer 102-2 is connected to the first output terminal NO1 of the next stage power optimizer 102-3, and so on. The series of multi-stage power optimizers in series provides a total string voltage equal to the sum of their respective output voltages of the optimizers 102-1 … 102-N. In other words, it can also be considered that: the total cascade voltage of the entire series of the plurality of power optimizers can be provided between the first output terminal NO1 of the first power optimizer stage 102-1 and the second output terminal NO2 of the last power optimizer stage 102-N. Specifically, the first output NO1 of the first power optimizer 102-1 of the first stage is equivalent to the equivalent negative pole of the multi-stage power optimizer, the second output NO2 of the last power optimizer 102-N of the last stage is equivalent to the equivalent positive pole of the multi-stage power optimizer, one LN1 of the set of power lines/dc buses is coupled to the equivalent positive pole and the other LN2 of the set of power lines is coupled to the equivalent negative pole. Note that it is a precondition to compare the potentials of the respective output terminals of the different power optimizers to specify that the potential of the first output terminal NO1 of the first power optimizer stage 102-1 is the lowest and also the potential of the second output terminal NO2 of the last power optimizer stage 102-N is the highest when the plurality of power optimizers are connected in series. Power lines LN1-LN2 are coupled to a pair of input terminals of inverter 101, respectively, and it is noted that power equipment such as a combiner box which can be used in the conventional case is not directly shown in the figure.
Referring to fig. 2, in the field of photovoltaic power generation, Arc discharge is caused by poor contact, aging, short circuit, etc. occurring between various connectors/contact terminals such as connection terminals of a multi-stage optimizer, Arc-Fault is caused in large part by air breakdown due to aged breakage and contamination of electrical insulation properties of cable wires and air moisture, and electrical looseness of contact point positions is also caused by a process of continuous light emission and discharge through an insulation medium, and Arc discharge is obviously characterized by high emphasis rate of voltage current, serial Arc and parallel Arc, which are the most important and attention-demanding Arc faults. The simplest method of locating a fault arc in a series-type power optimizer system is: an arc sensor 115 for detecting arc faults is provided for each of the power optimizers 102-1 to 102-N, and the arc condition at the output of each power optimizer is detected individually, so that when an arc fault occurs near the output of the power optimizer, the processor 112 can immediately sense the arc alarm signal from the arc sensor 115, and the processor 112 further sends the fault arc event to the receiving terminal as an alarm. However, each power optimizer is individually configured with an arc sensor to detect the presence of a fault arc in the power optimizer with a number of negative effects: the cost is increased significantly, and the additional cost of one arc sensor per power optimizer can be more than half the overall cost; the arc detection accuracy is reduced, and fault arcs generated by different power optimizers can be captured by arc sensors of other power optimizers in a serial link, so that the real arc generated by the power optimizer cannot be distinguished. If an arc is generated near the power optimizer 102-1 and the arc signal is also detected by the mating arc sensor 115 of the power optimizer 102-N, the mating processor 112 of the power optimizer 102-N may misjudge that the power optimizer 102-N has a fault arc event because the power optimizers are all connected in series and therefore easily misjudge in the entire link, resulting in the real arc fault point not being located. Be applied to direct current arc sensor in photovoltaic power generation field belongs to prior art. Currently known detection means include, for example, arc detection modes based on thermal or acoustic or electromagnetic properties, the properties of light and heat and sound and electromagnetic radiation accompanying the generation of a fault arc, from which a fault arc can be detected. The detection means further includes, for example, detecting a change in voltage and current, which inevitably results in a change in voltage and current when a fault arc occurs, usually accompanied by a transient pull-up of voltage and a transient pull-down of current, and determining whether an arc occurs by using the change in voltage and current. The detection means also includes the characteristic of detecting the fault current, for example, the characteristic value statistics is carried out on the high-frequency signal obtained in the form of a high-pass filter and the low-frequency signal obtained in the form of low-pass filtering mainly in a current detection mode, the fault current contains a large amount of harmonic components when a fault arc occurs, the amplitude changes, the characteristic value of the fault current is extracted and separated by carrying out detailed analysis on the time domain characteristic and the frequency domain characteristic of the fault current signal according to the respective commonality and personality of the fault signal and utilizing fast Fourier transform and wavelet transform, and the sensitivity and the accuracy of fault identification are provided. The arc current can generate repeated jump in a time domain, and the current amplitude mutation is reduced when the arc burns stably; in a frequency domain, a large amount of high-frequency harmonic waves occur in parallel arc and serial arc currents, a characteristic value needs to be extracted by using fast Fourier transform and wavelet transform, for example, the enhancement of the total energy of the harmonic waves is extracted by using Fourier transform to be used as the characteristic value, when a fault is judged, when the characteristic value is increased, a certain arc fault suspected point is set, and when the number of the arc fault suspected points exceeds a set number value, the arc fault is judged. The band-pass characteristic of the wavelet analysis method can be used for reconstructing the high-frequency component transformation, solving a time spectrogram and an energy sum of energy on each frequency band, carrying out normalization processing, and selecting the energy percentage of the characteristic frequency band of the fault arc as an element of a characteristic vector. In short, the arc sensor 115 may be a sensor that detects a current fault arc signal.
Referring to fig. 3, in the field of photovoltaic power generation, a metal frame of a photovoltaic module is connected to the ground GND, and most of frames of the photovoltaic module are made of metal aluminum, which is one of the reasons for safety. It is found that the capacitors C1-C2 are parasitic between the positive and negative electrodes of the photovoltaic modules 103-1 to 103-N and the ground. The distributed capacitance of the solar panel to the ground is mainly determined by the area of the panel, the local soil property, the ambient air humidity, the module installation mode and other factors, the complete model of the parasitic capacitance is complex, and the illustrated parasitic capacitances C1-C2 are only used as exemplary examples. In essence, part of the structure of the optimizer itself also needs to be grounded when necessary, for example, when a metal casing is adopted, the casing of the optimizer also needs to be grounded. There may also be a parasitic distributed capacitance between the output of the power optimizer and ground. Fig. 3 shows that the inverter 101 connects ac power to the GRID through a set of power lines LA1-LA2 on the ac output side, and that a ground impedance is distributed between the ground point of the GRID and the ground point of the metal frame of the photovoltaic module, and similarly, a ground impedance is distributed between the ground point of the GRID and the ground point of the power optimizer, and a ground impedance is distributed between the ground point of the GRID and the ground point of the inverter, and the like. A non-negligible problem in the industry is that the inverter bridge (e.g. half bridge, single-phase full bridge, etc.) or the bridge arm of the inverter generates so-called differential and common mode voltages and further causes a common mode leakage current ILC in the common mode loop of fig. 3. The problem of common-mode earth leakage current of the photovoltaic module and the power optimizer needs to be paid particular attention, and the parasitic capacitance between the photovoltaic module and the power optimizer and the earth is not allowed to be ignored under the influence of factors such as humidity and local dust, and can reach a very high value. High-frequency common mode current such as the illustrated ILC causes large harmonic of grid-connected current, insignificant loss increase, and electromagnetic interference to affect each electrical device in the whole system and cause serious safety hazard, which occurs because the photovoltaic module or the power optimizer, the inverter, and the power grid form a common mode loop through parasitic capacitors, and rapid change of common mode voltage in the common mode loop causes stray inductance and capacitance in the loop to be repeatedly charged and discharged, thereby generating so-called common mode leakage current. In addition, since the photovoltaic power generation system and the power grid are not ideal ground insulation systems, if the insulation of the whole direct current system is poor and even a single-phase ground fault occurs, a large leakage current and a butt-joint ground fault current are generated, even if a protective switch breaking device is preset in the system, the fault exists for a long time and can cause that: local heating is caused to aggravate insulation damage, and arc faults and even fire disasters can be caused; when the fault is further enlarged until the insulation of the two direct current buses to the ground is extremely poor, the two direct current buses are caused to be short-circuited, and the system is tripped.
Referring to fig. 4, in the field of photovoltaic power generation, a direct current system is mostly set to be floating to the ground, or a neutral point is grounded to operate based on the convention formed in the early stage of power development. In order to ensure the reliable operation of a direct current system, the insulation condition of the positive and negative poles of a bus and each branch circuit of the system to the ground needs to be monitored on line in real time, and when the insulation resistance of a certain point to the ground is lower than a set alarm value, an alarm signal is sent out in time, and a fault point is given out. Generally the simplest method to locate an insulation fault in a series-type power optimizer system is: a leakage current sensor 125 for detecting leakage current is arranged in each of the multistage power optimizers 102-1 to 102-N, so that the leakage current condition of the output end of each power optimizer is detected independently, when insulation faults occur near the output end of each power optimizer, the processor 112 of each power optimizer can immediately sense the leakage current condition detected by the leakage current sensor 125, and the voltage to ground of each output end of each power optimizer is divided by the current to ground leakage to be approximately equal to the insulation resistance to ground of each output end of the power optimizer. The leakage current sensor 125 is compatible with a conventional dc micro-current measurement type electric quantity isolation sensor, and the measurement mode may be a perforated structure, and has no insertion loss and overload capability, strong anti-electromagnetic interference capability and wide power supply application range, and the input and output thereof are not common, and the input signal is dc micro-current, and even a sensor with an output of communication interfaces such as RS-485, etc. may be used to measure the insulation leakage current of the dc system, thereby being used for the insulation monitoring of each loop of the dc power system. The processor 112 further sends the leakage current condition and whether the ground insulation event occurs to the receiving terminal as a warning, and when the ground insulation resistance of one power optimizer is lower than a set alarm value, the processor sends out an alarm signal in time to give a fault point. The voltage to ground of each output of the individual branches, for example of the power optimizer, can be measured directly with the current voltage sensor, which is not shown in particular. The insulation monitoring mode is that at least one leakage current sensor needs to be matched with insulation monitoring of a branch circuit of each power optimizer on a link of the multi-stage power optimizer, and the leakage current sensors with large quantity are the main cost for forming grounding insulation monitoring. The earth leakage current of any certain photovoltaic module is measured on a front side input line of a corresponding power optimizer, the photovoltaic module provides photovoltaic electric energy to the power optimizer from the front side input line, and the earth leakage current is the difference of the currents on a group of front side input lines (such as the input lines coupled to the input terminals NI1-NI 2) of each power optimizer and respectively coupled to the positive electrode and the negative electrode of the photovoltaic module; or the earth leakage current of any photovoltaic module is measured on the rear output line of a power optimizer corresponding to the photovoltaic module, the power optimizer outputs the output voltage of the power optimizer after power conversion by the rear output line (such as the output line coupled to the output terminals NO1-NO 2), and the earth leakage current is the difference of the currents on a group of rear output lines of each power optimizer for providing the output voltage of the power optimizer. The ground insulation resistance of a certain component and a matched optimizer thereof can be calculated from the ground voltage and the ground leakage current measured from the front-side input line or the ground voltage and the ground leakage current measured from the rear-side output line.
Referring to fig. 5, as an alternative to the embodiment of fig. 2, the arc fault event is detected entirely on the dc bus, i.e., power lines LN1-LN2, connected in series to form a multi-stage power optimizer without detection at the output of each stage of the power optimizer, i.e., to the output line coupled to output terminals NO1-NO2, and of course, without detection at the input of each stage of the power optimizer, i.e., to the input line coupled to input terminals NI1-NI 2. The advantages are that: assuming that the number of the power optimizers is N, the arc sensors 115 used are only one of the direct current buses, and N-1 arc sensors are saved compared with the original number. Instead of providing each power optimizer 102-1 to 102-N with an arc sensor for detecting an arc signal, an arc sensor 115, for example, mounted on one side of the inverter and used in conjunction with the processor 112 of the inverter, is used to detect the arc condition at the input and/or output of each power optimizer in a single piece directly on the bus, the power line passes through the perforated or interpenetrated arc sensors, and the monitoring of the arc is also electrically isolated. When an arc fault occurs near the input and/or output of any stage of the power optimizer in the entire link, the arc sensor 115 sends an arc alarm signal, and the processor 132 of the inverter configuration receives the arc alarm signal sent by the arc sensor 115 and then further sends the fault arc event to the receiving terminal as an alert. The alarm can be various types, for example, a sharp whistle sound or a flashing alarm lamp is used as a striking prompt, the receiving terminal is used as an alarm device, and in addition, a signal of a fault arc event can be sent to a breaker to directly cut off the bus voltage to avoid larger loss. In comparison, the number of the arc sensors is greatly reduced, and more importantly, the real arc fault of the power optimizer of the first stage can be accurately judged, so that the arc misjudgment rate is reduced. Means for realizing high-precision fault arc detection: the multi-stage power optimizers 102-1 to 102-N are connected in series and provide electrical power to the inverter 101, which inverts dc power into ac power that can be grid-connected to the grid or used directly off-line. Each stage of the power optimizer 102 in the entire serial link is configured to perform maximum power point tracking on a photovoltaic module 103 that is matched with the power optimizer, that is, the power optimizer sets the output current and the output voltage of a certain photovoltaic module 103 that is matched with the power optimizer to be the maximum power point of the photovoltaic module 103 in a power conversion process, and the power optimizer plays a role in converting electric energy received by a receiving end into output power of an output end.
Referring to fig. 5, the means for achieving high accuracy of fault arc detection also consists in: detecting the potential of an output end of each stage of power optimizer for outputting power in a link, and comparing the potential of the output end of each stage of power optimizer with the potential of the output end of the previous stage of power optimizer; when the output end potential of any stage of power optimizer is lower than that of the power optimizer in the previous stage, the position of the fault event is judged to occur at the power optimizer of any stage. For example, it is necessary to detect the potentials of the first output terminal NO1 and the second output terminal NO2 of the first-stage power optimizer 102-1, the potentials of the first output terminal NO1 and the second output terminal NO2 of the second-stage power optimizer 102-2, and so on until the potentials of the first output terminal NO1 and the second output terminal NO2 of the third-stage power optimizer 102-3 are detected, and finally the potentials of the first output terminal NO1 and the second output terminal NO2 of the nth-stage power optimizer 102-N are detected.
Referring to fig. 5, the significance of comparing the output terminal potential of each stage of the power optimizer with respect to the output terminal potential of the power optimizer in the previous stage thereof is as follows: the output of the power optimizer of the next stage should have a higher potential than the output of the power optimizer of the previous stage or else there is a high probability that a so-called arc fault is detected by the arc sensor 115 at this location. For example, if the potential of the first output NO1 of any subsequent stage power optimizer 102-2 is supposed to be continuously equal to or continuously close to the potential of the second output NO2 of the preceding stage power optimizer 102-1, and if the two terminals are caused to have different potentials for most of the time due to poor contact or abnormal contact between the two terminals caused by problems such as oxidation and aging of the terminals, the potentials are not equal for the most of the time, or there is an abnormal situation of indirect disconnection between the two terminals, even if the two terminals are directly disconnected, the arc signal detected by the arc sensor 115 may occur at a position between the first output NO1 of the power optimizer 102-2 itself and the second output NO2 of the preceding stage power optimizer 102-1. Such as a series arc may occur between them and the arcing sensor 115 captures the fault arc signal. Generally, the potential of the second output terminal NO2 of the power optimizer 102-2 should be higher than the potential of its own first output terminal NO1 because the power optimizer 102-2 outputs power. Detecting whether the second output NO2 of the power optimizer 102-2 is continuously higher than the second output NO2 of the front power optimizer 102-1 is substantially the same as requiring that the second output NO2 of the power optimizer 102-2 should have a higher potential than its own first output NO1, after all the first output NO1 of the rear power optimizer 102-2 is directly coupled to the second output NO2 of the front power optimizer 102-1. We have tried that if the potential of the second output NO2 of the later stage power optimizer 102-2 is even lower than the potential of the second output NO2 of the earlier stage power optimizer 102-1, then one of its reasons could be that the actual potential of the second output NO2 of the later stage power optimizer 102-2 is not higher than the potential of the first output NO1 of the later stage power optimizer 102-2 itself, which could also be a potential abnormal event triggering the so-called arc sensor 115 to capture the fault arc signal. Parallel arcs may occur between the terminals or between one of the poles and ground, if a fault arc occurs between the two outputs of the power optimizer 102-2 or between one of the poles and ground, such as the second output NO2 of the power optimizer 102-2 having poor insulation to ground until the insulation is damaged to generate an arc. Thus, arc faults can be localized by potential detection of the outputs of different power optimizers.
Referring to fig. 5, based on the above, in an optional but not required embodiment, identifying a fault arc event for any stage of the power optimizer includes: and determining that the potential of the first output end of the first-stage power optimizer is not always continuously equal to the potential of the second output end of the first-stage power optimizer, and/or determining that the potential of the second output end of the first-stage power optimizer is not continuously higher than the potential of the second output end of the first-stage power optimizer. Taking the power optimizer 102-2 in the normal power generation phase as an example, if the potentials of the first output NO1 and the second output NO2 of the preceding power optimizer 102-1 are not always continuously equal, and if the two are in poor contact and spontaneous intermittent on or off occurs, the arc sensed by the arc sensor on the dc bus is localized in the power optimizer 102-2, which is one of the mechanisms for locating the fault. Still taking the power optimizer 102-2 in the normal power generation phase as an example, it is determined that the potential of the second output NO2 is not continuously higher than the potential of the second output NO2 of the previous power optimizer 102-1, and assuming that the butt contact of the power optimizer 102-1 and the power optimizer 102-2 in the next stage has an arc appearance when the current in the line to which the second output NO2 of the power optimizer 102-1 is coupled is interrupted (such as an unexpected situation of plug damage/cable damage), the arc sensed by the arc sensor on the dc bus is positioned on the output side of the power optimizer 102-2, which is also one of the mechanisms for positioning the arc fault. Of course, confirming a fault arc event for any one of the power optimizers also includes determining whether the potential of the first output of any one of the power optimizers is lower than the potential of the second output. Still taking the power optimizer 102-2 in the normal power generation phase as an example, it is determined that the potential of the second output NO2 is not continuously higher than the potential of the first output NO1 of the power optimizer 102-2 itself, and it can be roughly determined that there is an arc to ground near the input/output of the power optimizer 102-2 if the potential of the first output NO1 is lower than the potential of the second output NO2, which is also one of the mechanisms for locating the arc fault. In an optional but not necessary embodiment, after the arc detection mechanism, an occurrence point of an arc is obtained preliminarily, and whether the arc is a false fault is further to be confirmed, because various voltage fluctuations or disturbances exist in the line all the time, the more precise method further includes: taking the power optimizer 102-2 as an example, after confirming that it may be the arc fault occurrence point through the above means, the power drawn by the power optimizer 102-2 from the corresponding photovoltaic module 103-2, that is, the output power of the photovoltaic module 103-2 is compared with the actual output power contributed to the inverter 101 by the power optimizer 102-2 itself, and it is noted that the total power drawn by the inverter is equal to the sum of the actual output powers contributed by the power optimizers 102-1 to 102-N of the respective stages. Only if the sum of the power loss PL due to the inherent power conversion efficiency of the power optimizer 102-2 and the actual output power PO of the power optimizer 102-2 itself is lower than the output power PT of the photovoltaic module 103-2, it is confirmed that the arc signal at the power optimizer 102-2 location is a true arc fault, noting that the photovoltaic module 103-2 is still operating at the maximum power point at this stage. The actual output power of the power optimizer 102-2 is related to its output voltage and output current, and the output power of the photovoltaic module 103-2 is related to its output voltage and output current in an operational relationship.
Referring to fig. 6, in an alternative embodiment to fig. 4, the insulation fault event is detected integrally on the dc bus, i.e., power lines LN1-LN2, connected in series to form a multi-stage power optimizer without detection at the output of each stage of the power optimizer, i.e., to the output line coupled to output terminals NO1-NO2, and of course at the input of each stage of the power optimizer, i.e., to the input line coupled to input terminals NI1-NI 2. The advantages are that: if the number of the power optimizers is N, the leakage current sensor 125 is only one of the dc bus, which saves N-1 leakage current sensors. It is not necessary to configure each of the optimizers 102-1 to 102-N with a leakage current sensor for detecting an insulation fault. The insulation condition of the output end of each power optimizer to the ground is integrally detected on the bus: for example, two power lines LN1-LN2 as bus lines pass through a perforated or interdigitated leakage current sensor 125, which is also electrically isolated and can be used in conjunction with the processor 112 of the inverter. The leakage current sensor 125 can detect the leakage current condition of the dc bus: when the bus insulation condition is normal, the currents flowing through the leakage current sensors are equal in magnitude and opposite in direction, and the output signals are zero; when the bus has poor grounding, the leakage current sensor has a difference current flowing through, and the output of the sensor is not zero. When an insulation fault occurs near the input and/or output of any stage of the power optimizer, the leakage current sensor 125 can detect the leakage current of the dc bus. The ground insulation resistance of the two buses to the ground can be calculated by detecting the ground voltages of the two buses to the ground respectively through the conventional voltage sensor in the prior art and detecting the ground leakage current of the direct current bus through the leakage current sensor 125. And finally, calculating the ground insulation resistance of the bus branch by measuring the ground voltages of the anode and the cathode of the bus and the direct current leakage current of each bus branch to the ground. The specific calculation mode is that the voltage to ground of the two buses to ground is divided by the respective earth leakage current to be the respective insulation resistance to ground. In order to ensure the reliable operation of a direct current system comprising series power optimizers, the insulation conditions of the positive pole and the negative pole of a system bus and each power optimizer branch circuit to the ground need to be monitored in real time on line, and when the insulation resistance to the ground of a certain point is lower than a set alarm value, an alarm signal is sent out in time and a fault position point is given out. For example, the inverter side processor 132 may further send an insulation to ground fault event to the receiving terminal as a warning by calculating an insulation alarm anomaly signal based on the insulation resistance condition. The detection means for realizing the high-precision insulation condition to the ground comprises the following steps: the multi-stage power optimizers 102-1 to 102-N are connected in series to form a chain and provide power to an inverter 101 that inverts dc power into ac power that can be grid connected to a power grid or used locally directly. Each stage of power optimizer 102 is configured to perform maximum power point tracking on a photovoltaic module 103 that is matched with the power optimizer, where the maximum power point tracking is that the power optimizer sets an output current and an output voltage of the photovoltaic module 103 that is matched with the power optimizer to be a maximum power point of the photovoltaic module 103 in a power conversion process, and the power optimizer plays a role in converting electric energy received by a receiving end into output power of an output end. Means for achieving high accuracy of the detection of the insulation condition also consist in: detecting the potential of an output end of each stage of power optimizer for outputting power, and comparing the potential of the output end of each stage of power optimizer with the potential of the output end of a previous stage of power optimizer; when the output end potential of any stage of power optimizer is lower than that of the power optimizer in the previous stage, the position of the fault event is judged to occur at the power optimizer of any stage. For example, it is necessary to divide the nodes/terminals to sequentially detect the potentials of the first output NO1 and the second output NO2 of the first stage power optimizer 102-1, the potentials of the first output NO1 and the second output NO2 of the second stage power optimizer 102-2, and so on until the potentials of the first output NO1 and the second output NO2 of the third stage power optimizer 102-3 are detected, until the potentials of the first output NO1 and the second output NO2 of the nth stage power optimizer 102-N are finally detected.
Referring to fig. 6, the significance of comparing the output terminal potential of each stage of the power optimizer with respect to the output terminal potential of the power optimizer in the previous stage thereof is as follows: the output end of the power optimizer of the next stage should have a higher potential than that of the output end of the power optimizer of the previous stage, otherwise, insulation failure to the ground may occur. If the potential of the first output terminal NO1 of the power optimizer 102-2 and the potential of the second output terminal NO2 of the preceding power optimizer 102-1 should be continuously equal or close, if one of them causes the potential to be unequal due to occurrence of ground or impedance to ground, and the impedance of the first output terminal NO1 of the following power optimizer 102-2 to ground is assumed to be small and the insulation is deteriorated, it can be judged that the insulation fault is likely to occur in the vicinity of the first output terminal NO1 of the following power optimizer 102-2 or at a position between it and the second output terminal NO2 of the preceding power optimizer 102-1. Such as: assuming that the insulation of the first output NO1 of the later-stage power optimizer 102-2 to the ground is abnormal, the potential between the potential of the first output NO1 of the power optimizer 102-2 itself and the potential of the second output NO2 of the earlier-stage power optimizer 102-1 is caused to be unequal for most of the time, for example, the former is even lower than the latter, or there may be intermittent and occasional equality between them, and the insulation of the first output NO1 of the power optimizer 102-2 to the ground may be unstable, which is an insulation fault. In addition, the potential of the second output NO2 of the power optimizer 102-2 as the next stage should be higher than the potential of the first output NO1 of the power optimizer 102-2 itself because the power optimizer 102-2 outputs power, and here it is actively detected whether the potential of the second output NO2 of the power optimizer 102-2 is continuously higher than the potential of the second output NO1 of the power optimizer 102-1, which is substantially the same as that the potential of the second output NO2 of the power optimizer 102-2 should be higher than the potential of the first output NO1 of the power optimizer 102-2 itself, and after all, the first output NO1 of the power optimizer 102-2 is directly coupled to the second output NO2 of the power optimizer 102-1. One can imagine that: the potential of the second output terminal NO2 of the power optimizer 102-2 of the next stage is even lower than the potential of the second output terminal NO2 of the power optimizer 102-1 of the previous stage, which is likely to be the very bad insulation of the actual potential of the second output terminal NO2 of the power optimizer 102-2 of the next stage from the ground, resulting in leakage current. The potential of the second output NO2 of the post power optimizer 102-2 is not higher than the potential of the first output NO1 of the post power optimizer 102-2 itself, which is also an abnormal insulation event that may trigger the so-called leakage current sensor 125 to sense a leakage current signal from the bus. Therefore, the ground insulation fault event can be positioned by carrying out potential detection on the output ends of different power optimizers.
Referring to fig. 6, based on the above, in an optional but not required embodiment, identifying an insulation to ground fault for any stage of the power optimizer comprises: and/or determining that the potential of the second output terminal is not continuously higher than the potential of the second output terminal of the front-stage power optimizer. Taking the power optimizer 102-2 in the normal power generation phase as an example, the potentials of the first output NO1 and the second output NO2 of the preceding power optimizer 102-1 are not always continuously equal, such as the insulation resistance to ground or one of the two terminals is too low to generate the so-called insulation problem, so that the insulation fault sensed by the leakage current sensor on the dc bus can be localized at the power optimizer 102-2 as one of the mechanisms for locating the fault. Taking the power optimizer 102-2 in the power generation phase as an example, when it is determined that the potential of the second output NO2 thereof is not continuously higher than the potential of the second output of the previous power optimizer 102-1, such as the insulation resistance to ground or the grounding of a line or a contact coupled near the second output NO2 of the power optimizer 102-2 is too low, the leakage current induced by the leakage current sensor on the dc bus is localized on the output side of the power optimizer 102-2, which is one of the mechanisms for localizing the insulation fault. Of course, confirming an insulation fault event of any one of the power optimizers further includes determining whether the potential of the first output terminal of any one of the power optimizers is lower than the potential of the second output terminal. Still taking the power optimizer 102-2 in the normal power generation phase as an example, it is determined that the potential of the second output NO2 thereof is not continuously higher than the potential of the first output NO1 of the power optimizer 102-2 itself, and it can be roughly determined that the second output NO2 of the power optimizer 102-2 has a ground if the potential of the second output NO2 is lower than the potential of the first output NO1, which is also one of the mechanisms for locating an insulation fault. In an optional but not necessary embodiment, although the fault occurrence point is preliminarily obtained through the above insulation fault detection mechanism, it is still necessary to further confirm whether the insulation fault is a false fault, because various voltage fluctuations or disturbances exist in the line at all times, and the more precise method further includes: taking the power optimizer 102-2 as an example, after confirming that it is a possible arc fault occurrence point through the above means, comparing whether the current flowing between the first output terminal NO1-NO2 of the power optimizer 102-2 is lower than the current of the bus, i.e., the power line LN1-LN2, and confirming that the insulation anomaly at the position of the power optimizer 102-2 is a real insulation fault only on the premise that the current flowing in from the second output terminal NO2 of the power optimizer 102-2 and flowing out from the first output terminal and NO1 is lower than the bus current, i.e., the LN1-LN2 current, note that the photovoltaic module 103-2 still operates at the maximum power point at this stage. Other methods for further refining the insulation accuracy based on the embodiment further include: comparing the power generated by the photovoltaic module 103-2, namely the output power of the photovoltaic module 103-2 with the actual output power contributed to the inverter 101 by the power optimizer 102-2, wherein the total power drawn by the inverter 101 is equal to the sum of the actual output powers contributed by the power optimizers 102-1 to 102-N at different levels, and if the sum of the power loss PL caused by the inherent power conversion efficiency of the power optimizer 102-2 and the actual output power PO of the power optimizer 102-2 is lower than the output power PT of the photovoltaic module 103-2, the insulation abnormality at the position of the power optimizer 102-2 is determined to be a real insulation fault. The output voltage of the photovoltaic module and the output voltage of the optimizer can be measured by a conventional voltage sensor, and the output current of the photovoltaic module and the output current of the optimizer can be measured by a conventional current sensor.
Referring to fig. 6, the first stage power optimizer 102-1, the second stage power optimizer 102-2, through the so-called nth stage power optimizer 102-N, etc. as shown in the figure are connected in series by a series line, and in the chain in which the multistage voltage converting circuit or power optimizers 102-1 to 102-N are connected in series, the connection relationship is: the second output terminal of any previous stage power optimizer is coupled to the first output terminal of the adjacent next stage voltage conversion circuit, and the total cascade voltage provided by the link is equal to the superposition value of the output voltages of the respective power optimizers in the previous stage power optimizer. The link is as follows: the second output NO2 of the first stage power optimizer 102-1 is coupled to the first output NO1 of the adjacent succeeding stage, i.e., the second stage power optimizer 102-2, the second output NO2 of the second stage power optimizer 102-2 is coupled to the first output NO1 of the adjacent succeeding stage, i.e., the third stage power optimizer 102-3, and so on, and the second output NO2 of the power optimizer of the N-1 stage is coupled to the first output NO1 of the power optimizer 102-N of the succeeding stage adjacent thereto. The output capacitor CO of each power optimizer is connected between its first and second output terminals NO1-NO2, and the total cascade voltage provided by the link is also equal to the superimposed value of the voltage of CO on the output capacitors of its respective multi-stage power optimizers 102-1 to 102-N, so that the cascade voltage superimposed by the voltages output by the respective multi-stage power optimizers 102-1 to 102-N on the transmission cascade line is supplied to an electric power device such as a combiner box or an inverter for combiner and re-inversion, and the like, and the cascade voltage is supplied by a bus LN1-LN 2.
Referring to fig. 6, a cascade voltage of the multi-stage power optimizer is provided between the first output NO1 of the first stage power optimizer and the second output NO2 of the last stage power optimizer in the multi-stage power optimizer, the first output NO1 of the first stage power optimizer corresponds to an equivalent cathode of the multi-stage optimizer chain, and the second output NO2 of the last stage power optimizer corresponds to an equivalent anode of the multi-stage optimizer chain.
Referring to fig. 7, photovoltaic module 103-M utilizes power optimizer 102-M to generate the desired output voltage while performing maximum power point tracking. The second input NI2 of the power optimizer 102-M is connected to the positive pole of the photovoltaic module 103-M and the first input NI1 of the power optimizer 102-M is connected to the negative pole of the photovoltaic module 103-M. It is noted that an output voltage is provided between the first output NO1 and the second output NO2 of the voltage converting circuit or power optimizer 102-M, and in addition an output capacitor CO is connected between the first output NO1 and the second output NO 2. The voltage conversion circuit performs DC/DC voltage conversion on the voltage provided by the photovoltaic module and synchronously performs maximum power tracking calculation, and finally the DC output voltage and power output by the voltage conversion circuit are generated between the first output terminal and the second output terminal of the power optimizer 102-M, and the output voltage is loaded on the output capacitor CO. The power switch S1 and the power switch S2 of the buck converter circuit block in the power optimizer 102-M are connected in series between the first input NI1 and the second input NI2, and the power switch S3 and the power switch S4 of the boost converter circuit of the power optimizer 102-M are connected in series between the first output NO1 and the second output NO 2. Wherein both the power switch S1 and the power switch S2 in the Buck converter circuit module are connected to a first interconnection node NX1 and both the power switch S3 and the power switch S4 in the Boost converter circuit module are connected to a second interconnection node NX2, a main inductive element L is provided between the first interconnection node NX1 to which both the front-side power switches S1-S2 are connected and the second interconnection node NX2 to which both the rear-side power switches S3-S4 are connected in the Buck-Boost circuit topology, wherein the first output terminal NO1 and the first input terminal NI1 may be directly coupled together and set their potentials to be substantially the same. An input capacitance CIN is provided between the first input NI1 and the second input NI 2. The processor of the power optimizer configuration may be used to drive power switches S1-S4, where both M and N of the context are natural numbers. Also adjacent photovoltaic modules 103-N utilize power optimizer 102-N to generate the desired output voltage and perform maximum power point tracking.
Referring to fig. 8, each of the power optimizers corresponding to those of fig. 1-7 above is replaced by a bypass device. The first-stage bypass device 152-1, the second-stage bypass device 152-2, up to the so-called nth-stage bypass device 152-N, and the like are connected in series by a series line, and in a link in which the multistage bypass devices 152-1 to 152-N are connected in series, the connection relationship is: the second output terminal of any previous stage bypass device is coupled to the first output terminal of the adjacent next stage bypass device, and the link provides a total cascade voltage equal to the superposition of the respective output voltages of the plurality of stages of bypass devices therein. The specific relationship of the link is as follows: the second output NO2 of the first stage bypass device 152-1 is coupled to the first output NO1 of the adjacent succeeding stage, i.e., the second stage bypass device 152-2, the second output NO2 of the second stage bypass device 152-2 is coupled to the first output NO1 of the adjacent succeeding stage, i.e., the third stage bypass device 152-3, and so on, the second output NO2 of the N-1 stage bypass device is coupled to the first output NO1 of its adjacent succeeding stage bypass device 152-N. Therefore, the cascade voltage obtained by superimposing the voltages output from the respective multi-stage bypass devices 152-1 to 152-N on the transmission cascade line is supplied to the power equipment such as the combiner box or the inverter for the re-inversion of the current, and the cascade voltage is supplied from the bus LN1 to LN 2.
Referring to fig. 8, photovoltaic module 103-M utilizes bypass device 152-M to perform a switch into or out of a link in which multiple levels of bypass devices are connected in series. The first input NI1 of the bypass device 152-M is connected to the negative pole of the photovoltaic module 103-M and the second input NI2 of the bypass device 152-M is connected to the positive pole of the photovoltaic module 103-M. In an alternative but non-limiting embodiment, the first NO1 and the second NO2 output of the bypass device 152-M correspond to the power generated by the photovoltaic module 103-M, and the output capacitance CO can be selected to be connected between the first NO1 and the second NO2 output, and the capacitance CO can be optionally eliminated. The embodiment of fig. 8 replaces the power optimizer of fig. 1 with a bypass device. In the topology of the bypass device 152-M: the access switch SQ1 is coupled between the second input NI2 and the second output NO2, or the access switch SQ1 is coupled between the first input NI1 and the first output NO 1. In any case, the switch is coupled between the positive pole of the module and the second output NO2 or between the negative pole of the module and the first output NO 1. The removal switch SQ2 in the bypass device topology is coupled between the first output NO1 and the second output NO 2. The processor 112 of the configuration of the bypass device 152-M drives the switch SQ1 on and the photovoltaic module 103-M is connected into the chain of the series connection of the multistage bypass devices and contributes its voltage and power portion to the cascade voltage, at which time the processor 112 also drives the switch SQ2 off. Whereas the processor 112 of the configuration of the bypass device 152-M drives the removal switch SQ2 on and the photovoltaic module 103-M is shielded/bypassed from the link in which the multistage bypass device is connected in series, the photovoltaic module 103-M cannot contribute its voltage and power components to the cascade voltage of this link, and the processor 112 now also drives the access switch SQ1 off. The function of the bypass means is then: for bypassing a corresponding one of the photovoltaic modules and inhibiting the supply of electrical energy into the link, or for switching a corresponding one of the photovoltaic modules from the screening/bypassing state to the access state and supplying electrical energy into the link. Also adjacent photovoltaic modules 103-N utilize bypass devices 152-N to generate the desired output voltage and power, and photovoltaic modules 103-N herein also utilize bypass devices 152-N to perform either bypassing from a chain of serially connected multiple stages of bypass devices or performing a state recovery from a bypassed state to a connected chain. Comparing this embodiment with the embodiment of fig. 7, if the fourth switch S4 in the Buck-Boost circuit Buck-Boost is continuously turned on and the second switch S2 is continuously turned off, the first switch S1 may be equivalent to the switch-in switch SQ1 and the third switch S3 may be equivalent to the switch-out switch SQ2, that is, the Buck-Boost circuit of fig. 7 may also be used as a bypass device indirectly, and only the cooperation of the processor 112 is required.
Referring to fig. 8 in combination with the previous embodiments corresponding to fig. 1-7, a cascade voltage of the multi-stage bypass devices 152-1 to 152-N is provided between the first output NO1 of the first stage bypass device and the second output NO2 of the last stage bypass device of the multi-stage bypass devices, the first output NO1 of the first stage bypass device corresponding to the equivalent negative pole of the multi-stage bypass device chain, and the second output NO2 of the last stage bypass device corresponding to the equivalent positive pole of the multi-stage bypass device chain. Such as in fig. 1: the first stage bypass device 152-1 replaces the original first stage power optimizer 102-1, the second stage bypass device 152-2 replaces the original second stage power optimizer 102-2 in the link, the third stage bypass device 152-3 replaces the original third stage power optimizer 102-3, and so on until the so-called nth stage bypass device 152-N replaces the original nth stage power optimizer 102-N, whereby the multistage bypass devices, etc. are connected in series by a series connection line, i.e., each of the optimizers of fig. 1 is replaced by the bypass device described in the embodiment of fig. 8, or by the buck-boost circuit of fig. 7 that can be used as a bypass device. The bypass device transfers the electrical energy received by the input NI1-NI2 from the photovoltaic module to its output NO1-NO2, which provides the output power.
While the present invention has been described with reference to the preferred embodiments and illustrative embodiments, it is to be understood that the invention as described is not limited to the disclosed embodiments. Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above description. Therefore, the appended claims should be construed to cover all such variations and modifications as fall within the true spirit and scope of the invention. Any and all equivalent ranges and contents within the scope of the claims should be considered to be within the intent and scope of the present invention.

Claims (6)

1. A method of locating a fault in a tandem-type photovoltaic power generation system, characterized by:
a plurality of first devices connected in series in a cascade fashion and forming a link, each first device for transferring electrical energy received at its input from one of the photovoltaic modules to its output for providing output power;
the first device is a power optimizer: the photovoltaic power generation device is used for setting the output power of one photovoltaic assembly corresponding to the photovoltaic power generation device at a maximum power point; the multistage power optimizer is connected in series and provides electric energy for the inverter to invert direct current to alternating current, the direct current bus is connected in series to form the multistage power optimizer, and the series power optimizer adopts a fixed voltage design, namely, the voltage of the direct current bus is kept unchanged;
the fault event for a fault arc is detected by an arc sensor on the dc bus connecting a plurality of first devices in series without the need for detecting by an arc sensor at the output of each first device individually;
parasitic capacitance exists between the photovoltaic module or the first device and the ground, a common-mode leakage current generation mechanism is that the photovoltaic module or the first device and the inverter form a common-mode loop through the parasitic capacitance, an inverter bridge of the inverter can generate common-mode voltage and the common-mode voltage generates common-mode leakage current in the common-mode loop, and the common-mode leakage current causes fault electric arcs;
the method comprises the following steps:
detecting the output end potential of each first device;
comparing the output end potential of each first device with the output end potential of the first device at the previous stage;
when the output end potential of any first device is detected to be lower than the output end potential of the first device at the previous stage, and on the premise that the sum of the power loss caused by the inherent power conversion efficiency of the any first device and the actual output power of the first device is lower than the output power of a photovoltaic module corresponding to the any first device, the position of the fault event is judged to occur at the any first device.
2. The method of claim 1, wherein:
when a plurality of first devices are connected in series, the output end potential of the first device is lowest and the output end potential of the last first device is highest.
3. The method of claim 1, wherein:
each first device comprises first and second outputs for providing output power;
when a plurality of first devices are connected in series, the second output terminal of any previous first device is coupled to the first output terminal of an adjacent subsequent first device; wherein
The potential of the first output terminal of the first device is the lowest; and
the potential of the second output terminal as the last first device is highest; thereby to obtain
The plurality of first devices provide a total string voltage equal to a sum of voltages between the first output terminal of a first device and the second output terminal of a last first device among the plurality of first devices.
4. The method of claim 3, wherein:
the manner of detecting the output terminal potential for each first device to output power includes:
the respective potentials of the first and second output terminals of each of the first devices are simultaneously detected.
5. The method of claim 4, wherein:
detecting the failure event of any one of the first devices comprises:
and detecting whether the potential of the first output end of the first-stage output circuit is continuously equal to the potential of the second output end of the first-stage output circuit, and/or detecting whether the potential of the second output end of the first-stage output circuit is continuously higher than the potential of the second output end of the first-stage output circuit.
6. The method of claim 4, wherein:
detecting the failure event of any one of the first devices comprises:
whether the potential of the first output terminal is lower than that of the second output terminal is detected.
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