CN109587090B - Three-path carrier index differential chaotic shift keying modem and method - Google Patents

Abstract

The invention discloses a three-path carrier index differential chaotic shift keying modem and a method, belonging to the technical field of chaotic communication. The three-path index modulation is realized by two layers in a mode of inter-layer mutual reference, the two layers of modulation are distinguished by means of the chaotic signal and the Hilbert signal which are orthogonal to each other, and the signals are modulated and demodulated by using an index mapping rule and an anti-index mapping rule. On the premise of occupying the same frequency band, compared with the existing carrier index differential chaotic shift keying system, a reference signal in the system is only used as a reference of an information signal and does not carry any information, while each layer of information signal of the invention is used as a reference signal of other layers while transmitting information bits, an independent reference signal is not required to be additionally sent, higher bit transmission rate, higher frequency spectrum utilization rate and better data security are obtained, and the bit error rate can be reduced.

Description

Three-path carrier index differential chaotic shift keying modem and method

Technical Field

The invention belongs to the technical field of chaotic communication, relates to a multi-carrier chaotic communication system utilizing carrier index modulation, and particularly relates to a three-path carrier index differential chaotic shift keying modem and a method.

Background

In recent years, the chaotic signal has a wide development prospect and a great practical value in the communication and information field by virtue of good autocorrelation and sensitivity to an initial value. The chaotic signal not only has good autocorrelation and cross correlation, but also has statistical characteristics similar to white noise, and the characteristics make the chaotic signal very suitable for being used as a spreading code in spread spectrum communication. Meanwhile, by utilizing the sensitivity of the chaotic signal to the initial value, a large number of approximately orthogonal chaotic signals can be obtained by changing the initial value, and the characteristic is suitable for distinguishing different users in a multi-user environment, thereby meeting the requirement of multi-user communication on user identification codes. The chaotic digital modulation uses an aperiodic broadband chaotic signal to replace a sinusoidal carrier in the traditional digital modulation, and is used as a novel spread spectrum modulation, the chaotic digital modulation not only has the advantages similar to other spread spectrum modulation schemes, including interference resistance, channel attenuation resistance and the like, but also has unique advantages, including: high communication safety, low power consumption, low hardware cost and the like. Therefore, the chaotic digital modulation technology has become one of the hot issues of concern and research in the nonlinear science and information science community.

Because the problem of robust chaotic synchronization caused by a coherent mode is not solved at present, most of the existing chaotic digital modulation and demodulation methods are based on a transmission reference method, namely, a reference signal and a signal carrying information are both sent to a receiving end. Among them, the Differential Chaos Shift Keying (DCSK) modulation and demodulation method is one of the classic schemes, and DCSK shows strong competitiveness in many practical application occasions (including wireless personal area networks, wireless sensor networks, etc.) by virtue of its simple and convenient first-sending equipment and better error code performance. However, since the DCSK employs time division multiple access to separate the reference signal and the information signal, a wideband Radio Frequency (RF) delay line is inevitably used in the transceiver. The use of cmos technology to implement RF delay lines is difficult and difficult to integrate, which results in the inability of such systems to meet the requirements of some high-speed communication systems, such as ultra-wideband communication.

In order to solve the above problems, a Carrier-Index Differential Chaos Shift Keying (CI-DCSK) modulation and demodulation method simultaneously transmits a reference signal and an information signal using a plurality of subcarriers, and distinguishes the reference signal and the information signal by subcarriers of different frequency bands. Among all the subcarriers, there is a fixed subcarrier for transmitting the reference signal, and the remaining subcarriers select 1 subcarrier for transmitting the information signal according to the data bit stream. By occupying extra spectrum resources, the CI-DCSK eliminates a delay unit in the transceiver, and the transmission rate and the bit error rate performance of the CI-DCSK are improved compared with that of the DCSK. However, the CI-DCSK has the following defects: firstly, the transmission rate and the frequency spectrum utilization rate of the CI-DCSK are still relatively low, and the requirements of modern communication cannot be met; secondly, the improvement of the error code performance is influenced by the lower energy efficiency of the CI-DCSK; in addition, the CI-DCSK trades spectrum resources for improvement of transmission rate, 1 bit needs to occupy 1 time of frequency band in addition for transmission, and at present, the shortage of CI-DCSK becomes one of the key factors restricting the development of CI-DCSK.

Disclosure of Invention

The invention aims to overcome the defects in the prior art, provides a three-way carrier index differential chaotic shift keying modem and a three-way carrier index differential chaotic shift keying method, and solves the technical problems of low transmission rate and low spectrum utilization rate of the conventional CI-DCSK modulation and demodulation method.

In order to solve the technical problem, the invention provides a three-path carrier index differential chaotic shift keying modulation method, which is characterized by comprising the following steps of:

dividing a frequency band required by signal transmission into M +1 subcarrier frequency bands;

generating a discrete chaotic signal sequence;

performing Hilbert transform on the discrete chaotic signal sequence to obtain a discrete Hilbert signal sequence;

performing pulse shaping filtering on the discrete chaotic signal sequence to obtain a corresponding chaotic pulse signal;

performing pulse shaping filtering on the discrete Hilbert signal sequence to obtain a corresponding Hilbert pulse signal;

converting 3p-2 serial data bits to be transmitted into 3 paths of parallel index bits, wherein the 1 st path has p index bits; the 2 nd path and the 3 rd path both have p-1 index bits; wherein

；

Performing index mapping on the index bit of the 1 st path to obtain M modulation coefficients of the 1 st path, wherein the M modulation coefficients are used as M information subcarrier modulation coefficients of a1 st layer;

performing index mapping on the 2 nd path index bit to obtain M/2 modulation coefficients of the 2 nd path;

index mapping is carried out on the index bit of the 3 rd path to obtain M/2 modulation coefficients of the 3 rd path;

taking the 2 nd path M/2 modulation coefficient as the front M/2 bit of the cyclic shift, taking the 3 rd path M/2 modulation coefficient as the back M/2 bit of the cyclic shift, and setting the M/2+1 bit of the cyclic shift as '0';

performing cyclic shift on the M +1 inputs to generate M +1 information subcarrier modulation coefficients of a layer 2;

multiplying the chaotic pulse signal by M information subcarrier modulation coefficients of a layer 1 respectively to generate M product signals of the layer 1;

multiplying the Hilbert pulse signals by M +1 information subcarrier modulation coefficients of the 2 nd layer respectively to generate M +1 product signals of the 2 nd layer;

correspondingly adding the M product signals of the 1 st layer with the first M product signals of the 2 nd layer respectively to generate first M modulation signals, and taking the M +1 th product signal of the 2 nd layer as the M +1 th modulation signal;

respectively multiplying the M +1 information subcarriers by the M +1 modulation signals correspondingly to generate M +1 information signals modulated by the carriers;

the M +1 information signals modulated by the carrier wave are added and then transmitted by an antenna.

Further, the index mapping rule: the index mapping object is an index bit with the length of p, the index mapping object is an information subcarrier modulation coefficient with the length of M, and the index mapping process comprises the following steps: and generating 1 index serial number a according to the index bit with the length p, wherein a is more than or equal to 1 and less than or equal to M, and generating a modulation coefficient with the length M according to the index serial number, wherein the a-th coefficient in the modulation coefficient is 1, and the rest is 0.

Further, the method for generating the index sequence number according to the index bit is as follows: the binary index bits are converted to a decimal number and then to one.

Further, the number and direction of the cyclically shifted bits depends on the value of (M/2+1-a), and if (M/2+1-a) is greater than 0, the | M/2+1-a | bits are cyclically shifted to the left; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, no shift is required.

Correspondingly, the invention also provides a three-path carrier index differential chaotic shift keying modulator, which is characterized by comprising 1 chaotic signal generator, 1 Hilbert filter, 2 pulse shaping filters, 1 serial-parallel converter, 3 index mappers, 1 cyclic shifter, 2M +1 modulation multipliers, M modulation adders, M +1 carrier multipliers and 1 carrier adder, wherein the chaotic signal generator is connected with the 1 chaotic signal generator through the M modulation adders;

the 1 chaotic signal generator is used for generating a discrete chaotic signal sequence;

the 1 Hilbert filter is used for generating a discrete Hilbert signal sequence by performing Hilbert transform on the discrete chaotic signal sequence;

the pulse shaping filter 1 in the 2 pulse shaping filters is used for performing pulse shaping filtering on the discrete chaotic signal sequence to generate a chaotic pulse signal in the current symbol period; the pulse shaping filter 2 is used for carrying out pulse shaping filtering on the discrete Hilbert signal sequence to generate a Hilbert pulse signal in the current symbol period;

the serial-to-parallel converter in the 1 serial-to-parallel converters is used for passing 3p-2 serial data bits to be transmitted in the current symbol periodConverting the data into 3 paths of parallel index bits through serial-parallel conversion, wherein the 1 st path of p index bits, and the 2 nd path and the 3 rd path of p-1 index bits; wherein

；

Index mapper 1 in the 3 index mappers performs index mapping on the index bit of the 1 st path to generate 1 index serial number a and M modulation coefficients of the 1 st path, where the M modulation coefficients of the 1 st path are also M information subcarrier modulation coefficients of the 1 st layer; the index mapper 2 performs index mapping on the index bits of the 2 nd path to generate M/2 modulation coefficients of the 2 nd path; the index mapper 3 performs index mapping on the index bit of the 3 rd path to generate M/2 modulation coefficients of the 3 rd path;

the 1 cyclic shifter has M +1 inputs, the M/2 modulation coefficients of the 2 nd path generated by the index mapper 2 are used as the first M/2 inputs of the cyclic shifter, the M/2 modulation coefficients of the 3 rd path generated by the index mapper 3 are used as the last M/2 inputs of the cyclic shifter, and the M/2+1 input of the cyclic shifter is '0';

the first M modulation multipliers in the 2M +1 modulation multipliers multiply the chaotic pulse signals with M information subcarrier modulation coefficients of a layer 1 respectively to generate M product signals of a path 1; the subsequent M +1 modulation multipliers correspondingly multiply the Hilbert pulse signals with M +1 information subcarrier modulation coefficients of the layer 2 respectively to generate M +1 product signals of the layer 2;

the M modulation adders correspondingly add the M product signals of the 1 st layer with the first M product signals of the 2 nd layer respectively to generate M modulation signals, and the M +1 th product signal of the 2 nd layer is directly used as the M +1 th modulation signal;

the carrier multiplier in the M +1 carrier multipliers multiplies M +1 information subcarriers with M +1 modulation signals correspondingly respectively to generate M +1 information signals modulated by carriers;

and the 1 carrier adder adds all the M +1 information signals modulated by the carrier and then sends the information signals through an antenna.

Further, the index mapping rule: the index mapping object is an index bit with the length of p, the index mapping object is an information subcarrier modulation coefficient with the length of M, and the index mapping process comprises the following steps: and generating 1 index serial number a according to the index bit with the length p, wherein a is more than or equal to 1 and less than or equal to M, and generating a modulation coefficient with the length M according to the index serial number, wherein the a-th coefficient in the modulation coefficient is 1, and the rest is 0.

Further, the cyclic shifter cyclically shifts the M +1 inputs according to the index sequence number a generated by the index mapper 1, the number and direction of the cyclically shifted bits depend on the value of (M/2+1-a), and if (M/2+1-a) is greater than 0, the cyclic shift is performed to the left by | M/2+1-a | bits; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, then there is no operation.

Correspondingly, the invention also provides a three-path carrier index differential chaotic shift keying demodulation method, which is characterized by comprising the following steps of:

multiplying the received signals by M +1 synchronous subcarriers respectively to generate M +1 product signals;

respectively carrying out matched filtering on the M +1 product signals, carrying out time domain sampling on the filtered M +1 product signals, and recovering M +1 discrete information signal sequences;

performing Hilbert transform on the first M discrete information signal sequences in the M +1 discrete information signal sequences to generate M discrete Hilbert signal sequences;

correlating the M discrete Hilbert signal sequences with the M +1 discrete information signal sequences, respectively, to generate a matrix Z of M (M +1)₁；

To matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂；

To matrix Z₂The following operations were carried out: for row i, find the maximum number in the previous M/2 columns, store this maximum number in Z₃And stores the maximum number of column numbers in Z₃Column 2 of row i, i ∈ [1, M ]](ii) a To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₃；

To matrix Z₂The following operations were carried out: for row i, find the maximum number in M/2 columns, store this maximum number in Z₄And a value obtained by subtracting (M/2+1) from the maximum number of column numbers is stored in Z₄Column 2 of row i, i ∈ [1, M ]](ii) a To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₄；

Will matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅;

According to matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The row sequence number of the largest number in;

according to matrix Z₃And the demodulation coefficient k of the 1 st path generated in step S9₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

according to matrix Z₄And the demodulation coefficient k of the 1 st path generated in step S9₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₃Kth₁Row 2 column data;

demodulation coefficient k according to path 1₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

demodulation coefficient k according to path 2₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

demodulation coefficient k according to path 3₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and combining the index bit demodulated by the path 1, the index bit demodulated by the path 2 and the index bit demodulated by the path 3 through parallel-to-serial conversion to obtain serial bit data to be transmitted by a transmitting end.

Further, the de-indexing mapping rule: the de-indexed mapping object is the sequence number of the information subcarrier

Reverse indexingThe target is the demodulated index bit with the length p, and the inverse index mapping process is as follows: according to the sequence number of the information subcarrier

The generation of demodulated index bits of length p is the inverse operation of ' generating 1 index number a ' from index bits of length p ' in the index mapping rule.

Further, for matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂The method comprises the following steps:

for the ith row, the number and direction of bits of the cyclic shift depends on the value of (M/2+1-i), and if (M/2+1-i) is greater than 0, the | M/2+1-i | bits are cyclically shifted to the right; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) is equal to 0, then there is no operation, for matrix Z₁After the above operations are performed on each row.

Correspondingly, the invention also provides a three-path carrier index differential chaotic shift keying demodulator, which is characterized by comprising the following components: the device comprises M +1 carrier multipliers, M +1 matched filters, M +1 sampling switches, 1 Hilbert filter, a first calculation module, a second calculation module, a third calculation module, a fourth calculation module, a fifth calculation module, a sixth calculation module, a seventh calculation module, an eighth calculation module, a ninth calculation module, a tenth calculation module, an eleventh calculation module and 1 parallel-serial converter;

the M +1 carrier multipliers respectively multiply the received signals by using M +1 synchronous subcarriers to generate M +1 product signals;

the M +1 matched filters are used for respectively carrying out matched filtering on the M +1 product signals;

the M +1 sampling switches respectively perform time domain sampling on the M +1 product signals after matched filtering to recover M +1 discrete information signal sequences;

the 1 Hilbert filter generates M discrete Hilbert signals from the first M discrete information signal sequences through Hilbert transform;

the first computing module is used for computing M discrete HilbertThe special signals are respectively correlated with M +1 discrete information signal sequences to generate a matrix Z of M (M +1)₁M +1 numbers in the ith row of the matrix represent correlation values of the ith discrete hilbert signal after being correlated with the M +1 discrete information signal sequences;

the second calculation module is used for calculating the matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂；

The third calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in the first M/2 columns, store this number in Z₃And stores the maximum number of column numbers in Z₃To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₃；

The fourth calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in M/2 columns after, store this number in Z₄And stores the maximum number of column numbers in Z₄To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₄；

The fifth calculation module is used for calculating the matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅；

The sixth calculation module according to the matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The column number of the largest number in;

the seventh calculation module according to the matrix Z₃And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

the eighth calculation module according to the matrix Z₄And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₄Kth₁Row 2 column data;

the ninth calculation module is used for generating a demodulation coefficient k of the 1 st path₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

the tenth calculation module is used for calculating the demodulation coefficient k according to the 2 nd path₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

the eleventh calculating module is used for calculating the demodulation coefficient k according to the 3 rd path₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and in the parallel-to-serial converter, the index bit demodulated by the 1 st path, the index bit demodulated by the 2 nd path and the index bit demodulated by the 3 rd path are combined into a 1-path serial demodulation data bit stream through parallel-to-serial conversion.

Further, the de-indexing mapping rule: the de-indexed mapping object is the sequence number of the information subcarrier

The target of the inverse index mapping is the demodulated index bit with the length p, and the inverse index mapping process is as follows: according to the sequence number of the information subcarrier

The generation of demodulated index bits of length p is the inverse operation of ' generating 1 index number a ' from index bits of length p ' in the index mapping rule.

Further, for matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂The method comprises the following steps:

for the ith row, the number and direction of bits of the cyclic shift depends on the value of (M/2+1-i), and if (M/2+1-i) is greater than 0, the | M/2+1-i | bits are cyclically shifted to the right; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) is equal to 0, then there is no operation, for matrix Z₁After the above operations are performed on each row.

Compared with the prior art, the invention has the following beneficial effects: the invention realizes three-way index modulation by utilizing the inter-layer mutual reference signals, so that the bit transmission rate of the system is increased to two to three times, the bit error rate performance, the energy efficiency spectrum utilization rate and the data security of the system can be improved, and the advantages and the positive effects are reflected in a centralized way as follows:

1) the modem and the method realize two-layer index modulation through the orthogonal chaotic signals and the Hilbert transform thereof, wherein one-way index modulation is arranged on the layer 1, two-way index modulation is arranged on the layer 2, and the three-way index modulation enables the bit transmission rate of the system to be improved to two times to three times of that of a CI-DCSK system.

2) Compared with the reference signal in the CI-DCSK system, the modem and the method provided by the invention have the advantages that in each symbol period, the reference signal in the CI-DCSK system is only used as the reference of the information signal and does not carry any information, and the information signal of each layer is also used as the reference signal of other layers while information bits are transmitted, so that independent reference signals are not required to be additionally sent, and the system has better bit error rate performance.

3) The modem and the method provided by the invention realize secondary utilization of frequency spectrum resources in a two-layer index modulation mode under the condition of not occupying additional frequency bands, thereby improving the frequency spectrum utilization rate of the invention.

4) The modem and the method divide the available frequency band into M +1 sub-carrier frequency bands, wherein M sub-carriers are used for the modulation of the 1 st layer, the modulation of the 2 nd layer uses all M +1 sub-carriers, and when the two-layer index modulation is carried out, the layer 2 modulation distributes the rest sub-carriers after the layer 1 index modulation occupies 1 sub-carrier. The allocation rule of the sub-carrier can be adjusted (different allocation rules need to adjust the cyclic shifter in the transceiver device), and the variability of the allocation rule of the sub-carrier enables the system to have better communication confidentiality.

Drawings

FIG. 1 is a schematic flow chart of a three-way carrier index differential chaotic shift keying modulation and demodulation method according to the present invention;

FIG. 2 is a schematic structural diagram of a three-way carrier-indexed differential chaotic shift keying modulator according to the present invention;

FIG. 3 is a schematic structural diagram of a three-way carrier index differential chaotic shift keying demodulator according to the present invention;

fig. 4 is a comparison graph of the error performance of the modulation and demodulation method of the present invention and the conventional CI-DCSK method in an additive white gaussian noise channel.

Detailed Description

The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.

The invention discloses a three-path carrier index differential chaotic shift keying modulation method, which comprises the following steps:

s1, dividing the frequency band needed by signal transmission into M +1 sub-carrier frequency bands;

s2, generating a discrete chaotic signal sequence;

s3, performing Hilbert transform on the discrete chaotic signal sequence to obtain a discrete Hilbert signal sequence;

s4, performing pulse shaping filtering on the discrete chaotic signal sequence to obtain a corresponding chaotic pulse signal;

s5, performing pulse shaping filtering on the discrete Hilbert signal sequence to obtain a corresponding Hilbert pulse signal;

s6, converting 3p-2 serial data bits to be transmitted into 3 paths of parallel index bits, wherein, the 1 st path has p index bits; the 2 nd path and the 3 rd path both have p-1 index bits; wherein

；

S7, index mapping the index bit of the 1 st path to obtain M modulation coefficients of the 1 st path as M information subcarrier modulation coefficients of the 1 st layer;

s8, index mapping the 2 nd path index bit to obtain M/2 modulation coefficients of the 2 nd path;

s9, index mapping the index bit of the 3 rd path to obtain M/2 modulation coefficients of the 3 rd path;

s10, taking the 2 nd path M/2 modulation coefficient as the front M/2 bit of the cyclic shift, taking the 3 rd path M/2 modulation coefficient as the back M/2 bit of the cyclic shift, and setting the M/2+1 bit of the cyclic shift as '0';

s11, carrying out cyclic shift on the M +1 inputs to generate M +1 information subcarrier modulation coefficients of the 2 nd layer;

s12, multiplying the chaotic pulse signal by M information subcarrier modulation coefficients of the layer 1 respectively to generate M product signals of the layer 1;

s13, the Hilbert pulse signals are multiplied by M +1 information subcarrier modulation coefficients of the 2 nd layer respectively to generate M +1 product signals of the 2 nd layer;

s14, adding the M product signals of the 1 st layer with the first M product signals of the 2 nd layer correspondingly to generate the first M modulation signals, and taking the M +1 th product signal of the 2 nd layer as the M +1 th modulation signal;

s15, multiplying M +1 information sub-carriers respectively with M +1 modulation signals to generate M +1 information signals modulated by carriers;

s16, the M +1 carrier-modulated information signals are added and transmitted from the antenna.

Example 1

The embodiment of the invention relates to a three-path carrier index differential chaotic shift keying modulation method, which is used for carrying out three-path carrier index differential chaotic shift keying modulation on a signal at a sending end, and specifically comprises the following processes as shown in figure 1:

step 1: if 3p-2 serial data bits are required for transmission, then M =2 is required^p+1 subcarriers. The frequency band required by signal transmission is divided into M +1 sub-carrier frequency bands with the frequencies respectively

The numbers thereof correspond to 1,2, … and M +1, respectively.

Step 2: in order to ensure the autocorrelation of the chaotic signal, the length of the discrete chaotic signal sequence is generally equal to or greater than 16. In 1 symbol period [0, T_b]In the interior, the chaotic signal generator outputs 1 discrete chaotic signal sequence with the length of 16

；

And step 3: in 1 symbol period [0, T_b]And (3) generating a discrete Hilbert signal sequence by the discrete chaotic signal sequence generated in the step (2) through a Hilbert filter

；

And 4, step 4: and (3) the discrete chaotic signal sequence generated in the step (2) passes through a pulse forming filter 1, the time domain impulse response is h (t), the pulse forming filtering is completed, and a chaotic pulse signal in the current symbol period is generated:

wherein the content of the first and second substances,trepresents time;

represents a chip time;

and 5: and (3) passing the discrete Hilbert signal serial number generated in the step (3) through a pulse shaping filter 2, wherein the time domain impulse response is h (t), completing pulse shaping filtering, and generating a Hilbert pulse signal in the current symbol period:

wherein the content of the first and second substances,trepresents time;T _c represents a chip time;

step 6: converting 1 path of serial data bits 1101110110101 with the length of 13 to be transmitted in the current symbol period into 3 paths of parallel low-speed index bits through a serial-parallel converter, wherein the 1 path of the serial data bits is 11011 with the length of 5, the 2 path of the serial data bits is 1011 with the length of 4, and the 3 path of the serial data bits is 0101 with the length of 4;

index mapping rule: the index mapping object is an index bit with the length of p, the index mapping object is an information subcarrier modulation coefficient with the length of M, and the index mapping process comprises the following steps: and generating 1 index serial number a according to the index bit with the length p, wherein a is more than or equal to 1 and less than or equal to M, and generating a modulation coefficient with the length M according to the index serial number, wherein the a-th coefficient in the modulation coefficient is 1, and the rest is 0.

The method for generating the index sequence number in the embodiment of the invention is to convert binary index bits into decimal numbers and add one, for example: index bit =00000, index number a =1 is generated through index mapping, and then a modulation coefficient with length of 32 is generated, wherein the 1 st coefficient in the modulation coefficient is 1, and the rest is 0; index bit =00001, index number a =2 is generated through index mapping, and then a modulation coefficient with length of 32 is generated, wherein the 2 nd coefficient in the modulation coefficient is 1, and the rest is 0; and so on.

Accordingly, the de-indexed mapping rule: the de-indexed mapping object is the sequence number of the information subcarrier

The target of the inverse index mapping is the demodulated index bit with the length p, and the inverse index mapping process is as follows: according to the sequence number of the information subcarrier

The generation of demodulated index bits of length p is the inverse operation of ' generating 1 index number a ' from index bits of length p ' in the index mapping rule.

The method for generating the demodulated index bit in the embodiment of the invention is to use the decimal information subcarrier sequence number

Subtracting one and then converting into binary demodulated index bits of length p, such as: the inverse index maps to the 1 st information subcarrier, i.e.

=1, generating demodulated index bits 00000 by inverse index mapping; the de-indexed mapping object is the 2 nd information subcarrier, i.e.

=2, generating demodulated index bits 00001 through de-indexing mapping; and so on.

And 7: and (4) generating 1 index sequence number a and 32 information subcarrier modulation coefficients of the layer 1 by using the index mapper 1 of the 1 st path index bit generated in the step 6. Wherein, index number a = 28; the 28 th coefficient of the 32 information subcarrier modulation coefficients is 1, and the rest is 0, namely 00000000000000000000000000010000.

And 8: and (4) passing the 2 nd path index bit generated in the step (6) through an index mapper 2 to generate 1 index sequence number and 16 modulation coefficients of the 2 nd path. The index number is 12, the 12 th coefficient of the 16 modulation coefficients is 1, and the rest are 0, that is 0000000000010000.

And step 9: and (4) passing the 3 rd path index bit generated in the step (6) through an index mapper 3 to generate 1 index sequence number and 16 modulation coefficients of the 3 rd path. The index number is 6, the 6 th coefficient of the 16 modulation coefficients is 1, and the rest are 0, that is 0000010000000000.

Step 10: the 16 modulation coefficients of the 2 nd path generated in step 8 are used as the 1 st to 16 th inputs of the cyclic shifter, the 16 modulation coefficients of the 3 rd path generated in step 9 are used as the 18 th to 33 th inputs of the cyclic shifter, and the 17 inputs of the cyclic shifter are '0'.

Step 11: and (3) according to the index number a of the layer 1 generated in the step (7), performing cyclic shift on the M +1 inputs of the cyclic shifter in the step (10) to generate M +1 information subcarrier modulation coefficients of the layer 2. Wherein the number and direction of the cyclic shifts depends on the value of (M/2+1-a), and if (M/2+1-a) is greater than 0, then cyclically shifting | M/2+1-a | bits to the left; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, no shift is required, here

Is an absolute value sign;

in the embodiment of the present invention, 33 inputs of the cyclic shifter in step 10 are cyclically shifted according to the index number a =28 of the layer 1 generated in step 7, and since M/2+1-a = -11<0, the upper 33 bits of data are cyclically shifted to the right by 11 bits, and 33 information subcarrier modulation coefficients of the layer 2, that is, 100000000000000000000010000000000 are generated;

the rule reason for this loop is: after layer 1 occupies one sub-carrier, the rest 2 are^pThe subcarriers are divided into two parts and index-modulated respectively.

'split in two', the cycle rule is illustrated by the following example: now, assume that there are 9 subcarriers, and the numbers are respectively denoted as 1,2, 3, 4, 5, 6, 7, 8, and 9.

(1) If the 1 st path signal is modulated on the sub-carrier wave of the number 1, the sub-carrier waves allocated to the 2 nd path signal are 6, 7, 8 and 9, and the sub-carrier waves allocated to the 3 rd path signal are 2, 3, 4 and 5;

(2) if the 1 st path signal is modulated on the 2 nd subcarrier, the subcarriers allocated to the 2 nd path signal are 7, 8, 9 and 1, and the subcarriers allocated to the 3 rd path signal are 3, 4, 5 and 6;

(3) if the 1 st path signal is modulated on the 3 rd subcarrier, the subcarriers allocated to the 2 nd path signal are 8, 9, 1 and 2, and the subcarriers allocated to the 3 rd path signal are 4, 5, 6 and 7;

and so on.

The reason for this is that it is undesirable for the index modulations to collide (i.e. modulate on the same sub-carrier) as this affects performance.

The rules of the loop here are only for this case.

Step 12: by modulating multipliers

Multiplying the chaotic pulse signals generated in the step 4 by the 32 information subcarrier modulation coefficients of the layer 1 generated in the step 7 respectively to generate 32 product signals of the layer 1;

step 13: by modulating multipliers

Multiplying the Hilbert pulse signals generated in the step 5 by the 33 information subcarrier modulation coefficients of the layer 2 generated in the step 11 respectively to generate 33 product signals of the layer 2;

step 14: by modulating the adder A₁,A₂,…,A_MAdding the 32 products of the layer 1 generated in the step 12 and the first 32 product signals of the layer 2 generated in the step 13 correspondingly to generate 32 modulation signals, and taking the 33-th product signal of the layer 2 generated in the step 13 as a 33-th modulation signal;

step 15: by means of a carrier multiplier U₁,U₂,…,U_M+1The 33 information subcarriers generated in step 1 are multiplied by the 33 modulated information signals generated in step 14, respectively, to generate 33 information signals modulated by the carrier. Wherein, the 28 th information signal is an index modulation signal of the 1 st layer:

the 23 rd information signal is the index modulation signal of the 1 st path in the 2 nd layer:

the 1 st information signal is the index modulation signal of the 2 nd path in the 2 nd layer:

，

represents the phase angle in the carrier modulation, and the remaining information signal is 0;

the present invention has a total of two layers of modulation, where the layer 1 modulated signal may only appear on M subcarriers, while the layer 2 modulated signal may appear on M +1 subcarriers. In actual operation, the two layers of modulated signals are added and then modulated onto the carrier.

Step 16: the carrier adder adds all the 33 information signals generated in step 15 and subjected to carrier modulation, and generates a mixed signal:

this signal is then transmitted via an antenna.

The specific process of the modulation method can obtain the following beneficial effects:

1) there is no pure reference signal (each signal is both a reference signal and carries information bits), which can improve bit error rate performance.

2) After the layer 1 index modulation occupies one subcarrier, the layer 2 modulation allocates the remaining subcarriers, which undoubtedly improves security and confidentiality.

3) Conventional CI-DCSK system 2^pThe +1 sub-carrier can transmit p +1 bits at most, while we can transmit 3p-2 bits under the same carrier resource. Obviously, under the condition of a large number of subcarriers, the method not only has higher transmission rate, but also has higher spectral efficiency.

Example 2

The same inventive concept as the above modulation method, the present invention further provides a three-way carrier index differential chaotic shift keying modulator, as shown in fig. 2, specifically comprising:

the device comprises 1 chaotic signal generator, 1 Hilbert filter, 2 pulse shaping filters, 1 serial-parallel converter, 3 index mappers, 1 cyclic shifter, 2M +1 modulation multipliers, M modulation adders, M +1 carrier multipliers and 1 carrier adder.

The 1 chaotic signal generator is used for generating a discrete chaotic signal sequence;

the 1 Hilbert filter is used for generating a discrete Hilbert signal sequence by performing Hilbert transform on the discrete chaotic signal sequence;

the pulse shaping filter 1 of the 2 pulse shaping filters is used for performing pulse shaping filtering on the discrete chaotic signal sequence to generate chaotic pulse signals in the current symbol period

(ii) a The pulse shaping filter 2 is used for performing pulse shaping filtering on the discrete Hilbert signal sequence to generate a Hilbert pulse signal in the current symbol period

；

The serial-parallel converter in the 1 serial-parallel converters converts 3p-2 serial data bits to be transmitted in the current symbol period into 3 paths of parallel index bits through serial-parallel conversion, wherein the 1 st path of p index bits, and the 2 nd path and the 3 rd path are p-1 index bits;

index mapper 1 of the 3 index mappers performs index mapping on index bits of the 1 st path to generate 1 index sequence number a and M modulation coefficients of the 1 st path

The M modulation coefficients of the 1 st path are also M information subcarrier modulation coefficients of the 1 st layer; the index mapper 2 performs index mapping on the index bits of the 2 nd path to generate M/2 modulation coefficients of the 2 nd path; the index mapper 3 performs index mapping on the index bit of the 3 rd path to generate M/2 modulation coefficients of the 3 rd path;

the 1 cyclic shifter has M +1 inputs, the M/2 modulation coefficients of the 2 nd path generated by the index mapper 2 are used as the first M/2 inputs of the cyclic shifter, the M/2 modulation coefficients of the 3 rd path generated by the index mapper 3 are used as the last M/2 inputs of the cyclic shifter, and the M/2+1 input of the cyclic shifter is '0'. The cyclic shifter circularly shifts the M +1 inputs according to the index sequence number a generated by the index mapper 1, the bit number and direction of the cyclic shift depend on the value of (M/2+1-a), and if (M/2+1-a) is larger than 0, the cyclic shift is carried out to the left by | M/2+1-a | bits; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, then there is no operation. Generating M +1 information subcarrier modulation coefficients of layer 2 after cyclic shift operation

；

Modulation multiplier of the 2M +1 modulation multipliers

The chaotic pulse signal

M information subcarrier modulation coefficients of layer 1 respectively

Correspondingly multiplying to generate M product signals of the 1 st path; modulation multiplier

Will Hilbert pulse signal

M +1 information subcarrier modulation coefficients of layer 2 respectively

Correspondingly multiplying to generate M +1 product signals of the 2 nd layer;

the M modulation adders A₁,A₂,…,A_MRespectively and correspondingly adding the M product signals of the 1 st layer with the first M product signals of the 2 nd layer to generate M modulation signals, wherein the M +1 th product signal of the 2 nd layer is directly used as an M +1 th modulation signal;

a carrier multiplier U of the M +1 carrier multipliers₁,U₂,…,U_M+1Respectively multiplying the M +1 information subcarriers by the M +1 modulation signals correspondingly to generate M +1 information signals modulated by the carriers;

and the 1 carrier adder adds all the M +1 information signals modulated by the carrier and then sends the information signals through an antenna.

The same inventive concept as the above modulation method, the present invention also provides a three-way carrier index differential chaotic shift keying demodulation method, as shown in fig. 1, comprising the following steps:

s1, multiplying the received signal with M +1 synchronous sub-carriers respectively to generate M +1 product signals;

s2, performing matched filtering on the M +1 product signals respectively, performing time domain sampling on the filtered M +1 product signals, and recovering M +1 discrete information signal sequences;

s3, performing Hilbert transform on the first M discrete information signal sequences in the M +1 discrete information signal sequences to generate M discrete Hilbert signal sequences;

s4, M discrete Hilbert signal sequences are respectively correlated with M +1 discrete information signal sequences to generate a matrix Z of M (M +1)₁Wherein Z is₁Each row has M +1 data, the M +1 data of the ith row represents the correlation value after the ith discrete Hilbert signal sequence is correlated with the M +1 discrete information signal sequences, i belongs to [1, M ∈]；

S5, for matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂；

S6, for matrix Z₂The following operations were carried out: for row i, find the maximum number in the previous M/2 columns, store this maximum number in Z₃And stores the maximum number of column numbers in Z₃Column 2 of row i, i ∈ [1, M ]]. To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₃；

S7, for matrix Z₂The following operations were carried out: for row i, find the maximum number in M/2 columns, store this maximum number in Z₄And a value obtained by subtracting (M/2+1) from the maximum number of column numbers is stored in Z₄Column 2 of row i, i ∈ [1, M ]]. To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₄；

S8, converting the matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅;

S9, according to the matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The row sequence number of the largest number in;

s10: according to matrix Z₃And the demodulation coefficient k of the 1 st path generated in step S9₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

s11: according to matrix Z₄And the demodulation coefficient k of the 1 st path generated in step S9₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₃Kth₁Row 2 column data;

s12, according to the demodulation coefficient k of the 1 st path₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

s13, according to the demodulation coefficient k of the 2 nd path₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

s14, according to the demodulation coefficient k of the 3 rd path₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and S15, combining the index bit of the 1 st path demodulation, the index bit of the 2 nd path demodulation and the index bit of the 3 rd path demodulation through parallel-to-serial conversion to obtain serial bit data to be transmitted by the transmitting end.

Example 3

The embodiment of the invention relates to a three-path carrier index differential chaotic shift keying demodulation method, which is used for receiving and demodulating signals at a receiving party, and specifically comprises the following steps as shown in figure 1:

step S1: by means of carrier multipliers T₁,T₂,…,T_M+1The receiving side receives the signal with the frequency of

Multiplying the 33 synchronous sub-carriers respectively to generate 33 product signals;

step S2: pass matched filter F₁,F₂,…,F_M+1The 33 product signals generated in step S1 are subjected to 33 filtering processes matched to the pulse shaping filter used in step 4 of the modulation method, respectivelyThe device carries out matched filtering;

step S3: by means of a sampling switch K₁,K₂,…,K_M+1Respectively to match the filters F₁,F₂,…,F_M+1The output of the signal processing unit is sampled in time domain to recover 33 discrete information signal sequences

；

Step S4: subjecting the first 32 discrete information signal sequences generated in step S3 to hilbert transform by using a hilbert filter to generate 32 discrete hilbert signal sequences

；

Step S5: the relevant operations are as follows:

A=（a1,a2....,an），B=（b1,b2....,bn）

the results for a and B are equal to (a 1 × B1+ a2 × B2+. + an × bn)

The 1 st discrete hilbert signal sequence is correlated with the M +1 discrete information signal sequences, resulting in M +1 correlation values. As Z₁Row 1 of the matrix;

the 2 nd discrete hilbert signal sequence is correlated with the M +1 discrete information signal sequences, resulting in M +1 correlation values. As Z₁Row 2 of the matrix;

by analogy, 32 discrete Hilbert signal sequences are respectively correlated with 33 discrete information signal sequences to generate a matrix Z of 32 × 33₁。

The 32 discrete Hilbert signal sequences generated in step S4 are processed by a first computation module

Respectively with the 33 discrete information signal sequences generated in step S3

Correlation is performed to generate a matrix Z of 32 x 33₁Wherein 33 data of the ith row represents the ithDiscrete Hilbert signal sequence

And 33 discrete information signal sequences

A post-correlation value;

step S6: by means of a second calculation module, the matrix Z generated in step S5 is compared₁Is cyclically shifted, the number and direction of bits of the cyclic shift depending on the value of (M/2+1-i) for the ith row, and if (M/2+1-i) is greater than 0, is cyclically shifted to the right by | M/2+1-i | bits; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) equals 0, there is no shift. To matrix Z₁After performing the above operation on each row of data, a matrix Z of M x (M +1) is generated₂；

For the matrix Z generated in step S5₁Is cyclically shifted, the number and direction of bits of the cyclic shift depending on the value of (M/2+1-i) for the ith row, and if (M/2+1-i) is greater than 0, is cyclically shifted to the right by | M/2+1-i | bits; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) equals 0, there is no displacement. After the above operation is performed for each row, a matrix Z of 32 x 33 is generated₂；

Step S7: by means of a third calculation module, the matrix Z generated in accordance with step S6₂The following operations were carried out: for row i, find the maximum number in the first 16 columns, store this maximum number in Z₃And stores the maximum number of column numbers in Z₃The 2 nd column of the ith row of (1), after performing the above operation on each row, a matrix Z of 32 x 2 is generated₃；

Step S8: by means of a fourth calculation module, the matrix Z generated according to step S6₂The following operations were carried out: for row i, find the maximum number in the last 16 columns, store this maximum number in Z₄And a value obtained by subtracting 17 from the maximum number of column numbers is stored in Z₄The 2 nd column of the ith row of (1), after performing the above operation on each row, a matrix Z of 32 x 2 is generated₄；

Step S9: the matrix Z generated in step S7 is processed by a fifth calculation module₃Column 1 and the matrix Z generated in step S8₄To generate a matrix Z of 32 x 1₅；

Step S10: by means of a sixth calculation module, the matrix Z generated from S9₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The column number of the largest number in;

step S11: by means of a seventh calculation module, the matrix Z generated in accordance with step S7₃And the demodulation coefficient k of the 1 st path generated in step S10₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

the purpose of the above operation is to reduce noise interference on the signal.

Step S12: by means of the eighth calculation module, the matrix Z generated in accordance with step S8₄And the demodulation coefficient k of the 1 st path generated in step S10₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₄Kth₁Row 2 column data;

step S13: the demodulation coefficient k of the 1 st path generated in step S10 is calculated by the ninth calculation module₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

step S14: using the tenth calculation module to generate the demodulation coefficient k of the 2 nd path according to the step S11₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

step S15: generating demodulation coefficient k of path 3 according to step S12 by an eleventh calculation module₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

step S16: the index bit of the 1 st demodulation generated in step S13, the index bit of the 2 nd demodulation generated in step S14, and the index bit of the 3 rd demodulation generated in step S15 are combined and output by a parallel-to-serial converter, and serial bit data to be transmitted by the transmitting end is obtained.

Example 4

The same inventive concept as the above demodulation method, the present invention further provides a three-way carrier index differential chaotic shift keying demodulator, as shown in fig. 3, specifically comprising:

the device comprises M +1 carrier multipliers, M +1 matched filters, M +1 sampling switches, 1 Hilbert filter, 1 DSP chip and 1 parallel-serial converter, wherein a first calculation module, a second calculation module, a third calculation module, a fourth calculation module, a fifth calculation module, a sixth calculation module, a seventh calculation module, an eighth calculation module, a ninth calculation module, a tenth calculation module and an eleventh calculation module are realized in the DSP chip;

the M +1 carrier multipliers T₁,T₂,…,T_M+1Using M +1 synchronized subcarriers

Multiplying the received signals respectively to generate M +1 product signals;

the M +1 matched filters F₁,F₂,…,F_M+1Respectively carrying out matched filtering on the M +1 product signals;

the M +1 sampling switches K₁,K₂,…,K_M+1Respectively carrying out time domain sampling on the M +1 product signals subjected to matched filtering to recover M +1 discrete information signal sequences;

the 1 Hilbert filter generates M discrete Hilbert signals from the first M discrete information signal sequences through Hilbert transform;

the first calculation module is used for respectively carrying out correlation calculation on the M discrete Hilbert signals and the M +1 discrete information signal sequences to generate a matrix Z of M (M +1)₁M +1 numbers in the ith row of the matrix represent correlation values of the ith discrete hilbert signal after being correlated with the M +1 discrete information signal sequences;

the second calculation module is used for calculating the matrix Z₁Is cyclically shifted, for the ith row, the number and direction of bits of cyclic shift depend on (M/2 +)1-i), if (M/2+1-i) is greater than 0, cyclically shifting | M/2+1-i | bits to the right; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) is equal to 0, then there is no operation, for matrix Z₁After performing the above operation on each row, a matrix Z of M x (M +1) is generated₂；

The third calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in the first M/2 columns, store this number in Z₃And stores the maximum number of column numbers in Z₃To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₃；

The fourth calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in M/2 columns after, store this number in Z₄And stores the maximum number of column numbers in Z₄To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₄；

The fifth calculation module is used for calculating the matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅；

The sixth calculation module according to the matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The column number of the largest number in;

the seventh calculation module according to the matrix Z₃And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

the eighth calculation module according to the matrix Z₄And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₄Kth₁Row 2 column data;

the ninth calculation module is used for generating a demodulation coefficient k of the 1 st path₁And de-indexing the mapping rules to recoverIndex bit of the 1 st path demodulation;

the tenth calculation module is used for calculating the demodulation coefficient k according to the 2 nd path₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

the eleventh calculating module is used for calculating the demodulation coefficient k according to the 3 rd path₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and in the 1 parallel-to-serial converter, the index bit demodulated by the 1 st path, the index bit demodulated by the 2 nd path and the index bit demodulated by the 3 rd path are combined into a 1-path serial demodulation data bit stream through parallel-to-serial conversion.

Example 5

The invention adopts computer simulation to carry out transmission test on the three-path carrier index differential chaotic shift keying modulation and demodulation method provided by the invention. In the experiment, the number of transmitted data bits was 18 × 10⁶The discrete chaotic signal sequence is mapped by a second-order chebyshev polynomial

Generating chaotic signal with sampling frequency of 1MHz and symbol duration

The equivalent signal sampling point number in each symbol period is 16, and the roll-off coefficient of the pulse shaping filter

The center frequency interval of all the sub-carriers satisfies

。

Fig. 4 shows the bit error rate performance of the method of the present invention obtained by simulation in an additive white gaussian noise channel. For comparison, the bit error rate performance of the conventional CI-DCSK method simulated under the same conditions is also shown in the figure. It can be seen from the figure that the invention has better bit error rate performance compared with the existing CI-DCSK method, and the improvement of BER performance is more obvious with the increase of signal-to-noise ratio.

In conclusion, the beneficial effects of the invention are as follows:

1) the bit transmission rate is increased to two to three times of that of a CI-DCSK system;

2) the BER performance is improved, and the improvement of the BER performance is more obvious along with the increase of the signal-to-noise ratio;

3) higher energy efficiency and spectrum utilization;

4) and the communication security is better.

The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (10)

1. The three-path carrier index differential chaotic shift keying modulation method is characterized by comprising the following steps of:

dividing a frequency band required by signal transmission into M +1 subcarrier frequency bands;

generating a discrete chaotic signal sequence;

performing Hilbert transform on the discrete chaotic signal sequence to obtain a discrete Hilbert signal sequence;

performing pulse shaping filtering on the discrete chaotic signal sequence to obtain a corresponding chaotic pulse signal;

performing pulse shaping filtering on the discrete Hilbert signal sequence to obtain a corresponding Hilbert pulse signal;

converting 3p-2 serial data bits to be transmitted into 3 paths of parallel index bits, wherein the 1 st path has p index bits; the 2 nd path and the 3 rd path both have p-1 index bits; wherein p is log₂M；

Performing index mapping on the index bit of the 1 st path to obtain M modulation coefficients of the 1 st path, wherein the M modulation coefficients are used as M information subcarrier modulation coefficients of a1 st layer;

performing index mapping on the 2 nd path index bit to obtain M/2 modulation coefficients of the 2 nd path;

index mapping is carried out on the index bit of the 3 rd path to obtain M/2 modulation coefficients of the 3 rd path;

inputting the 2 nd path of M/2 modulation coefficients as the front M/2 bits of the cyclic shift, inputting the 3 rd path of M/2 modulation coefficients as the rear M/2 bits of the cyclic shift, and setting the M/2+1 bit of the cyclic shift as '0'; forming cyclically shifted M +1 inputs;

performing cyclic shift on the M +1 inputs to generate M +1 information subcarrier modulation coefficients of a layer 2;

multiplying the chaotic pulse signal by M information subcarrier modulation coefficients of a layer 1 respectively to generate M product signals of the layer 1;

multiplying the Hilbert pulse signals by M +1 information subcarrier modulation coefficients of the 2 nd layer respectively to generate M +1 product signals of the 2 nd layer;

correspondingly adding the M product signals of the 1 st layer with the first M product signals of the 2 nd layer respectively to generate first M modulation signals, and taking the M +1 th product signal of the 2 nd layer as the M +1 th modulation signal;

respectively multiplying the M +1 information subcarriers by the M +1 modulation signals correspondingly to generate M +1 information signals modulated by the carriers;

the M +1 information signals modulated by the carrier wave are added and then transmitted by an antenna.

2. The three-way carrier index differential chaotic shift keying modulation method according to claim 1, wherein an index mapping rule is as follows: the index mapping object is an index bit with the length of q, the index mapping object is a modulation coefficient with the length of N, and the index mapping process comprises the following steps: generating 1 index serial number b according to the index bit with the length of q, wherein b is more than or equal to 1 and less than or equal to N, and generating a modulation coefficient with the length of N according to the index serial number, wherein the b-th coefficient in the modulation coefficient is 1, and the rest is 0.

3. The three-way carrier index differential chaotic shift keying modulation method of claim 1, wherein the number and direction of cyclically shifted bits depend on the value of (M/2+1-a), where a is an index number generated according to an index mapping rule, and if (M/2+1-a) is greater than 0, then cyclically shifting | M/2+1-a | bits to the left; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, no shift is required.

4. The three-path carrier index differential chaotic shift keying modulator is characterized by comprising 1 chaotic signal generator, 1 Hilbert filter, 2 pulse shaping filters, 1 serial-parallel converter, 3 index mappers, 1 cyclic shifter, 2M +1 modulation multipliers, M modulation adders, M +1 carrier multipliers and 1 carrier adder;

the 1 chaotic signal generator is used for generating a discrete chaotic signal sequence;

the 1 Hilbert filter is used for generating a discrete Hilbert signal sequence by performing Hilbert transform on the discrete chaotic signal sequence;

the pulse shaping filter 1 in the 2 pulse shaping filters is used for performing pulse shaping filtering on the discrete chaotic signal sequence to generate a chaotic pulse signal in the current symbol period; the pulse shaping filter 2 is used for carrying out pulse shaping filtering on the discrete Hilbert signal sequence to generate a Hilbert pulse signal in the current symbol period;

the serial-parallel converter in the 1 serial-parallel converters converts 3p-2 serial data bits to be transmitted in the current symbol period into 3 paths of parallel index bits through serial-parallel conversion, wherein the 1 st path has p index bits, and the 2 nd path and the 3 rd path are both p-1 index bits; wherein p is log₂M；

Index mapper 1 in the 3 index mappers performs index mapping on the index bit of the 1 st path to generate 1 index serial number a and M modulation coefficients of the 1 st path, where the M modulation coefficients of the 1 st path are also M information subcarrier modulation coefficients of the 1 st layer; the index mapper 2 performs index mapping on the index bits of the 2 nd path to generate M/2 modulation coefficients of the 2 nd path; the index mapper 3 performs index mapping on the index bit of the 3 rd path to generate M/2 modulation coefficients of the 3 rd path;

the 1 cyclic shifter has M +1 inputs, the M/2 modulation coefficients of the 2 nd path generated by the index mapper 2 are used as the first M/2 inputs of the cyclic shifter, the M/2 modulation coefficients of the 3 rd path generated by the index mapper 3 are used as the last M/2 inputs of the cyclic shifter, and the M/2+1 input of the cyclic shifter is '0'; performing cyclic shift on the M +1 inputs to generate M +1 information subcarrier modulation coefficients of a layer 2;

the first M modulation multipliers in the 2M +1 modulation multipliers multiply the chaotic pulse signals with M information subcarrier modulation coefficients of a layer 1 respectively to generate M product signals of a path 1; the subsequent M +1 modulation multipliers correspondingly multiply the Hilbert pulse signals with M +1 information subcarrier modulation coefficients of the layer 2 respectively to generate M +1 product signals of the layer 2;

the M modulation adders correspondingly add the M product signals of the 1 st layer with the first M product signals of the 2 nd layer respectively to generate M modulation signals, and the M +1 th product signal of the 2 nd layer is directly used as the M +1 th modulation signal;

the carrier multiplier in the M +1 carrier multipliers multiplies M +1 information subcarriers with M +1 modulation signals correspondingly respectively to generate M +1 information signals modulated by carriers;

and the 1 carrier adder adds all the M +1 information signals modulated by the carrier and then sends the information signals through an antenna.

5. The three-way carrier indexed differential chaotic shift keying modulator of claim 4, wherein the index mapping rule is: the index mapping object is an index bit with the length of q, the index mapping object is a modulation coefficient with the length of N, and the index mapping process comprises the following steps: generating 1 index serial number b according to the index bit with the length of q, wherein b is more than or equal to 1 and less than or equal to N, and generating a modulation coefficient with the length of N according to the index serial number, wherein the b-th coefficient in the modulation coefficient is 1, and the rest is 0.

6. The three-way carrier indexed differential chaotic shift keying modulator of claim 4, wherein the cyclic shifter cyclically shifts the M +1 inputs according to an index number a generated by the index mapper 1, the number and direction of the cyclic shifts depending on the value of (M/2+1-a), and if (M/2+1-a) is greater than 0, cyclically shifts the | M/2+1-a | bits to the left; if (M/2+1-a) is less than 0, circularly shifting | M/2+1-a | bits to the right; if (M/2+1-a) equals 0, then there is no operation.

7. The three-path carrier index differential chaotic shift keying demodulation method is characterized by comprising the following steps of:

multiplying the received signals by M +1 synchronous subcarriers respectively to generate M +1 product signals;

respectively carrying out matched filtering on the M +1 product signals, carrying out time domain sampling on the filtered M +1 product signals, and recovering M +1 discrete information signal sequences;

performing Hilbert transform on the first M discrete information signal sequences in the M +1 discrete information signal sequences to generate M discrete Hilbert signal sequences;

correlating the M discrete Hilbert signal sequences with the M +1 discrete information signal sequences, respectively, to generate a matrix Z of M (M +1)₁；

To matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂；

To matrix Z₂The following operations were carried out: for row i, find the maximum number in the previous M/2 columns, store this maximum number in Z₃And stores the maximum number of column numbers in Z₃Column 2 of row i, i ∈ [1, M ]](ii) a To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₃；

To matrix Z₂The following operations were carried out: for row i, find the maximum number in M/2 columns, store this maximum number in Z₄And a value obtained by subtracting (M/2+1) from the maximum number of column numbers is stored in Z₄Column 2 of row i, i ∈ [1, M ]](ii) a To matrix Z₂After performing the above operation on each row of data, a matrix Z of M × 2 is generated₄；

Will matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅；

According to matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The row sequence number of the largest number in;

according to matrix Z₃And the generated demodulation coefficient k of the 1 st path₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

according to matrix Z₄And the generated demodulation coefficient k of the 1 st path₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₄Kth₁Row 2 column data;

demodulation coefficient k according to path 1₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

demodulation coefficient k according to path 2₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

demodulation coefficient k according to path 3₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and combining the index bit demodulated by the path 1, the index bit demodulated by the path 2 and the index bit demodulated by the path 3 through parallel-to-serial conversion to obtain serial bit data to be transmitted by a transmitting end.

8. The three-way carrier index differential chaotic shift keying demodulation method according to claim 7, wherein the de-indexing mapping rule is: the de-indexed mapping object is the sequence number of the information subcarrier

The inverse index mapping target is a demodulated index bit with the length of p, and the inverse index mapping process comprises the following steps: according to the sequence number of the information subcarrier

The generation of demodulated index bits of length p is the inverse operation of ' generating 1 index number a ' from index bits of length p ' in the index mapping rule.

9. The three-way carrier-indexed differential chaotic shift-keying demodulation method as claimed in claim 7, wherein the matrix Z is a pair matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂The method comprises the following steps:

for the ith row, the number and direction of bits of the cyclic shift depends on the value of (M/2+1-i), and if (M/2+1-i) is greater than 0, the | M/2+1-i | bits are cyclically shifted to the right; circularly shift | M/2+1-i | bits to the left if (M/2+1-i) is less than 0; if (M/2+1-i) equals 0, then there is no operation.

10. The three-path carrier index differential chaotic shift keying demodulator is characterized by comprising: the device comprises M +1 carrier multipliers, M +1 matched filters, M +1 sampling switches, 1 Hilbert filter, a first calculation module, a second calculation module, a third calculation module, a fourth calculation module, a fifth calculation module, a sixth calculation module, a seventh calculation module, an eighth calculation module, a ninth calculation module, a tenth calculation module, an eleventh calculation module and 1 parallel-serial converter;

the M +1 carrier multipliers respectively multiply the received signals by using M +1 synchronous subcarriers to generate M +1 product signals;

the M +1 matched filters are used for respectively carrying out matched filtering on the M +1 product signals;

the M +1 sampling switches respectively perform time domain sampling on the M +1 product signals after matched filtering to recover M +1 discrete information signal sequences;

the 1 Hilbert filter generates M discrete Hilbert signals from the first M discrete information signal sequences through Hilbert transform;

the first calculation module is used for respectively carrying out correlation calculation on the M discrete Hilbert signals and the M +1 discrete information signal sequences to generate a matrix Z of M (M +1)₁M +1 numbers in the ith row of the matrix represent correlation values of the ith discrete hilbert signal after being correlated with the M +1 discrete information signal sequences;

the second calculation module is used for calculating the matrix Z₁Is cyclically shifted to generate a matrix Z of M x (M +1)₂；

The third calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in the first M/2 columns, store this number in Z₃And stores the maximum number of column numbers in Z₃To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₃；

The fourth calculation module is based on the matrix Z₂The following operations are performed: for row i, find the maximum number in M/2 columns after, store this number in Z₄And stores the maximum number of column numbers in Z₄To column 2 of row i, to matrix Z₂After performing the above operation on each row, a matrix Z of M × 2 is generated₄；

The fifth calculation module is used for calculating the matrix Z₃Column 1 and matrix Z₄To generate a matrix Z of M x 1₅；

The sixth calculation module according to the matrix Z₅Generating the demodulation coefficient k of the 1 st path₁，k₁Is equal to Z₅The column number of the largest number in;

the seventh calculation module according to the matrix Z₃And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 2 nd path₂，k₂Is equal to matrix Z₃Kth₁Row 2 column data;

the eighth calculation module according to the matrix Z₄And demodulation coefficient k of path 1₁Generating the demodulation coefficient k of the 3 rd path₃，k₃Is equal to matrix Z₄Kth₁Row 2 column data;

the ninth calculation module is used for generating a demodulation coefficient k of the 1 st path₁And the inverse index mapping rule restores the index bit of the 1 st path demodulation;

the tenth calculation module is used for calculating the demodulation coefficient k according to the 2 nd path₂And the anti-index mapping rule restores the index bit of the 2 nd path demodulation;

the eleventh calculating module is used for calculating the demodulation coefficient k according to the 3 rd path₃And the reverse index mapping rule restores the index bit of the 3 rd path demodulation;

and the parallel-to-serial converter combines the index bit demodulated by the 1 st path, the index bit demodulated by the 2 nd path and the index bit demodulated by the 3 rd path into a 1-path serial demodulation data bit stream through parallel-to-serial conversion.

Images