CN109541994A - A kind of real-time acquisition system and its acquisition method of high anti-interference ability - Google Patents
A kind of real-time acquisition system and its acquisition method of high anti-interference ability Download PDFInfo
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- CN109541994A CN109541994A CN201811267561.2A CN201811267561A CN109541994A CN 109541994 A CN109541994 A CN 109541994A CN 201811267561 A CN201811267561 A CN 201811267561A CN 109541994 A CN109541994 A CN 109541994A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
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- G05B2219/24215—Scada supervisory control and data acquisition
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Abstract
Electric automatization field of the present invention, disclose the real-time acquisition system and its acquisition method of a kind of high anti-interference ability, including PCI board card, host, real-time acquisition control plate, PCI board card insertion is on host, PCI board card is connect with real-time acquisition control plate, and host passes through Matlab/Simulink software and real-time acquisition control board interaction data.The present invention has the characteristics that high anti-interference ability, high-precision, multi-functional, and the real-time acquisition control board with signal isolation.Board packet of the invention expands the functions such as AD/DA conversion, PWM output, QEP orthogonal coding circuit, CAP capturing unit, digital quantity I/O, can satisfy the demand in the use of multi-field, more occasions to board hardware resource, has good applicability.
Description
Technical field
Electric automatization field of the present invention, more particularly to real-time acquisition system and its acquisition side of a kind of high anti-interference ability
Method.
Background technique
It is many kinds of in relation to PCI analog input card currently on the market, domestic production producer most it is representative should belong to grind China Tech
Skill.The PCI board card market share of the said firm's production is very big, is broadly divided into the PCI board card and multi-functional PCI board of simple function
Card.PCI board card of simple function such as analog signal input card, analog output unit, digital quantity I/O card etc. is not able to satisfy complexity
Work requirements need muti-piece board while cooperating.Although multi-functional PCI board card contains analog input, analog quantity defeated
Out, many functions such as digital quantity I/O, timer counter, but there are the following problems:
One, analog input/output of PCI board card is all the AD/DA conversion carried out inside board, and analog signals exist
It is highly susceptible to interfere in transmission process, transmission range cannot be too long, is not suitable for complicated electromagnetic environment.
Two, the no pwm signal output function of board can only generate pwm signal using the timer counter function of board, no
But pwm signal number is few, and the PWM frequency generated can only arrive several K, it is difficult to meet modern power electronic and Electrified Transmission field
Demand.
Three, board cannot complete the revolving speed and position detection of motor.
Four, ground of the ground of the analog signals of board and digital quantity signal directly with computer-internal is connected directly, and is made
Used time maloperation easily causes the case where computer motherboard is burnt.
Summary of the invention
The shortcomings that present invention is few for function in the prior art, poor anti jamming capability provides a kind of high anti-interference ability
Real-time acquisition system and its acquisition method.
In order to solve the above-mentioned technical problem, the present invention is addressed by following technical proposals.
A kind of real-time acquisition system of high anti-interference ability, including PCI board card, host, real-time acquisition control plate, PCI board card
It inserts on host, PCI board card is connect with real-time acquisition control plate, and host passes through Matlab/Simulink software and acquisition in real time
Control card interaction data；
PCI board card includes power circuit, clock circuit, PCI general purpose interface bus chip circuit, fpga chip and LVDS hair
Give/receive circuit；Power circuit is used to provide power supply to the circuit on PCI board card；Clock circuit provides system clock for board
Signal；
PCI general purpose interface bus chip circuit includes pci interface chip and serial EEPROM chip, and pci interface chip connects
It is connected to serial EEPROM bus interface, pci bus interface and LOCAL bus interface, EEPROM bus interface is connected with EEPROM
Chip, all registers for PCI allocation interface chip；Pci bus interface with the pci bus on host for being led to
Letter, LOCAL bus interface are connect with fpga chip, for managing memory headroom and the external storage space of pci bus address
Data exchange；
Fpga chip includes series arrangement chip and fpga chip.The fpga chip that the storage of series arrangement chip writes
Configuration information, the configuration port of fpga chip is connected to using standard spi bus, and FPGA executes configuration information after powering on and realizes in fact
When acquisition control plate and host between reading and writing data function；
LVDS transmission/reception circuit is used for signal telecommunication；
Real-time acquisition control plate includes AD/DA conversion circuit, PWM output circuit, QEP/CAP detection circuit, digital quantity I/O
Circuit.
Preferably, PCI board card and real-time acquisition control plate are connected with two DB-37P signal cable lines, one is simulation
The communication cable of conversion signal and the channel I/O is measured, another is detected the communication cable of signal for PWM output signal and QEP/CAP.
Preferably, two DB-37P communication cables are all made of Low Voltage Differential Signal and are communicated.
Preferably, communication is isolated by high-speed figure isolation circuit between PCI board card and real-time acquisition control plate,
The analog signals and discrete control of analog signals and digital quantity signal, output for real-time acquisition control plate to be acquired
Signal is isolated with PCI board card.
Preferably, acquisition control board further includes the task manager with Matlab/Simulink software interactive in real time
Module library, event manager module library include PWM pulse width modulation module, Timer general purpose timer, QEP orthogonal coding module,
CAP capturing unit module, Async IRQ Source module, AC/DC module, I/O module；
PWM pulse width modulation module: 8 PWM of control, configuration 4 pairs of complementary pulse signals of composition；
Timer general purpose timer: make configuration general purpose timer in task manager and use；
QEP orthogonal coding module: for detect photoelectric coder output orthogonal intersection code signal, and to orthogonal intersection code signal into
Row decoding and counting；
CAP capturing unit module: the state of record capture-port level, for hall sensor signal and crossover point signal
Detection；
Async IRQ Source module: CPU runs ISR interrupt service routine when occurring for specified interruption；
AC/DC module: it is mutually converted for analog quantity to digital quantity；
I/O module: the low and high level state change output and input for detecting and controlling digital quantity port.
Preferably, acquisition control plate has 8 road pwm signal output channels in real time, controlled by PWM pulse width modulation module
It can be made to export 4 pairs of complementations and the adjustable pwm signal of duty ratio.
A kind of acquisition method that real-time acquisition system uses, includes the following steps:
(1) connection prepares: the acquisition of physical object is coupled with the corresponding interface of acquisition control plate with signal is controlled,
Acquisition control plate is connected with the real-time board of PCI by 2 37P data lines, and host is opened；
(2) it builds real-time acquisition control program chart: opening Matlab, create the model file of a Simulink, so
The library Simulink is opened at model file interface afterwards, Cong Kuzhong is chosen at the module and PCI reality of event manager module library needs
When board incident management library in drive module be added in model file, then added module is connected and builds reality
When capture program block diagram；
(3) it configures simulation parameter: simulation time and solver being configured in the interface Simulink, simulation time is set
It sets including emulation time started and emulation deadline, solver setting includes selecting step-length type discontinuous mode and to fixed
Step sizes；
(4) compilation run program: the real-time acquisition control program chart put up is compiled by compilation model function
It translates and takes control program, be connected to the real-time board of PCI after the completion of compiling, then run program；
(5) monitor operating status: oscillograph Scope or numerical value display box Display observation is to physics in openable program
The feedback signal of the control signal and operation of object；
(6) it adjusts operating status: when needing to change the operating status of physical object, corresponding ginseng is modified in Simulink
Then numerical value is opened and clicks menu bar Code, external schema control panel function is selected, and the parameter in its interface adjusts option
Lower selection batch download function, the parameter of modification is downloaded in the program being currently running.
The present invention due to use above technical scheme, with significant technical effect: the present invention with high anti-interference ability,
In high precision, multi-functional feature, and the real-time acquisition control board with signal isolation.Board packet of the invention expands AD/DA
The functions such as conversion, PWM output, QEP orthogonal coding circuit, CAP capturing unit, digital quantity I/O, can satisfy multi-field, more
To the demand of board hardware resource when the use of occasion, there is good applicability.
Detailed description of the invention
Fig. 1 is structure connection diagram of the invention；
Fig. 2 is the real-time board schematic diagram of PCI of the present invention；
Fig. 3 is two DB-37P cable wire pin definition figures of the invention；
Fig. 4 is acquisition control plate schematic diagram in real time of the invention；
Fig. 5 is multrirange A/D converter circuit schematic diagram of the present invention；
Fig. 6 is multi gear bit D/A converter circuit schematic diagram of the present invention；
Fig. 7 is QEP, CAP circuit detection principle diagram of the present invention；
Fig. 8 is pwm pulse output principle figure of the present invention；
Fig. 9 is signal isolation circuit schematic diagram of the present invention；
Figure 10 is the real-time board event manager module library structure figure of PCI of the present invention；
Figure 11 is two close cycles reversible dc pulsewidth H bridge speed control system structure of the present invention；
Figure 12 is the real-time acquisition control model program operation figure of two close cycles reversible dc pulsewidth H bridge speed-regulating system of the present invention；
Figure 13 be the present invention acquire motor speed, current feedback waveform.
Specific embodiment
Present invention is further described in detail with embodiment with reference to the accompanying drawing.
As shown in figure 1 to figure 13, the real-time acquisition system of a kind of high anti-interference ability, including PCI board card, host, adopt in real time
Collect control panel, PCI board card insertion is on host, and PCI board card is connect with real-time acquisition control plate, and host passes through Matlab/
Simulink software and real-time acquisition control board interaction data；
PCI board card includes power circuit, clock circuit, PCI general purpose interface bus chip circuit, fpga chip and LVDS hair
Give/receive circuit；Power circuit is used to provide power supply to the circuit on PCI board card；Clock circuit provides system clock for board
Signal；
PCI general purpose interface bus chip circuit includes pci interface chip and serial EEPROM chip, and pci interface chip connects
It is connected to serial EEPROM bus interface, pci bus interface and LOCAL bus interface, EEPROM bus interface is connected with EEPROM
Chip, all registers for PCI allocation interface chip；Pci bus interface with the pci bus on host for being led to
Letter, LOCAL bus interface are connect with fpga chip, for managing memory headroom and the external storage space of pci bus address
Data exchange；
Fpga chip includes series arrangement chip and fpga chip.The fpga chip that the storage of series arrangement chip writes
Configuration information, the configuration port of fpga chip is connected to using standard spi bus, and FPGA executes configuration information after powering on and realizes in fact
When acquisition control plate and host between reading and writing data function；
LVDS transmission/reception circuit is used for signal telecommunication；
Real-time acquisition control plate includes AD/DA conversion circuit, PWM output circuit, QEP/CAP detection circuit, digital quantity I/O
Circuit.
PCI board card and real-time acquisition control plate are connected with two DB-37P signal cable lines, and one is analog quantity conversion letter
Number and the channel I/O communication cable, another is detected the communication cable of signal for PWM output signal and QEP/CAP.
Two DB-37P communication cables are all made of Low Voltage Differential Signal and are communicated.
Communication is isolated by high-speed figure isolation circuit between PCI board card and real-time acquisition control plate, for real
When acquisition control plate acquisition analog signals and digital quantity signal, the analog signals of output and discrete control signal with
PCI board card is isolated.
Real-time acquisition control board further includes the event manager module library with Matlab/Simulink software interactive, thing
Part manager module library includes PWM pulse width modulation module, Timer general purpose timer, QEP orthogonal coding module, CAP capturing unit
Module, Async IRQ Source module, AC/DC module, I/O module；
PWM pulse width modulation module: 8 PWM of control, configuration 4 pairs of complementary pulse signals of composition；
Timer general purpose timer: make configuration general purpose timer in task manager and use；
QEP orthogonal coding module: for detect photoelectric coder output orthogonal intersection code signal, and to orthogonal intersection code signal into
Row decoding and counting；
CAP capturing unit module: the state of record capture-port level, for hall sensor signal and crossover point signal
Detection；
Async IRQ Source module: CPU runs ISR interrupt service routine when occurring for specified interruption；
AC/DC module: it is mutually converted for analog quantity to digital quantity；
I/O module: the low and high level state change output and input for detecting and controlling digital quantity port.
Real-time acquisition control plate has 8 road pwm signal output channels, its can be made defeated by the control of PWM pulse width modulation module
4 pairs of complementations and the adjustable pwm signal of duty ratio out.
A kind of acquisition method that real-time acquisition system uses, includes the following steps:
(1) connection prepares: the acquisition of physical object is coupled with the corresponding interface of acquisition control plate with signal is controlled,
Acquisition control plate is connected with the real-time board of PCI by 2 37P data lines, and host is opened；
(2) it builds real-time acquisition control program chart: opening Matlab, create the model file of a Simulink, so
The library Simulink is opened at model file interface afterwards, Cong Kuzhong is chosen at the module and PCI reality of event manager module library needs
When board incident management library in drive module be added in model file, then added module is connected and builds reality
When capture program block diagram；
(3) it configures simulation parameter: simulation time and solver being configured in the interface Simulink, simulation time is set
It sets including emulation time started and emulation deadline, solver setting includes selecting step-length type discontinuous mode and to fixed
Step sizes；
(4) compilation run program: the real-time acquisition control program chart put up is compiled by compilation model function
It translates and takes control program, be connected to the real-time board of PCI after the completion of compiling, then run program；
(5) monitor operating status: oscillograph Scope or numerical value display box Display observation is to physics in openable program
The feedback signal of the control signal and operation of object；
(6) it adjusts operating status: when needing to change the operating status of physical object, corresponding ginseng is modified in Simulink
Then numerical value is opened and clicks menu bar Code, external schema control panel function is selected, and the parameter in its interface adjusts option
Lower selection batch download function, the parameter of modification is downloaded in the program being currently running.
Embodiment 1
The hardware components of the present embodiment include by host, the real-time board of PCI, 2 DB-37P signal cable lines, in real time acquisition
Control panel, wherein on host, PCI board card is connect PCI board card insertion with real-time acquisition control plate；Software section is Matlab/
Simulink software, PCI real-time board event manager module library, acquisition control program chart；
Referring to Fig. 2, the real-time board of the PCI of hardware components mainly has power circuit, clock circuit, PCI general purpose interface bus
Chip circuit, fpga chip, LVDS transmission/reception circuit composition；
Power circuit, will be on computer motherboard using low pressure difference linearity voltage stabilizing chip LM1085-1.5V and LM1085-3.3V
Pci interface in 5V power supply be directly changed into 1.5V power supply and 3.3V power supply.1.5V power supply is only as the interior of PFGA chip
Nuclear-electric power supply, 3.3V power supply provide power supply as circuit modules multiple on PCI board card；
Clock circuit uses clock frequency to have source crystal oscillator to provide clock signal of system, system clock for board for 40MHz
Signal needs to be sent to the clock pulses pin of fpga chip and PCI general purpose interface bus chip.
PCI general purpose interface bus chip circuit, circuit mainly include pci interface chip PCI9054 and serial EEPROM core
Piece 93LC56；PCI9054 pin is broadly divided into three bus interface, is that serial EEPROM bus interface, pci bus connect respectively
Mouth, LOCAL bus interface；EEPROM bus interface is connected to 93LC56 chip, is responsible for all deposits of 9054 chip of PCI allocation
Device；Pci bus interface is mainly responsible for be communicated with the pci bus on computer motherboard；LOCAL bus interface and fpga chip
It connects, the data exchange between the corresponding memory headroom of the external memory space for managing pci bus address, the present invention
It is middle to use C mode → immediate data mode → PCITarget；In the slave equipment that this PCI9054 is computer motherboard pci interface,
It is the main equipment of fpga chip；To sum up PCI general purpose interface bus chip circuit major function is with realizing CPU on address
Location, PCI address, the address LOCAL correspond, and a bridge joint is done between computer motherboard and peripheral hardware；
Fpga chip, fpga chip use the EP1C12Q240C8 chip of ALTERA company, and fpga chip mainly rises herein
To two aspect effects, one is connecting with PCI9054 chip by LOCAL bus, LOCAL bus need to be being write in FPGA
Sequential logic, to realize the requiring rapid data read/writing between fpga chip and computer CPU, data transmission procedure isThe second is the programmability by utilizing FPGA, achievable AD/
The functions such as I/O, the output of multi-channel PWM signal and QEP/CAP detection are realized in the indirect high-speed communication of DA different rates peripheral hardware；
LVDS transmission/reception circuit, to solve, analog quantity and Transistor-Transistor Logic level anti-electromagnetic interference capability are poor, transmission range is short；With
And Transistor-Transistor Logic level transmission rate is low, the problems such as influencing system response time, because LVDS has good interference free performance, also has
Have the characteristics such as low-power consumption, transmission rate height, it can be achieved that telecommunication, thus in the present invention AD/DA conversion circuit SPI serial ports
Communication bus signal, PWM output signal, QEP/CAP detection signal, the channel I/O pass through LVDS (low-voltage differential signal) into
Row sends or receives；LVDS sends and receives DS90LV047A the and DS90LV048A chip that TI company is respectively adopted in chip, and two
All there are a chip denominator 4 tunnels may be up to 400Mbpsde transmission rate (or signal frequency 200MHz) COMS differential line,
Required peripheral components are seldom when in use for two chips, and DS90LV047A only need to add pull-up resistor in enable end can normal work
Make, DS90LV048A, need to also be on two pins received with difference all the way simultaneously in addition to needs add pull-up resistor in enable end
Couple the build-out resistor of 100 Ω；
Referring to Fig.1, two DB-37P signal cable lines are as the difference between the real-time board of PCI and real-time acquisition control plate
Sub-signal transmission cable, cable material use 3 class twisted pairs.Wherein one as the logical of analog quantity conversion signal and the channel I/O
Communication cable, another as PWM output signal, QEP/CAP detection signal communication cable；The pin definition of two cables can
Referring to Fig. 3；
Referring to Fig. 4, the real-time acquisition control plate of hardware components includes power supply circuit, digital quantity I/O circuit, LVDS hair
Send/receive circuit, A/D converter circuit, DA conversion circuit, QEP/CAP detection circuit, PWM output circuit, high-speed figure isolation electricity
Road；
Power supply circuit is divided into 4 road power supplys, the power supply before the first via, the second tunnel, the isolation of third Lu Douwei number, and not
Altogether, it is all obtained after diode rectification, filtering, pressure stabilizing using the low-voltage AC of relevant voltage grade；First via power supply is
A/D converter circuit and the power supply of DA conversion circuit, there is 3 DC voltage levels, respectively+12V, -12V ,+5V；Second road power supply is
PWM output and the power supply of I/O circuit, voltage are+5V；Third road is the power supply of QEP/CAP detection circuit, and voltage is+5V；4th tunnel is
Power supply after number isolation sends/receives chip power supply for the LVDS on real-time acquisition control plate, using cable that PCI is real-time
The real-time acquisition control plate of+5V power delivery of board, exports 3.3V after ASM1117-3.3V linear voltage stabilization pipe；
Digital quantity I/O circuit includes 6 railway digital amount input signals and 6 railway digital amount output signals, can be used as automatic control
Switch input, output in project use；Digital quantity I/O signal all passes through
LVDS, which is sent ,/LVDS received on circuit and the real-time board of PCI is sent/receives circuit and is connected by 2 DB-37
It connects；The LVDS transmitting line of the real-time board of PCI corresponds to the circuit that receives on real-time acquisition control plate, the LVDS of the real-time board of PCI
Receive circuit and corresponds to transmitting line on real-time acquisition control plate；
It is that the independent AD conversion in 6 tunnels is therein all the way referring to Fig. 5, input voltage range 0-5V, 0-10V, 0- ± 10V
It is optional, 6 tunnel independence AD conversion, conversion rate 300KHz, this circuit mainly have range switch circuit, reference power circuit, AD turn
Change chip composition；In range switch circuit main chip be AD8006 operational amplifier chip, be by KN203 toggle switch come
Change operational amplifier magnification ratio and Selecting operation amplifier put the reference voltage of input reach range switching function,
The analog quantity voltage for inputting it in corresponding range ability after range switch circuit, is being sent to AD conversion chip analog quantity
The voltage of input port is all 0~5V range；Reference power circuit exports 2.5V reference power supply using TL431 precision voltage-stabiliser tube,
It is used for range switch circuit；AD conversion chip uses ADS7886, it is characterized in that conversion accuracy 12, maximum slew rate are
1Msp, it is communicated using serial spi bus；
Referring to Fig. 6, be in the independent DA conversion circuit in 2 tunnels all the way, output voltage level 0-10V, 0- ± 10V it is optional,
2 tunnel independence DA conversion, conversion rate 1MHz, this circuit mainly have transforming gear circuit, reference power circuit, DA conversion chip group
At；Transforming gear circuit changes the magnification ratio of operational amplifier and selects the reference voltage of amplifier input to reach output gear
The function of transformation, converting output 0~5V voltage in DA makes its voltage range needed for output by transforming gear circuit, can
Voluntarily select voltage output range port；Reference power circuit exports 2.5V reference power supply using TL431 precision voltage-stabiliser tube, for shelves
Bit map circuit uses；DA conversion chip uses DAC7811, it is characterized in that conversion accuracy 12, stable time 0.2us, use
Serial spi bus communication；
Referring to Fig. 7, QEP/CAP detection circuit includes QEP detection circuit and all the way CAP capture circuit all the way；QEP detection
Circuit is used to connect photoelectric encoder, and the quadrature coding pulse signal that can be exported to photoelectric encoder is decoded and counted and can examined
Survey position and the speed transfering the letter breath of rotating machinery；CAP capture circuit is generally used to detection DC brushless motor, switched reluctance machines etc.
The position detection signal of rotating machinery；Signal flow in QEP and CAP circuit is that photoelectric encoder or position detection export
The 3 road differential signals → RC resistance-capacitance network → road difference recipient AM26C32 → 3 TTL signal → high-speed figure isolation circuit → poor
3 road differential signal of transmitting line → output → cable → difference is divided to receive circuit → FPGA；
Referring to Fig. 8, PWM output circuit has 8 road pwm signal output channels and 2 road external alarm interrupting channels in real time；
The pwm pulse that fpga chip is sent out receives circuit → high-speed isolated circuit → slow by difference transmitting line → cable → difference
Rush device circuit → PWM output port；2 road external alarm interrupt signals can be defeated for interrupting pwm pulse with rapid feedback to PFGA
Out and record alarm number, external alarm interrupt signal → Schmitt trigger → high-speed isolated circuit → difference transmitting line →
Cable → difference receives circuit → FPGA；
Referring to Fig. 9, high-speed figure isolation circuit is that communication between PCI board card and real-time acquisition control plate is passed through high speed number
Word isolation circuit carries out electrical isolation, increases the stability and safety of equipment, the real-time board of PCI and real-time acquisition control plate
Between signal communication have to pass through this circuit, signal process isDeng.In high speed
According to the demand in required forward and reverse channel in digital isolation circuit, a series of number of same different models of TI company has been selected
Isolating chip, respectively tri- kinds of ISO7220C, ISO7240C, ISO7240C, message transmission rate is all up to 25Mbps, different
Be ISO7220C have 2 tunnel forward direction channel isolations, ISO7240C have 4 tunnel forward direction channel isolations, ISO7242C have 2 tunnels just
To channel isolation, 2 tunnel reverse isolation channels；
The event manager module library of the real-time board of 0, PCI is Matlab/Simulink software and PCI board card referring to Fig.1
The opposite hardware interface drive module library of hardware, benefit is created in the C language S-Function in Matlab, then the S- finished writing
Function compiling generates C-MEX file, and drive module can be become by being then encapsulated again, drive module and makes Windows
System kernel is communicated with PCI board card I/O interface by driver, utilizes PCI board card and Matlab/ to reach
Simulink software realization software and hardware combining carries out data acquisition control.
Two close cycles reversible dc pulsewidth H bridge speed-regulating system is made of tachometer, H bridge main circuit panel, dc motor etc..
Wherein tachometer includes that revolving speed is shown, test the speed photoelectric encoder, and has analog output；H is contained on H bridge main circuit panel
Bridge main circuit, PWM driving pulse circuit, motor armature current detection and feedback circuit.
Referring to Fig.1 1, it is two close cycles reversible dc pulsewidth H bridge speed control system structure；
Two close cycles reversible dc pulsewidth H bridge speed-regulating system is made of tachometer, H bridge main circuit panel, dc motor etc..
Wherein tachometer includes that revolving speed is shown, test the speed photoelectric encoder, and has analog output；H is contained on H bridge main circuit panel
Bridge main circuit, PWM driving pulse circuit, motor armature current detection and feedback circuit；
Referring to Fig.1 1, it is two close cycles reversible dc pulsewidth H bridge speed control system structure；
Un* is rotary speed setting value in figure, and Un is speed feedback value, and Ui* is der Geschwindigkeitkreis output valve giving as electric current loop,
Ui is current feedback values, and Uct is electric current loop output valve as final control amount, and ASR is der Geschwindigkeitkreis adjuster, and ACR is electric current
Ring adjuster, UPE are electric power electric converter, and LEM is Hall current mutual inductor, and M is direct current generator, and TG is tachometer；
Acquisition control plate is connected to using the analog quantity of revolving speed feedback, the analog quantity of electric current need to only be fed back in this invention
The channel AD 0 and channel 1 select 0~10V range；PWM1~PWM4 output of acquisition control plate is connected to H bridge main circuit panel
On；PCI board card and real-time acquisition cardboard are attached with the data line of 2 DB-37P；
2 be the real-time acquisition control model program of two close cycles reversible dc pulsewidth H bridge speed-regulating system referring to Fig.1；It establishes real-time
Only need to call when acquisition control model program relevant event manager module library and others Simulink often with module just
Complete experimental model can be built, collected real-time waveform can also be shown in Scope oscilloscope module.
Referring to Fig.1 3, it is Scope shows to be motor in rated speed operation, positive and negative rotation switch motor revolving speed, electric current
The waveform that feedback collection arrives；
Direct current H bridge speed-regulating system working condition is pulse width modulation frequency 15kHz, DC voltage 300V, belongs to high-frequency and high-voltage
Working environment can be easy to generate waveform collected apparent interference, collect two waveforms as we can see from the figure
All smoothers occur without noises such as burr spikes, illustrate that this system has good effect at anti-interference aspect.From figure
Speed waveform overshoot is seen less than 5%, positive rated speed to negative rated speed regulating time is 0.5s, can from above data
Find out that this system works well in real-time control.
In short, the foregoing is merely a prefered embodiment of the invention, it is all according to equivalent change made by scope of the present invention patent
With modification, shall all be covered by the patent of the invention.
Claims (7)
1. a kind of real-time acquisition system of high anti-interference ability, it is characterised in that: including PCI board card, host, real-time acquisition control
Plate, on host, PCI board card is connect PCI board card insertion with real-time acquisition control plate, and host passes through Matlab/Simulink software
With real-time acquisition control board interaction data；
PCI board card include power circuit, clock circuit, PCI general purpose interface bus chip circuit, fpga chip and LVDS send/
Receive circuit；Power circuit is used to provide power supply to the circuit on PCI board card；Clock circuit provides system clock letter for board
Number；
PCI general purpose interface bus chip circuit includes pci interface chip and serial EEPROM chip, and pci interface chip is connected with
Serial EEPROM bus interface, pci bus interface and LOCAL bus interface, EEPROM bus interface are connected with eeprom chip,
All registers for PCI allocation interface chip；Pci bus interface is used to be communicated with the pci bus on host,
LOCAL bus interface is connect with fpga chip, for managing the memory headroom of pci bus address and the data in external storage space
Exchange；
Fpga chip includes series arrangement chip and fpga chip.The configuration for the fpga chip that the storage of series arrangement chip writes
Information, the configuration port of fpga chip is connected to using standard spi bus, and FPGA executes configuration information realization and adopts in real time after powering on
Collect the reading and writing data function between control panel and host；
LVDS transmission/reception circuit is used for signal telecommunication；
Real-time acquisition control plate includes AD/DA conversion circuit, PWM output circuit, QEP/CAP detection circuit, digital quantity I/O electricity
Road.
2. a kind of real-time acquisition system of high anti-interference ability according to claim 1, it is characterised in that: PCI board card with adopt in real time
Collection control panel is connected with two DB-37P signal cable lines, one be analog quantity conversion signal and the channel I/O communication cable, separately
One is detected the communication cable of signal for PWM output signal and QEP/CAP.
3. a kind of real-time acquisition system of high anti-interference ability according to claim 2, it is characterised in that: two DB-37P communication electricity
Cable is all made of Low Voltage Differential Signal and is communicated.
4. a kind of real-time acquisition system of high anti-interference ability according to claim 1, it is characterised in that: PCI board card and adopt in real time
It communicates between collection control panel and is isolated by high-speed figure isolation circuit, the analog quantity for real-time acquisition control plate to be acquired
Signal and digital quantity signal, the analog signals of output and discrete control signal are isolated with PCI board card.
5. a kind of real-time acquisition system of high anti-interference ability according to claim 1, it is characterised in that: real-time acquisition control board
It further include the event manager module library with Matlab/Simulink software interactive, event manager module library includes PWM pulsewidth
Modulation module, Timer general purpose timer, QEP orthogonal coding module, CAP capturing unit module, Async IRQ Source mould
Block, AC/DC module, I/O module；
PWM pulse width modulation module: 8 PWM of control, configuration 4 pairs of complementary pulse signals of composition；
Timer general purpose timer: make configuration general purpose timer in task manager and use；
QEP orthogonal coding module: for detecting the orthogonal intersection code signal of photoelectric coder output, and orthogonal intersection code signal is translated
Code and counting；
CAP capturing unit module: the state of record capture-port level, for the inspection to hall sensor signal and crossover point signal
It surveys；
Async IRQ Source module: CPU runs ISR interrupt service routine when occurring for specified interruption；
AC/DC module: it is mutually converted for analog quantity to digital quantity；
I/O module: the low and high level state change output and input for detecting and controlling digital quantity port.
6. a kind of real-time acquisition system of high anti-interference ability according to claim 1, it is characterised in that: real-time acquisition control plate tool
There are 8 road pwm signal output channels, its 4 pairs of complementation of output can be made by the control of PWM pulse width modulation module and duty ratio is adjustable
Pwm signal.
7. a kind of acquisition method that the real-time acquisition system such as claim 1-6 uses, which comprises the steps of:
(1) connection prepares: the acquisition of physical object and control signal being coupled with the corresponding interface of acquisition control plate, acquiring
Control panel is connected with the real-time board of PCI by 2 37P data lines, and host is opened；
(2) it builds real-time acquisition control program chart: opening Matlab, create the model file of a Simulink, then exist
The library Simulink is opened at model file interface, and Cong Kuzhong is chosen at the module and the real-time plate of PCI of event manager module library needs
Drive module in card incident management library is added in model file, then added module is connected to build and be adopted in real time
Collect program chart；
(3) it configures simulation parameter: simulation time and solver being configured in the interface Simulink, simulation time setting packet
Emulation time started and emulation deadline are included, and solver setting includes discontinuous mode being selected step-length type and to fixed step size
Size；
(4)) compilation run program: the real-time acquisition control program chart put up is compiled by compilation model function and is taken
Program is controlled, the real-time board of PCI is connected to after the completion of compiling, then runs program；
(5) monitor operating status: oscillograph Scope or numerical value display box Display observation is to physical object in openable program
Control signal and operation feedback signal；
(6) it adjusts operating status: when needing to change the operating status of physical object, corresponding parameter is modified in Simulink
Then value is opened and clicks menu bar Code, external schema control panel function is selected, and adjusts under option in the parameter in its interface
Batch download function is selected, the parameter of modification is downloaded in the program being currently running.
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111123774A (en) * | 2019-12-19 | 2020-05-08 | 上海宇航***工程研究所 | Motor current acquisition method and system applied to deep space detection antenna servo controller |
| CN111490772A (en) * | 2020-04-27 | 2020-08-04 | 云南拓普特种电源科技有限公司 | High-speed isolated acquisition and restoration system and time sequence control method |
| CN112445750A (en) * | 2020-10-10 | 2021-03-05 | 中国人民解放军海军工程大学 | Signal switching universal board card of real-time simulation system |
| CN113053215A (en) * | 2021-03-17 | 2021-06-29 | 浙江大学 | Permanent magnet wind power generation system exploration experiment platform suitable for teaching |
| CN113485183A (en) * | 2021-07-01 | 2021-10-08 | 浙江大学 | Serial signal acquisition output control device based on PCI bus protocol |
| CN117411463A (en) * | 2023-12-15 | 2024-01-16 | 南京群顶科技股份有限公司 | Edge computing gateway data acquisition-oriented adaptive filtering method |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1752981A (en) * | 2005-10-26 | 2006-03-29 | 东北大学 | Pnp high speed multichannel intelligent comprehensive data acquiring system |
| CN101478643A (en) * | 2009-01-08 | 2009-07-08 | 华中科技大学 | Method and system for data collecting |
| CN102136818A (en) * | 2011-02-16 | 2011-07-27 | 万达集团股份有限公司 | Numerical control device for AC permanent magnet synchronous motor |
| CN102354124A (en) * | 2011-09-02 | 2012-02-15 | 中国科学院长春光学精密机械与物理研究所 | Dynamic simulation test method of multi-shaft multichannel linkage movement control system |
| CN106095334A (en) * | 2016-06-03 | 2016-11-09 | 江苏科技大学 | A kind of high-speed data acquisition storage system based on FPGA |
| CN107766266A (en) * | 2016-08-21 | 2018-03-06 | 南京理工大学 | High-speed data acquisition and storage system based on FPGA and PCIe |
| CN107807558A (en) * | 2017-09-28 | 2018-03-16 | 国营芜湖机械厂 | Multibus communication card circuit and control method based on PCI9054 |
| CN207200605U (en) * | 2018-01-29 | 2018-04-06 | 太仓永瑞检测装备科技有限公司 | The more motor real-time control platforms of modularization based on DSP and FPGA |
-
2018
- 2018-10-29 CN CN201811267561.2A patent/CN109541994A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1752981A (en) * | 2005-10-26 | 2006-03-29 | 东北大学 | Pnp high speed multichannel intelligent comprehensive data acquiring system |
| CN101478643A (en) * | 2009-01-08 | 2009-07-08 | 华中科技大学 | Method and system for data collecting |
| CN102136818A (en) * | 2011-02-16 | 2011-07-27 | 万达集团股份有限公司 | Numerical control device for AC permanent magnet synchronous motor |
| CN102354124A (en) * | 2011-09-02 | 2012-02-15 | 中国科学院长春光学精密机械与物理研究所 | Dynamic simulation test method of multi-shaft multichannel linkage movement control system |
| CN106095334A (en) * | 2016-06-03 | 2016-11-09 | 江苏科技大学 | A kind of high-speed data acquisition storage system based on FPGA |
| CN107766266A (en) * | 2016-08-21 | 2018-03-06 | 南京理工大学 | High-speed data acquisition and storage system based on FPGA and PCIe |
| CN107807558A (en) * | 2017-09-28 | 2018-03-16 | 国营芜湖机械厂 | Multibus communication card circuit and control method based on PCI9054 |
| CN207200605U (en) * | 2018-01-29 | 2018-04-06 | 太仓永瑞检测装备科技有限公司 | The more motor real-time control platforms of modularization based on DSP and FPGA |
Non-Patent Citations (1)
| Title |
|---|
| 邢培栋: "《基于模型的控制***开发验证平台设计》", 《中国优秀硕士学位论文全文数据库》 * |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111123774A (en) * | 2019-12-19 | 2020-05-08 | 上海宇航***工程研究所 | Motor current acquisition method and system applied to deep space detection antenna servo controller |
| CN111490772A (en) * | 2020-04-27 | 2020-08-04 | 云南拓普特种电源科技有限公司 | High-speed isolated acquisition and restoration system and time sequence control method |
| CN112445750A (en) * | 2020-10-10 | 2021-03-05 | 中国人民解放军海军工程大学 | Signal switching universal board card of real-time simulation system |
| CN113053215A (en) * | 2021-03-17 | 2021-06-29 | 浙江大学 | Permanent magnet wind power generation system exploration experiment platform suitable for teaching |
| CN113485183A (en) * | 2021-07-01 | 2021-10-08 | 浙江大学 | Serial signal acquisition output control device based on PCI bus protocol |
| CN117411463A (en) * | 2023-12-15 | 2024-01-16 | 南京群顶科技股份有限公司 | Edge computing gateway data acquisition-oriented adaptive filtering method |
| CN117411463B (en) * | 2023-12-15 | 2024-02-20 | 南京群顶科技股份有限公司 | Edge computing gateway data acquisition-oriented adaptive filtering method |
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Application publication date: 20190329 |