CN109525350B - Module synchronization control method based on asynchronous serial port synchronization source - Google Patents
Module synchronization control method based on asynchronous serial port synchronization source Download PDFInfo
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Abstract
The invention provides a module synchronization control method based on an asynchronous serial port synchronous source, which comprises the steps that when the synchronous source sends an operation command to each controlled unit through a sending end of an asynchronous serial communication port, a communication signal is sent to each controlled unit at the same time; each controlled unit receives an operation command and a communication signal from a synchronous source through a receiving end of an asynchronous serial communication port, and extracts the communication signal as a synchronous clock signal for synchronization; each controlled unit executes corresponding operation according to the operation command and sends operation data to the synchronous source through the sending end of the asynchronous serial communication port; the synchronous source receives the operation data from each controlled unit through the receiving end of the asynchronous serial communication port. The invention has the advantages that: the accurate synchronization among the start stop control, the data acquisition and the high-speed communication can be realized; the method can effectively reduce the implementation cost and also can effectively overcome the problem of data time dislocation caused by communication faults.
Description
Technical Field
The invention relates to the field of communication, in particular to a module synchronization control method based on an asynchronous serial port synchronization source.
Background
In an aging test system of a lithium battery, a plurality of devices are often required to be operated in parallel, so that the problem of synchronization of start-stop control, data sampling and high-speed communication among the devices cannot be solved. The existing conventional synchronization mode is as follows: the synchronization of start-stop control and data sampling is realized by a synchronous clock signal, and the synchronization of data is realized by assuming that the communication is completely real-time and has no fault. However, the existing synchronization method has the following defects: 1. an additional design of a synchronous clock signal is required, which increases the implementation cost; 2. once a communication error occurs in one of the parallel devices, the data time is staggered; 3. the accurate synchronization of the start-stop control, the data sampling and the high-speed communication can not be realized.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a module synchronization control method based on an asynchronous serial port synchronization source, which can effectively reduce the implementation cost and can realize the accurate synchronization among the start stop control, the data acquisition and the high-speed communication.
The invention is realized by the following steps: the module synchronization control method based on the asynchronous serial port synchronous source needs to provide a synchronous source and a plurality of controlled units; each controlled unit is connected with the synchronous source through an asynchronous serial communication port; the control method comprises the following steps:
step S1, when the synchronous source sends an operation command to each controlled unit through the sending end of the asynchronous serial communication port, sending a communication signal to each controlled unit at the same time;
step S2, each controlled unit receives the operation command and the communication signal from the synchronous source through the receiving end of the asynchronous serial communication port, and extracts the communication signal as a synchronous clock signal for synchronization;
step S3, each controlled unit executes corresponding operation according to the operation command and sends operation data to the synchronous source through the sending end of the asynchronous serial communication port;
step S4, the synchronization source receives the operation data from each controlled unit through the receiving end of the asynchronous serial communication port.
Furthermore, a synchronous source clock signal counter and a synchronous signal period counter are arranged in each controlled unit;
in step S2, the step of extracting the communication signal as a synchronous clock signal for synchronization specifically includes: setting synchronous time, wherein after the controlled unit extracts a communication signal as a synchronous clock signal, the synchronous source clock signal counter uses the synchronous clock signal as a time base to time the synchronous time, and meanwhile, the synchronous signal period counter uses the clock signal of the controlled unit as the time base to time the synchronous time;
when the continuous counting time of the synchronous source clock signal counter reaches the synchronous time, recording a timing result TimeOfA, simultaneously generating a phase discrimination signal, and clearing the synchronous source clock signal counter; when the continuous counting time of the synchronous signal period counter reaches the synchronous time, recording a timing result TimeOfB; and calculating a phase difference Error between the synchronous source clock signal counter and the synchronous signal period counter, clearing the synchronous signal period counter after finishing phase discrimination, and compensating the calculated phase difference Error to the synchronous signal period counter, thereby realizing the time synchronization operation of the controlled unit.
Further, the step S2 further includes:
each controlled unit monitors whether the synchronous clock signal is lost or not, and if the synchronous clock signal is monitored to be lost, the controlled units automatically add and insert a synchronous clock signal and count the added and inserted synchronous clock signal; if the synchronous clock signal is monitored not to be lost, the complementary insertion processing is not carried out.
Further, the step S4 further includes:
when communication is wrong, the synchronous source automatically completes interpolation operation according to the upper and lower operation data.
Further, in the step S1, the communication signal is a synchronization signal frame with a fixed time interval, a fixed frequency and a fixed frame length.
Further, in the step S1, the operation command is a start/stop control command or a data sampling command.
The invention has the following advantages:
1. the communication signal is used as the synchronous clock signal, and a synchronous clock signal does not need to be additionally designed, so that the implementation cost can be effectively reduced.
2. A synchronous fault-tolerant mechanism is designed, and the accurate synchronization among the start-stop control, the data acquisition and the high-speed communication can be realized.
3. A data dislocation prevention mechanism is designed, so that the problem of data time dislocation caused by communication faults can be effectively solved.
Drawings
The invention will be further described with reference to the following examples with reference to the accompanying drawings.
Fig. 1 is a schematic block diagram of hardware required by the asynchronous serial port synchronization source-based module synchronization control method of the present invention.
FIG. 2 is a diagram illustrating a synchronization source sending out a synchronization clock signal to each slave unit according to the present invention.
Fig. 3 is a schematic diagram of phase discrimination of a synchronous clock signal by a controlled unit according to the present invention.
Detailed Description
Referring to fig. 1 to fig. 3, a preferred embodiment of a module synchronization control method based on an asynchronous serial port synchronization source according to the present invention needs to provide a synchronization source (i.e., a multi-path asynchronous serial communication unit, which may be a multi-path full-duplex asynchronous serial communication unit or a multi-path half-duplex asynchronous serial communication unit) and a plurality of controlled units (i.e., lithium battery charging and discharging test equipment); each controlled unit is connected with the synchronous source through an asynchronous serial communication port (the asynchronous serial communication port can be a full-duplex asynchronous serial communication port or a half-duplex asynchronous serial communication port), as shown in fig. 1, the controlled unit 1 is connected with the synchronous source through an asynchronous serial communication port COM 1.
The control method comprises the following steps:
step S1, when the synchronization source sends an operation command to each of the controlled units (i.e., controlled unit 1 to controlled unit n) through the sending end of the asynchronous serial communication port (i.e., COM1 to COMn), sending a communication signal to each of the controlled units at the same time (as shown in fig. 2);
in step S1, the communication signal is a synchronization signal frame with a fixed time interval, a fixed frequency and a fixed frame length. Therefore, after the controlled unit receives the communication signal, the communication signal can be directly used as the synchronous clock signal, and the synchronous clock signal does not need to be additionally designed to realize synchronization, so that the synchronization cost can be greatly reduced.
In step S1, the operation command is a start/stop control command or a data sampling command. The start and stop control command is used for controlling the start or stop of the controlled unit, and the data sampling command is used for acquiring the data of the controlled unit.
Step S2, each controlled unit (i.e. controlled unit 1 to controlled unit n) receives the operation command and the communication signal from the synchronous source through the receiving end of the asynchronous serial communication port (i.e. COM1 to COMn), and extracts the communication signal as the synchronous clock signal for synchronization;
a synchronous source clock signal counter A and a synchronous signal period counter B are arranged in each controlled unit; assuming that the period of the synchronous clock signal is T1, the period of the clock signal of the controlled unit itself is T2;
in step S2, the step of extracting the communication signal as a synchronous clock signal for synchronization specifically includes: setting a synchronization time S, after the controlled unit extracts the communication signal as a synchronization clock signal, the synchronization source clock signal counter a counts the synchronization time S with the synchronization clock signal as a time base, which is denoted as k × T1, where k is a positive integer (as shown in fig. 3); meanwhile, the synchronous signal period counter B takes the clock signal of the controlled unit as a time base to time the synchronous time S, which is recorded as m × T2, wherein m is a positive integer;
when the continuous counting time of the synchronous source clock signal counter A reaches the synchronous time S, recording a timing result TimeOfA (namely k × T1), simultaneously generating a phase discrimination signal, and clearing the synchronous source clock signal counter A; when the continuous counting time of the synchronization signal period counter B reaches the synchronization time S, recording a timing result TimeOfB (namely m T2); and calculating a phase difference Error between the synchronous source clock signal counter A and the synchronous signal period counter B, clearing the synchronous signal period counter B after finishing phase discrimination, and compensating the calculated phase difference Error to the synchronous signal period counter B, thereby realizing the time synchronization operation of the controlled unit.
In the specific implementation, because the invention uses the communication signal as the synchronous clock signal, if the individual synchronous clock signal is lost due to the communication error and is not processed, the synchronization will be failed, in order to solve the problem, the invention adopts the following synchronous fault-tolerant mechanism:
the step S2 further includes: each controlled unit monitors whether the synchronous clock signal is lost or not, and if the synchronous clock signal is monitored to be lost, the controlled units automatically add and insert a synchronous clock signal and count the added and inserted synchronous clock signal; if the synchronous clock signal is monitored not to be lost, the complementary insertion processing is not carried out.
Step S3, each controlled unit executes corresponding operation according to the operation command (for example, the controlled unit is controlled to start or stop if a start/stop control command is received, or data of the controlled unit is collected if a data collection command is received), and the operation data is sent to the synchronous source through the sending end of the asynchronous serial communication port;
step S4, the synchronization source receives the operation data from each controlled unit through the receiving end of the asynchronous serial communication port.
Because the controlled unit inevitably generates communication errors in the process of transmitting the operation data to the synchronous source, if the controlled unit does not process the operation data, data malposition can be caused, and in order to solve the problem, the invention adopts the following mechanism for preventing the data malposition:
the step S4 further includes: when communication is wrong, the synchronous source automatically completes interpolation operation according to the upper and lower operation data, so that data dislocation is prevented.
In summary, the invention has the following advantages:
1. the communication signal is used as the synchronous clock signal, and a synchronous clock signal does not need to be additionally designed, so that the implementation cost can be effectively reduced.
2. A synchronous fault-tolerant mechanism is designed, and the accurate synchronization among the start-stop control, the data acquisition and the high-speed communication can be realized.
3. A data dislocation prevention mechanism is designed, so that the problem of data time dislocation caused by communication faults can be effectively solved.
Although specific embodiments of the invention have been described above, it will be understood by those skilled in the art that the specific embodiments described are illustrative only and are not limiting upon the scope of the invention, and that equivalent modifications and variations can be made by those skilled in the art without departing from the spirit of the invention, which is to be limited only by the appended claims.
Claims (5)
1. A module synchronization control method based on asynchronous serial port synchronization source is characterized in that: the method comprises providing a synchronization source and a plurality of controlled units; each controlled unit is connected with the synchronous source through an asynchronous serial communication port; the control method comprises the following steps:
step S1, when the synchronous source sends an operation command to each controlled unit through the sending end of the asynchronous serial communication port, sending a communication signal to each controlled unit at the same time;
step S2, each controlled unit receives the operation command and the communication signal from the synchronous source through the receiving end of the asynchronous serial communication port, and extracts the communication signal as a synchronous clock signal for synchronization;
step S3, each controlled unit executes corresponding operation according to the operation command and sends operation data to the synchronous source through the sending end of the asynchronous serial communication port;
step S4, the synchronous source receives the operation data from each controlled unit through the receiving end of the asynchronous serial communication port;
a synchronous source clock signal counter and a synchronous signal period counter are arranged in each controlled unit;
in step S2, the step of extracting the communication signal as a synchronous clock signal for synchronization specifically includes: setting synchronous time, wherein after the controlled unit extracts a communication signal as a synchronous clock signal, the synchronous source clock signal counter uses the synchronous clock signal as a time base to time the synchronous time, and meanwhile, the synchronous signal period counter uses the clock signal of the controlled unit as the time base to time the synchronous time; when the continuous counting time of the synchronous source clock signal counter reaches the synchronous time, recording a timing result TimeOfA, simultaneously generating a phase discrimination signal, and clearing the synchronous source clock signal counter; when the continuous counting time of the synchronous signal period counter reaches the synchronous time, recording a timing result TimeOfB; and calculating a phase difference Error between the synchronous source clock signal counter and the synchronous signal period counter, clearing the synchronous signal period counter after finishing phase discrimination, and compensating the calculated phase difference Error to the synchronous signal period counter, thereby realizing the time synchronization operation of the controlled unit.
2. The asynchronous serial port synchronous source-based module synchronous control method according to claim 1, characterized in that: the step S2 further includes:
each controlled unit monitors whether the synchronous clock signal is lost or not, and if the synchronous clock signal is monitored to be lost, the controlled units automatically add and insert a synchronous clock signal and count the added and inserted synchronous clock signal; if the synchronous clock signal is monitored not to be lost, the complementary insertion processing is not carried out.
3. The asynchronous serial port synchronous source-based module synchronous control method according to claim 1, characterized in that: the step S4 further includes:
when communication is wrong, the synchronous source automatically completes interpolation operation according to the upper and lower operation data.
4. The asynchronous serial port synchronous source-based module synchronous control method according to claim 1, characterized in that: in step S1, the communication signal is a synchronization signal frame with a fixed time interval, a fixed frequency and a fixed frame length.
5. The asynchronous serial port synchronous source-based module synchronous control method according to claim 1, characterized in that: in step S1, the operation command is a start/stop control command or a data sampling command.
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| CN101136855A (en) * | 2007-04-10 | 2008-03-05 | 中兴通讯股份有限公司 | Asynchronous clock data transmission device and method |
| CN104360974A (en) * | 2014-10-29 | 2015-02-18 | 上海伽利略导航有限公司 | Method and device for automatically adjusting Baud rate of universal asynchronous receiver/transmitter (UART) |
| US9755821B2 (en) * | 2015-04-02 | 2017-09-05 | Samsung Electronics Co., Ltd. | Device including single wire interface and data processing system including the same |
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| CN101958785B (en) * | 2009-07-17 | 2013-01-02 | 中国科学院沈阳计算技术研究所有限公司 | Transfer time difference-based numerical control system on-site bus time synchronization method and device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101079687A (en) * | 2006-05-25 | 2007-11-28 | 上海欣泰通信技术有限公司 | A clock adjustment algorithm based on minimum two multiplexing model |
| CN101136855A (en) * | 2007-04-10 | 2008-03-05 | 中兴通讯股份有限公司 | Asynchronous clock data transmission device and method |
| CN104360974A (en) * | 2014-10-29 | 2015-02-18 | 上海伽利略导航有限公司 | Method and device for automatically adjusting Baud rate of universal asynchronous receiver/transmitter (UART) |
| US9755821B2 (en) * | 2015-04-02 | 2017-09-05 | Samsung Electronics Co., Ltd. | Device including single wire interface and data processing system including the same |
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Denomination of invention: Module synchronization controlling method based on synchronization source of asynchronous serial port Effective date of registration: 20200703 Granted publication date: 20200410 Pledgee: China Exim Bank Fujian branch Pledgor: FUJIAN NEBULA ELECTRONICS Co.,Ltd. Registration number: Y2020980003784 |
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