CN109509821B - LED chip capable of resisting large current impact and manufacturing method thereof - Google Patents
LED chip capable of resisting large current impact and manufacturing method thereof Download PDFInfo
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- CN109509821B CN109509821B CN201811351507.6A CN201811351507A CN109509821B CN 109509821 B CN109509821 B CN 109509821B CN 201811351507 A CN201811351507 A CN 201811351507A CN 109509821 B CN109509821 B CN 109509821B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 15
- 238000009792 diffusion process Methods 0.000 claims abstract description 151
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 238000003475 lamination Methods 0.000 claims abstract description 37
- 239000004065 semiconductor Substances 0.000 claims description 56
- 239000000463 material Substances 0.000 claims description 27
- 239000000956 alloy Substances 0.000 claims description 19
- 229910045601 alloy Inorganic materials 0.000 claims description 19
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 17
- 238000001704 evaporation Methods 0.000 claims description 16
- 230000008020 evaporation Effects 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 13
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052782 aluminium Inorganic materials 0.000 claims description 10
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 10
- 229910052802 copper Inorganic materials 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 10
- 229910052709 silver Inorganic materials 0.000 claims description 10
- 239000004332 silver Substances 0.000 claims description 10
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 6
- 239000010931 gold Substances 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 4
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 4
- 230000008569 process Effects 0.000 claims description 4
- 238000005566 electron beam evaporation Methods 0.000 claims description 3
- 238000005468 ion implantation Methods 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims 2
- 238000007740 vapor deposition Methods 0.000 claims 2
- 230000000694 effects Effects 0.000 abstract description 6
- 230000002708 enhancing effect Effects 0.000 abstract description 5
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 230000006872 improvement Effects 0.000 description 8
- 238000000151 deposition Methods 0.000 description 6
- 238000002834 transmittance Methods 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 5
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- 229910002601 GaN Inorganic materials 0.000 description 4
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Devices (AREA)
Abstract
The invention discloses an LED chip resistant to large current impact, which comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination arranged on the light-emitting structure, a first electrode and a second electrode; the transparent lamination comprises M layers of transverse diffusion layers and M+1 layers of transparent conductive layers, M is larger than or equal to 1, and the transverse diffusion layers are arranged between the two layers of transparent conductive layers; the lateral diffusion layer has a resistance less than that of the transparent conductive layer. According to the LED chip, the transparent lamination is arranged, so that the resistance of each layer in the transparent lamination is different, and the effect of enhancing the transverse diffusion of current is achieved. Correspondingly, the invention also provides a manufacturing method of the LED chip resistant to high-current impact. According to the LED chip, the transparent lamination is arranged, so that the resistance of each layer in the transparent lamination is different, the effect of enhancing the transverse current diffusion is achieved, the capability of the chip for resisting large current impact is improved, and the element burning is avoided.
Description
Technical Field
The invention relates to the technical field of light emitting diodes, in particular to an LED chip resistant to high current impact and a manufacturing method thereof.
Background
The LED (Light Emitting Diode, light-emitting diode) is a semiconductor device which emits light by utilizing the energy released when the carriers are compounded, and the LED chip has the advantages of low power consumption, pure chromaticity, long service life, small volume, quick response time, energy conservation, environmental protection and the like.
In order to reduce the cost, the existing LED lamp reduces the circuit protection devices of the LED device, such as a non-isolated power supply, a sodium diode and the like.
The conventional LED chips cannot resist the impact of large current or large voltage, and when the external power supply is unstable, most of the LED chips in the LED lamp fail and burn out under the condition of lacking a circuit protection device, thereby seriously affecting the reliability and the service life of the product.
The patent with publication number CN201711067904 discloses a flip LED chip for improving current expansion uniformity and a manufacturing method thereof, wherein discontinuous transparent insulating layer patterns are manufactured inside a metal reflecting layer to increase the resistance value of the metal reflecting layer, so that the transverse expansion of current in the metal reflecting layer is restrained, and the current expansion uniformity is improved. The patent uses a current blocking method to increase the transverse resistance, which can lead to the voltage rise of the whole chip, which is easy to cause the burning of the element and the deterioration of the aging performance of large current.
Disclosure of Invention
The invention aims to solve the technical problem of providing the LED chip for resisting the large current impact, and the transverse diffusion layer is arranged to improve the transverse current diffusion of the chip, so that the capability of the chip for resisting the large current impact is improved.
The invention also solves the technical problem of providing a manufacturing method of the LED chip for resisting the heavy current impact, and the transverse diffusion layer is arranged to improve the transverse current diffusion of the chip, so that the capability of the chip for resisting the heavy current impact is improved.
In order to solve the technical problem, the invention provides an LED chip resistant to high current impact, which comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination arranged on the light-emitting structure, a first electrode and a second electrode;
the transparent lamination comprises M layers of transverse diffusion layers and M+1 layers of transparent conductive layers, M is larger than or equal to 1, and the transverse diffusion layers are arranged between the two layers of transparent conductive layers;
the lateral diffusion layer has a resistance less than that of the transparent conductive layer.
As an improvement of the above scheme, the resistance of the lateral diffusion layer is 3-10% smaller than that of the transparent conductive layer, and the resistivity of the material of the lateral diffusion layer is smaller than that of the material of the transparent conductive layer.
As an improvement of the above, the lateral diffusion layer is made of one or more of copper, silver, gold and aluminum, and the transparent conductive layer is made of indium tin oxide.
As an improvement of the scheme, the thickness of the transverse diffusion layer is 0.5-20nm, and the thickness of the transparent conductive layer is 40-360nm.
As an improvement of the scheme, the light-emitting structure comprises a first semiconductor layer, an active layer, a second semiconductor layer and a bare area etched to the first semiconductor layer, which are sequentially arranged on a substrate, wherein the first transparent conductive layer is arranged on the second semiconductor layer, the second electrode is arranged on the M+1th transparent conductive layer, and the first electrode is arranged on the first semiconductor layer.
Correspondingly, the invention also provides a manufacturing method of the LED chip resistant to high current impact, which comprises the following steps:
forming a light emitting structure on a substrate;
forming a transparent lamination layer on the light-emitting structure, wherein the transparent lamination layer comprises M layers of transverse diffusion layers and M+1 layers of transparent conductive layers, M is larger than or equal to 1, the transverse diffusion layers are arranged between the two layers of transparent conductive layers, and the resistance of the transverse diffusion layers is smaller than that of the transparent conductive layers;
heating the transparent lamination to finish the alloy, wherein the alloy temperature is 400-650 ℃;
and forming a second electrode on the M+1th transparent conductive layer and forming a second electrode on the light-emitting structure.
As an improvement of the above scheme, the resistance of the lateral diffusion layer is 3-10% smaller than that of the transparent conductive layer, and the resistivity of the material of the lateral diffusion layer is smaller than that of the material of the transparent conductive layer.
As an improvement of the above, the lateral diffusion layer is made of one or more of copper, silver, gold and aluminum, and the transparent conductive layer is made of indium tin oxide.
As an improvement of the scheme, the thickness of the transverse diffusion layer is 0.5-20nm, and the thickness of the transparent conductive layer is 40-360nm.
As an improvement of the scheme, the light-emitting structure comprises a first semiconductor layer, an active layer, a second semiconductor layer and a bare area etched to the first semiconductor layer, wherein the first semiconductor layer, the active layer and the second semiconductor layer are sequentially arranged on a substrate, the first transparent conductive layer is arranged on the second semiconductor layer, and the first electrode is arranged on the first semiconductor layer.
The implementation of the invention has the following beneficial effects:
1. according to the LED chip, the transparent lamination is arranged, so that the resistance of each layer in the transparent lamination is different, the effect of enhancing the transverse current diffusion is achieved, the capability of the chip for resisting large current impact is improved, and the element burning is avoided.
2. According to the invention, the low-resistance transverse diffusion layer is added into the transparent conductive layer, and the resistance of the transverse diffusion layer is lower than that of the transparent conductive layer, so that the current of the second electrode can be induced to transversely diffuse to the first electrode, the capability of the chip for resisting large current impact is improved, and the element burning is avoided.
Drawings
FIG. 1 is a schematic diagram of the structure of an LED chip of the present invention;
FIG. 2 is a schematic diagram of current spreading of an LED chip of the present invention;
fig. 3 is a flow chart of the fabrication of the LED chip of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings, for the purpose of making the objects, technical solutions and advantages of the present invention more apparent.
Referring to fig. 1, the present invention provides an LED chip resistant to large current impact, comprising a substrate 10, a light emitting structure 20 disposed on the substrate, a transparent laminate 30 disposed on the light emitting structure 20, and a first electrode 41 and a second electrode 42.
The material of the substrate 10 may be sapphire, silicon carbide or silicon, or may be other semiconductor materials, and the substrate 10 in this embodiment is preferably a sapphire substrate.
The light emitting structure 20 includes a first semiconductor layer 21, an active layer 22, a second semiconductor layer 23, and an exposed region 24 etched to the first semiconductor layer 21, which are sequentially disposed on the substrate 10.
Preferably, the first semiconductor layer 21 and the second semiconductor layer 23 of the present invention are both gallium nitride-based semiconductor layers, and the active layer 22 is a gallium nitride-based active layer 22. In addition, the materials of the first semiconductor layer 21, the second semiconductor layer 23 and the active layer 22 provided in the present invention may be other materials, which are not particularly limited in this application. The first semiconductor layer 21 is an N-type semiconductor layer, and the second semiconductor layer 23 is a P-type semiconductor layer.
In other embodiments of the present application, a buffer layer (not shown) is disposed between the substrate 10 and the first semiconductor layer 21.
The transparent laminate 30 includes m+1 transparent conductive layers 31 and M lateral diffusion layers 32, m+.1. Wherein the first transparent conductive layer 31 is disposed on the second semiconductor layer 23, the first lateral diffusion layer 32 is disposed on the first transparent conductive layer 31, the second transparent conductive layer 31 is disposed on the first lateral diffusion layer 32, and so on, the m+1th transparent conductive layer 31 is disposed on the M-th lateral diffusion layer 32. Wherein the resistivity of the lateral diffusion layer 32 is lower than the resistivity of the transparent conductive layer. Wherein the resistivity of the material of the lateral diffusion layer 32 is smaller than the resistivity of the material of the transparent conductive layer 31.
According to the transparent laminated layer, the transverse diffusion layer is arranged in the transparent conductive layer, so that the resistance of each layer in the transparent laminated layer is different, and the effect of enhancing the transverse diffusion of current is achieved.
Referring to fig. 2, fig. 2 is a schematic diagram of current diffusion of the LED chip of the present invention, in which the impact time of a large current or a large voltage is short, the current is very concentrated, and the electric quantity is very large, and the present invention adds a low-resistance lateral diffusion layer in the transparent conductive layer, and because the resistance of the lateral diffusion layer is lower than that of the transparent conductive layer, the current of the second electrode can be induced to diffuse laterally to the first electrode, so as to improve the capability of the chip to resist the impact of a large current, and avoid burning out the element. In particular, the applicant has applied this technique to increase the resistance of the LED chip against large currents and voltages by 50-70%, and in addition, the degree of degradation of the LED chip brightness is reduced by half.
Preferably, the lateral diffusion layer 32 has a resistance 3-10% less than that of the transparent conductive layer 31. When the resistance of the lateral diffusion layer 32 is less than 3% than that of the transparent conductive layer 31, the ability of the lateral diffusion layer 32 to induce a current becomes poor, and the ability of the chip to withstand large current impact cannot be effectively improved; when the resistance of the lateral diffusion layer 32 is more than 10% than that of the transparent conductive layer 31, too much current is laterally diffused from the lateral diffusion layer 32 to the first electrode, and the chip resistance against large current surge is not effectively improved. Since the resistance of the lateral diffusion layer 32 is related to the material, cross-sectional area and length of the lateral diffusion layer, the above-described range of resistance ratios cannot be obtained simply by a limited number of tests.
More preferably, the lateral diffusion layer 32 has a resistance 4-8% less than that of the transparent conductive layer 31.
Specifically, the lateral diffusion layer 32 is made of a low-resistance metal. Preferably, the lateral diffusion layer 32 is made of one or more of copper, silver, gold, and aluminum.
The thickness of the lateral diffusion layer 32 plays an important role in the light transmittance and the resistance of the lateral diffusion layer, among others. Preferably, the lateral diffusion layer has a thickness of 0.5-20nm. Since the size of one atom is about 0.3nm, the thickness of the lateral diffusion layer cannot be less than 0.5nm, and furthermore, when the thickness of the lateral diffusion layer is less than 0.5nm, the ability of the lateral diffusion layer to induce current is reduced. Since the lateral diffusion layer 32 is made of metal, light emission from the active layer is blocked or absorbed when the thickness of the lateral diffusion layer is greater than 20nm. Preferably, the lateral diffusion layer has a thickness of 1-10nm.
Further, in order to prevent the lateral diffusion layer from absorbing light, it is necessary to adjust the atomic spectral characteristics of the lateral diffusion layer according to the light emission band of the LED. For example: if the LED light-emitting wave band is a purple light wave band, the material of the transverse diffusion layer is silver, and the thickness is 0.5-2nm; if the LED light-emitting wave band is a blue-green light wave band, the material of the transverse diffusion layer is aluminum, and the thickness is 1-10nm; if the LED light-emitting wave band is red-yellow light wave band, the material of the transverse diffusion layer is copper, and the thickness is 1-20nm.
The transparent conductive layer 31 of the present invention is made of indium tin oxide, but is not limited thereto. The ratio of indium to tin in the indium tin oxide is 70-99:1-30. Preferably, the ratio of indium to tin in the indium tin oxide is 95:5. Thus, the conductive capability of the transparent conductive layer is improved, carriers are prevented from being gathered together, and the light emitting efficiency of the chip is improved.
Among them, the thickness of the transparent conductive layer 31 plays an important role in the transmittance and resistance of the transparent layer. Preferably, the transparent conductive layer 31 has a thickness of 40-360nm. When the thickness of the transparent conductive layer 31 is less than 40nm, the resistance of the transparent conductive layer is too large, which affects the diffusion of current, so that the current is concentrated in the lateral diffusion layer; when the thickness of the transparent conductive layer is larger than 360nm, the light transmittance of the transparent conductive layer is seriously reduced, and the light emission of the chip is influenced. Preferably, the transparent conductive layer 31 has a thickness of 80-200nm. More preferably, the transparent conductive layer 31 has a thickness of 80-150nm.
The first electrode 41 of the present invention is disposed on the first semiconductor layer 21 of the exposed region 24, and the second electrode 42 is disposed on the m+1 transparent conductive layer 31. Among them, the first electrode 41 and the second electrode 42 are made of metal, and the present invention is not particularly limited.
The LED chip further comprises an insulating layer, wherein the insulating layer covers the transparent conducting layer and extends to the side wall of the light-emitting structure so as to prevent short circuit and electric leakage of the LED chip.
Referring to fig. 1 and 3, fig. 3 is a flow chart of manufacturing the LED chip with high current impact resistance, and the invention further provides a manufacturing method of the LED chip with high current impact resistance, comprising the following steps:
s101, forming a light-emitting structure on a substrate;
the material of the substrate 10 may be sapphire, silicon carbide or silicon, or may be other semiconductor materials, and the substrate 10 in this embodiment is preferably a sapphire substrate.
The light emitting structure 20 includes a first semiconductor layer 21, an active layer 22, a second semiconductor layer 23, and an exposed region 24 etched to the first semiconductor layer 21, which are sequentially disposed on the substrate 10.
Preferably, the first semiconductor layer 21 and the second semiconductor layer 23 of the present invention are both gallium nitride-based semiconductor layers, and the active layer 22 is a gallium nitride-based active layer 22. In addition, the materials of the first semiconductor layer 21, the second semiconductor layer 23 and the active layer 22 provided in the present invention may be other materials, which are not particularly limited in this application. The first semiconductor layer 21 is an N-type semiconductor layer, and the second semiconductor layer 23 is a P-type semiconductor layer.
In other embodiments of the present application, a buffer layer (not shown) is disposed between the substrate 10 and the first semiconductor layer 21.
S102, forming a transparent lamination layer on the light-emitting structure;
the transparent laminate 30 includes m+1 transparent conductive layers 31 and M lateral diffusion layers 32, m+.1. Wherein the first transparent conductive layer 31 is disposed on the second semiconductor layer 23, the first lateral diffusion layer 32 is disposed on the first transparent conductive layer 31, the second transparent conductive layer 31 is disposed on the first lateral diffusion layer 32, and so on, the m+1th transparent conductive layer 31 is disposed on the M-th lateral diffusion layer 32. Wherein the resistivity of the material of the lateral diffusion layer 32 is lower than the resistivity of the material of the transparent conductive layer.
According to the transparent laminated layer, the transverse diffusion layer is arranged in the transparent conductive layer, so that the resistance of each layer in the transparent laminated layer is different, and the effect of enhancing the transverse diffusion of current is achieved.
Specifically, photoresist or SiO is adopted 2 As a mask, a transparent conductive layer 31 is deposited on the surface of the second semiconductor layer 23 by an electron beam evaporation process. Wherein the evaporation temperature is 0-300 ℃, the oxygen flow is 5-20sccm, the vacuum degree of the evaporation cavity is 3.0-10.0E-5, and the evaporation time is 100-300min. When the evaporation temperature is lower than 0 ℃, the transparent conductive layer cannot acquire enough energy to migrate, and the formed transparent conductive layer is poor in quality and has many defects; when the evaporation temperature is higher than 300 ℃, the temperature is too high, the film energy is too high, deposition on an epitaxial layer is not easy, the deposition rate is slow, and the efficiency is reduced. When the oxygen flow is less than 5sccm, the oxygen flow is too low, the oxidation of the transparent conductive layer is insufficient, the film quality is poor, and when the oxygen flow is more than 20sccm, the oxygen flow is too high, the transparent conductive layer is excessively oxidized, and the film defect density is increased. When the evaporation time is less than 100min, the film needs higher deposition rate to reach the required thickness, the deposition rate is too fast, atoms cannot migrate, and therefore the film has poor growth quality and many defects. Preferably, the evaporation temperature is 290 ℃, the oxygen flow is 10sccm, and the vacuum degree of the evaporation cavity is 3.0 x 10 -5 -10.0*10 -5 。
The transparent conductive layer 31 of the present invention is made of indium tin oxide, but is not limited thereto. The ratio of indium to tin in the indium tin oxide is 70-99:1-30. Preferably, the ratio of indium to tin in the indium tin oxide is 95:5. Thus, the conductive capability of the transparent conductive layer is improved, carriers are prevented from being gathered together, and the light emitting efficiency of the chip is improved.
Among them, the thickness of the transparent conductive layer 31 plays an important role in the transmittance and resistance of the transparent layer. Preferably, the transparent conductive layer 31 has a thickness of 40-360nm. When the thickness of the transparent conductive layer 31 is less than 40nm, the resistance of the transparent conductive layer is too large, which affects the diffusion of current, so that the current is concentrated in the lateral diffusion layer; when the thickness of the transparent conductive layer is larger than 360nm, the light transmittance of the transparent conductive layer is seriously reduced, and the light emission of the chip is influenced. Preferably, the transparent conductive layer 31 has a thickness of 80-200nm. More preferably, the transparent conductive layer 31 has a thickness of 80-150nm.
A lateral diffusion layer 32 is formed on the transparent conductive layer 31 by evaporation, magnetron sputtering or ion implantation. Wherein the lateral diffusion layer 32 is made of a low resistance metal. Preferably, the lateral diffusion layer 32 is made of one or more of copper, silver, gold, and aluminum.
The thickness of the lateral diffusion layer 32 plays an important role in the light transmittance and the electrical resistance of the lateral diffusion layer. Preferably, the lateral diffusion layer has a thickness of 0.5-20nm. Since the size of one atom is about 0.3nm, the thickness of the lateral diffusion layer cannot be less than 0.5nm, and furthermore, when the thickness of the lateral diffusion layer is less than 0.5nm, the ability of the lateral diffusion layer to induce current is reduced. Since the lateral diffusion layer 32 is made of metal, light emission from the active layer is blocked or absorbed when the thickness of the lateral diffusion layer is greater than 20nm. Preferably, the lateral diffusion layer has a thickness of 1-10nm.
Referring to fig. 2, fig. 2 is a schematic diagram of current diffusion of the LED chip, in which the impact time of large current or large voltage is short, the current is very concentrated, and the electric quantity is very large, and the low-resistance lateral diffusion layer is added in the transparent conductive layer, so that the current of the second electrode can be induced to diffuse laterally to the first electrode because the resistance of the lateral diffusion layer is lower than that of the transparent conductive layer, thereby improving the capability of the chip to resist the impact of large current and avoiding the burning of the element. In particular, the applicant has applied this technique to increase the resistance of the LED chip against large currents and voltages by 50-70%, and in addition, the degree of degradation of the LED chip brightness is reduced by half.
Preferably, the lateral diffusion layer 32 has a resistance 3-10% less than that of the transparent conductive layer 31. When the resistance of the lateral diffusion layer 32 is less than 3% than that of the transparent conductive layer 31, the ability of the lateral diffusion layer 32 to induce a current becomes poor, and the ability of the chip to withstand large current impact cannot be effectively improved; when the resistance of the lateral diffusion layer 32 is more than 10% than that of the transparent conductive layer 31, too much current is laterally diffused from the lateral diffusion layer 32 to the first electrode, and the chip resistance against large current surge is not effectively improved. Since the resistance of the lateral diffusion layer 32 is related to the material, cross-sectional area and length of the lateral diffusion layer, the above-described range of resistance ratios cannot be obtained simply by a limited number of tests.
More preferably, the lateral diffusion layer 32 has a resistance 4-8% less than that of the transparent conductive layer 31.
Further, in order to prevent the lateral diffusion layer from absorbing light, it is necessary to adjust the atomic spectral characteristics of the lateral diffusion layer according to the light emission band of the LED. For example: if the LED light-emitting wave band is a purple light wave band, the material of the transverse diffusion layer is silver, and the thickness is 0.5-2nm; if the LED light-emitting wave band is a blue-green light wave band, the material of the transverse diffusion layer is aluminum, and the thickness is 1-10nm; if the LED light-emitting wave band is red-yellow light wave band, the material of the transverse diffusion layer is copper, and the thickness is 1-20nm.
S103, heating the transparent lamination to finish alloy;
after the transparent lamination is formed, a certain gap exists at the interface between the transparent conductive layer and the transverse diffusion layer, and the current diffusion capability of the transparent lamination is seriously affected. According to the invention, by heating and annealing the laminated layers, interface atoms are slowly moved and arranged, so that the gaps are filled, and the overall resistance of the transparent laminated layers can be reduced.
The alloy temperature has a correlation with the material and thickness of the transparent conductive layer and the lateral diffusion layer. Preferably, the alloy temperature is 400-650 ℃. When the alloy temperature is lower than 400 ℃, the alloy temperature is too low, the kinetic energy is insufficient, the interface atoms are rearranged slowly, the time is too long, and even no effect is achieved; when the alloy temperature is higher than 650 ℃, the structure of the active layer can be damaged, and the photoelectric performance of the chip is affected.
S104, forming a second electrode on the M+1th transparent conductive layer, and forming a second electrode on the light-emitting structure.
And depositing a metal layer on the M+1th transparent conductive layer by adopting an evaporation or magnetron sputtering method to form a second electrode, and depositing metal on the first semiconductor layer in the exposed area to form a first electrode.
Among them, the first electrode 41 and the second electrode 42 are made of metal, and the present invention is not particularly limited.
The invention will be illustrated by the following specific examples
Example 1
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 1 layer of transverse diffusion layer and 2 layers of transparent conductive layers, and the transverse diffusion layer is arranged between the two layers of transparent conductive layers;
the lateral diffusion layer is made of silver, the transparent conductive layer is made of indium tin oxide, the thickness of the lateral diffusion layer is 1nm, and the thickness of the transparent conductive layer is 50nm;
the lateral diffusion layer has a resistance 3% less than that of the transparent conductive layer.
Wherein, the alloy temperature of the transparent lamination layer in the embodiment is 450 ℃.
Example 2
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 1 layer of transverse diffusion layer and 2 layers of transparent conductive layers, and the transverse diffusion layer is arranged between the two layers of transparent conductive layers;
the lateral diffusion layer is made of aluminum, the transparent conductive layer is made of indium tin oxide, the thickness of the lateral diffusion layer is 2nm, and the thickness of the transparent conductive layer is 80nm;
the lateral diffusion layer has a resistance 5% less than that of the transparent conductive layer.
The alloy temperature of the transparent laminate in this example was 500 ℃.
Example 3
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 1 layer of transverse diffusion layer and 2 layers of transparent conductive layers, and the transverse diffusion layer is arranged between the two layers of transparent conductive layers;
the transverse diffusion layer is made of copper, the transparent conductive layer is made of indium tin oxide, the thickness of the transverse diffusion layer is 5nm, and the thickness of the transparent conductive layer is 120nm;
the lateral diffusion layer has a resistance 6% less than that of the transparent conductive layer.
The alloy temperature of the transparent laminate in this example was 530 ℃.
Example 4
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 2 layers of transverse diffusion layers and 3 layers of transparent conductive layers, and the transverse diffusion layers are arranged between the two layers of transparent conductive layers;
the lateral diffusion layer is made of silver, the transparent conductive layer is made of indium tin oxide, the thickness of the lateral diffusion layer is 0.5nm, and the thickness of the transparent conductive layer is 100nm;
the lateral diffusion layer has a resistance 5% less than that of the transparent conductive layer.
The alloy temperature of the transparent laminate in this example was 500 ℃.
Example 5
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 3 transverse diffusion layers and 4 transparent conductive layers, and the transverse diffusion layers are arranged between the two transparent conductive layers;
the lateral diffusion layer is made of aluminum, the transparent conductive layer is made of indium tin oxide, the thickness of the lateral diffusion layer is 5nm, and the thickness of the transparent conductive layer is 200nm;
the lateral diffusion layer has a resistance 7% less than that of the transparent conductive layer.
The alloy temperature of the transparent laminate in this example was 570 ℃.
Example 6
An LED chip resistant to large current impact comprises a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises 2 layers of transverse diffusion layers and 3 layers of transparent conductive layers, and the transverse diffusion layers are arranged between the two layers of transparent conductive layers;
the transverse diffusion layer is made of copper, the transparent conductive layer is made of indium tin oxide, the thickness of the transverse diffusion layer is 10nm, and the thickness of the transparent conductive layer is 300nm;
the lateral diffusion layer has a resistance 8% less than that of the transparent conductive layer.
The alloy temperature of the transparent laminate in this example was 600 ℃.
Comparative example 1
An LED chip comprises a substrate, a light-emitting structure arranged on the substrate, a transparent conductive layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent conductive layer is made of indium tin oxide, and the thickness of the transparent conductive layer is 100nm.
The LED chips of examples 1 to 6 and comparative example 1 were subjected to a high-current high-voltage and aging test (1000 hours), and the results were as follows:
| project | Impact voltage (V) | Combat electric current (mA) | Light aging Rate (%) |
| Example 1 | 9 | 180 | -2 |
| Example 2 | 10 | 180 | -2 |
| Example 3 | 10 | 180 | -2 |
| Example 4 | 10 | 180 | -2 |
| Example 5 | 9 | 180 | -2 |
| Example 6 | 10 | 180 | -2 |
| Comparative example 1 | 6 | 150 | -4 |
Therefore, the LED chip effectively improves the capability of the chip for resisting high voltage and high current and prolongs the service life of products by arranging the transparent lamination. In the light aging test, the initial value of the light degradation change was zero, the light degradation luminance was decreased, and the light degradation luminance was increased, which was a negative value. The LED chip of the present invention has a lower decline in light decay luminance than comparative example 1.
The above disclosure is only a preferred embodiment of the present invention, and it is needless to say that the scope of the invention is not limited thereto, and therefore, the equivalent changes according to the claims of the present invention still fall within the scope of the present invention.
Claims (10)
1. An LED chip resistant to large current impact is characterized by comprising a substrate, a light-emitting structure arranged on the substrate, a transparent lamination layer arranged on the light-emitting structure, and a first electrode and a second electrode;
the transparent lamination comprises M layers of transverse diffusion layers and M+1 layers of transparent conductive layers, M is larger than or equal to 1, and the transverse diffusion layers are arranged between the two layers of transparent conductive layers;
the resistance of the transverse diffusion layer is smaller than that of the transparent conductive layer;
the transparent lamination is heated to finish alloy so as to fill gaps between the transparent conductive layer and the transverse diffusion layer, wherein the alloy temperature is 400-650 ℃;
the transparent conductive layer is prepared by adopting an electron beam evaporation process, wherein the evaporation temperature is 0-300The temperature is 5-20sccm, the vacuum degree of the evaporation cavity is 3.0 x 10 -5 -10.0*10 -5 The vapor deposition time is 100-300min;
the transverse diffusion layer is prepared by adopting an evaporation plating method, a magnetron sputtering method or an ion implantation method.
2. The high current surge resistant LED chip of claim 1, wherein the lateral diffusion layer has a resistance 3-10% less than the transparent conductive layer, and wherein the lateral diffusion layer has a material having a resistivity less than the transparent conductive layer.
3. The high current surge resistant LED chip of claim 2, wherein said lateral diffusion layer is made of one or more of copper, silver, gold and aluminum, and said transparent conductive layer is made of indium tin oxide.
4. The high current surge resistant LED chip of claim 3, wherein said lateral diffusion layer has a thickness of 0.5-20nm and said transparent conductive layer has a thickness of 40-360nm.
5. The LED chip of claim 1, wherein the light emitting structure comprises a first semiconductor layer, an active layer, a second semiconductor layer, and an exposed region etched to the first semiconductor layer, sequentially disposed on a substrate, wherein the first transparent conductive layer is disposed on the second semiconductor layer, the second electrode is disposed on the m+1th transparent conductive layer, and the first electrode is disposed on the first semiconductor layer.
6. The method for manufacturing the high-current impact resistant LED chip according to any one of claims 1 to 5, comprising the steps of:
forming a light emitting structure on a substrate;
forming a transparent lamination layer on the light-emitting structure, wherein the transparent lamination layer comprises M layers of transverse diffusion layers and M+1 layers of transparent conductive layers, M is larger than or equal to 1, the transverse diffusion layers are arranged between the two layers of transparent conductive layers, and the resistance of the transverse diffusion layers is smaller than that of the transparent conductive layers;
heating the transparent lamination to finish alloy, wherein a gap between the transparent conductive layer and the transverse diffusion layer is filled in the alloy process, and the alloy temperature is 400-650 ℃;
forming a second electrode on the M+1th transparent conductive layer, and forming a second electrode on the light-emitting structure;
the transparent conductive layer is prepared by adopting an electron beam evaporation process, wherein the evaporation temperature is 0-300 ℃, the oxygen flow is 5-20sccm, and the vacuum degree of an evaporation cavity is 3.0 x 10 -5 -10.0*10 -5 The vapor deposition time is 100-300min;
and forming a transverse diffusion layer on the transparent conductive layer by adopting an evaporation plating, magnetron sputtering or ion implantation method.
7. The method of manufacturing a high current surge resistant LED chip of claim 6, wherein the lateral diffusion layer has a resistance 3-10% less than that of the transparent conductive layer, and wherein the lateral diffusion layer has a material having a resistivity less than that of the transparent conductive layer.
8. The method of manufacturing a high current surge resistant LED chip of claim 7, wherein said lateral diffusion layer is made of one or more of copper, silver, gold and aluminum, and said transparent conductive layer is made of indium tin oxide.
9. The method of manufacturing a high current surge resistant LED chip of claim 8, wherein said lateral diffusion layer has a thickness of 0.5-20nm and said transparent conductive layer has a thickness of 40-360nm.
10. The method of manufacturing a high current surge resistant LED chip of claim 6 wherein said light emitting structure comprises a first semiconductor layer, an active layer, a second semiconductor layer and an exposed area etched to the first semiconductor layer sequentially disposed on a substrate, wherein a first transparent conductive layer is disposed on the second semiconductor layer and a first electrode is disposed on the first semiconductor layer.
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