CN109509764A - Cmos image sensor and its manufacturing method - Google Patents
Cmos image sensor and its manufacturing method Download PDFInfo
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- CN109509764A CN109509764A CN201811515732.9A CN201811515732A CN109509764A CN 109509764 A CN109509764 A CN 109509764A CN 201811515732 A CN201811515732 A CN 201811515732A CN 109509764 A CN109509764 A CN 109509764A
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 239000004065 semiconductor Substances 0.000 claims abstract description 52
- 238000002955 isolation Methods 0.000 claims abstract description 46
- 238000002347 injection Methods 0.000 claims abstract description 38
- 239000007924 injection Substances 0.000 claims abstract description 38
- 238000006396 nitration reaction Methods 0.000 claims abstract description 36
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 239000010410 layer Substances 0.000 claims description 136
- 239000000463 material Substances 0.000 claims description 24
- 239000011229 interlayer Substances 0.000 claims description 19
- 238000005530 etching Methods 0.000 claims description 15
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000002184 metal Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 8
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 7
- 238000001259 photo etching Methods 0.000 claims description 7
- 239000000126 substance Substances 0.000 claims description 7
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 6
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000003701 mechanical milling Methods 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 6
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 6
- 229910052721 tungsten Inorganic materials 0.000 claims description 6
- 239000010937 tungsten Substances 0.000 claims description 6
- 230000005611 electricity Effects 0.000 claims description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 5
- 229920005591 polysilicon Polymers 0.000 claims description 5
- 238000010276 construction Methods 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims 2
- 238000007254 oxidation reaction Methods 0.000 claims 2
- 239000013078 crystal Substances 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 4
- 238000007667 floating Methods 0.000 description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000001413 cellular effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
- H01L21/76237—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials introducing impurities in trench side or bottom walls, e.g. for forming channel stoppers or alter isolation behavior
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
Abstract
The invention discloses a kind of cmos image sensor, isolation has deep trench isolation structure between each pixel unit, reduces the signal cross-talk between each pixel unit by increasing the trench depth of deep trench isolation structure；Deep trench isolation structure include: groove, the side for being formed in groove and bottom surface ONO layer and the fully filled conductive material layer of ONO layer will be formed with；Groove is formed in semiconductor substrate, is formed with pixel cell structure in deep trench isolation structure two sides；Conductive material layer is connected to first electrode, and the inner surface of groove is formed with dangling bonds；By adding positive voltage in first electrode, the electron injection that dangling bonds are generated is into the trap of the second nitration case, to eliminate the dark current as caused by dangling bonds.The invention also discloses a kind of manufacturing methods of cmos image sensor.The present invention can be reduced dark current.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing field, in particular to a kind of cmos image sensor；The present invention is also
It is related to a kind of manufacturing method of cmos image sensor.
Background technique
Existing cmos image sensor (CMOS Image Sensor, CIS) is by pixel (Pixel) element circuit and CMOS
Circuit is constituted, and relative to ccd image sensor, cmos image sensor has because using CMOS standard manufacture craft
Preferably can integrated level, can be integrated on same chip with other digital-to-analogue operations and control circuit, more adapt to following hair
Exhibition.
According to transistor size contained by the pixel unit circuit of existing cmos image sensor, it is broadly divided into 3T type structure
With 4T type structure.
As shown in Figure 1, being the schematic equivalent circuit of the pixel unit circuit of existing 3T type cmos image sensor；It is existing
The pixel unit circuit of 3T type cmos image sensor includes that light sensitive diode (Photo Diode, PD) D1 and cmos pixel are read
Circuit out.The cmos pixel reading circuit is 3T type pixel circuit, including reset transistor M1, amplifier tube M2, selecting pipe M3, three
It is all NMOS tube.
The N-type region of the light sensitive diode D1 is connected with the source electrode of the reset transistor M1.
The grid of the reset transistor M1 meets reset signal Reset, and the reset signal Reset is a potential pulse, works as institute
When to state reset signal Reset be high level, reset transistor M1 conducting and by the Electron absorption of the light sensitive diode D1 to reading
It realizes and resets in the power supply Vdd of circuit out.The light sensitive diode D1 generates light induced electron, potential rise when light irradiation
Height spreads out of electric signal by amplifying circuit.The grid of the selecting pipe M3 meets row selection signal Rs, for selecting after amplifying
Electric signal output be output signal Vout.
As shown in Fig. 2, being the schematic equivalent circuit of the pixel unit circuit of existing 4T type cmos image sensor；And figure
It is more transfering transistors or be transfer tube M4, the transfer in structure shown in Fig. 2 in place of the difference of structure shown in 1
The source region of transistor 4 is to connect the N-type region of the light sensitive diode D1, and the drain region of the transfering transistor 4 is floating active area
The grid of (Floating Diffusion, FD), the transfering transistor 4 connect transmission of control signals Tx.Photosensitive two pole
After pipe D1 generates light induced electron, it is transferred in floating active area by the transfering transistor 4, is then connected by floating active area
The grid for being connected to amplifier tube M2 realizes the amplification of signal.
As shown in figure 3, be the device architecture schematic diagram of existing cmos image sensor, existing cmos image sensor it is each
Isolation has deep trench isolation structure between pixel unit, is dropped by increasing by 102 depth of groove of the deep trench isolation structure
Signal cross-talk between low each pixel unit.
The deep trench isolation structure includes: the groove 102 and the dielectric layer 103 for being filled in the groove 102, is situated between
Matter layer 103 is usually oxide layer.
The groove 102 is formed in semiconductor substrate 101, the semiconductor in deep trench isolation structure two sides
The corresponding pixel cell structure is formed in substrate 101.
The semiconductor substrate 101 is silicon substrate.
The groove 102 adds etching technics to be formed by photoetching, is formed in the side of the groove 102 and bottom surface
Etch the dangling bonds generated.
The pixel cell structure packet being formed in the semiconductor substrate 101 of deep trench isolation structure two sides
Include light sensitive diode 104.
The semiconductor substrate 101 is p-type doping, and the light sensitive diode 104 includes being formed in the semiconductor substrate
The N-type injection region on 101 surfaces, the PN junction diode group formed between the semiconductor substrate 101 of N-type injection region bottom
At；The N-type injection region stores light induced electron after the light sensitive diode 104 is photosensitive.
It is also formed with p-type epitaxial layer on the surface of the semiconductor substrate 101, the N-type injection region is formed in the p-type
In epitaxial layer.
In Fig. 3, it is also formed with interlayer film 105 on the surface of the semiconductor substrate 101, interlayer film 105 generally includes more
Layer, is formed with front metal layer, the corresponding doped region of the front metal layer of the bottom and bottom on the surface of each layer interlayer film 105
Between connected by contact hole, by through-hole connection between each front metal layer, contact hole and through-hole all pass through corresponding interlayer
Film.
The surface of interlayer film 105 is also formed with chromatic filter (Color Filter, CF) 106, and chromatic filter 106 is logical
It often include the optical filter of this three color of red, green and blue.
Lenticule (Micro Lens) 107 is formed at the top of chromatic filter 106.
As shown in Figure 3 it is found that the electronics in the dangling bonds of the inner surface of the groove 102 is easy to be leaked to the zanjon
In the light sensitive diode 104 of the pixel cell structure of recess isolating structure two sides, to generate dark current, namely in no light
Electric current can be also generated in the light sensitive diode 104 according under conditions of, dark current and exposure are unrelated, this can be to described photosensitive two
The performance of pole pipe 104 has an adverse effect.
Summary of the invention
Technical problem to be solved by the invention is to provide a kind of cmos image sensors, can be reduced dark current.For this purpose, this
Invention also provides a kind of manufacturing method of cmos image sensor.
In order to solve the above technical problems, isolation has depth between each pixel unit of cmos image sensor provided by the invention
Groove isolation construction reduces the letter between each pixel unit by increasing the trench depth of the deep trench isolation structure
Number crosstalk.
The deep trench isolation structure includes: the ONO layer of the groove, the side for being formed in the groove and bottom surface
And the fully filled conductive material layer of the ONO layer will be formed with.
The groove is formed in semiconductor substrate, in the semiconductor substrate of deep trench isolation structure two sides
It is formed with the corresponding pixel cell structure.
The ONO layer includes the first oxide layer being sequentially overlapped, the second nitration case and third oxide layer.
The conductive material layer is connected to first electrode.
The groove adds etching technics to be formed by photoetching, is formed with etching in the side of the groove and bottom surface and produces
Raw dangling bonds.
By adding positive voltage in the first electrode, the electron injection that the dangling bonds are generated to second nitration case
Trap in, thus eliminate the dark current as caused by the dangling bonds.
A further improvement is that the semiconductor substrate is silicon substrate.
A further improvement is that the material of first oxide layer and the third oxide layer is all silica, described
The material of nitride layer is silicon nitride.
A further improvement is that the material of the conductive material layer is polysilicon or tungsten.
A further improvement is that second electrode is formed on the surface of second nitration case, by second electricity
Pole making alive removes the electronics being injected into the trap of second nitration case.
A further improvement is that being formed in the picture in the semiconductor substrate of deep trench isolation structure two sides
Plain cellular construction includes light sensitive diode.
A further improvement is that the semiconductor substrate is p-type doping, the light sensitive diode includes being formed in described half
The N-type injection region of conductor substrate surface, the PN junction diode formed between the semiconductor substrate of N-type injection region bottom
Composition；The N-type injection region stores light induced electron after the light sensitive diode is photosensitive.
A further improvement is that being also formed with p-type epitaxial layer, the N-type injection region on the surface of the semiconductor substrate
It is formed in the p-type epitaxial layer.
In order to solve the above technical problems, the manufacturing method of cmos image sensor provided by the invention includes the following steps:
Step 1: providing semi-conductive substrate, groove is formed using photoetching plus etching technics in the semiconductor substrate,
Etching technics can form dangling bonds in the inner surface and bottom surface of the groove；The groove is defined on cmos image sensing
Between each pixel unit of device.
Step 2: the inner surface and bottom surface in the groove form ONO layer, the ONO layer includes successively folding
The first oxide layer, the second nitration case and the third oxide layer added.
The groove is filled up completely Step 3: forming conductive material layer；By the groove, the ONO layer and described lead
Material layer forms deep trench isolation structure together, reduces each institute by increasing the trench depth of the deep trench isolation structure
State the signal cross-talk between pixel unit.
Step 4: form interlayer film, contact hole and front metal layer, the contact hole passes through the interlayer film, it is described just
First electrode is formed with after the metallic layer graphic of face, the first electrode passes through the corresponding contact hole in bottom and the conduction
Material layer connection；By adding positive voltage in the first electrode, the electron injection that the dangling bonds are generated to second nitrogen
In the trap for changing layer, to eliminate the dark current as caused by the dangling bonds.
A further improvement is that in step 2, first oxide layer, second nitration case and the third oxide layer
It sequentially forms, first oxide layer, second nitration case and the third oxide layer after formation can also extend to described
Surface outside groove, extended meeting is by returning carving technology or chemical machinery after extending to the ONO layer of the groove outer surface
Grinding technics removal.
A further improvement is that the semiconductor substrate is silicon substrate.
A further improvement is that the material of first oxide layer and the third oxide layer is all silica, described
The material of nitride layer is silicon nitride.
A further improvement is that the material of the conductive material layer is polysilicon or tungsten.
A further improvement is that conductive material layer described in step 3 can also extend to the outer surface of the groove, prolong
Extended meeting is removed by returning carving technology or chemical mechanical milling tech after reaching the conductive material layer of the groove outer surface.
A further improvement is that the front metal layer is also formed with second electrode, the second electrode after graphical
The surface of second nitration case is connected to by the corresponding contact hole in bottom, by removing in the second electrode making alive
The electronics being injected into the trap of second nitration case.
A further improvement is that being formed in the picture in the semiconductor substrate of deep trench isolation structure two sides
Plain cellular construction includes light sensitive diode.
A further improvement is that the semiconductor substrate is p-type doping, after step 3 completion and step 4 is formed
It is further comprised the steps of: before the interlayer film
Form N-type injection region in the semiconductor substrate surface, the semiconductor substrate of N-type injection region bottom it
Between formed PN junction diode composition；The N-type injection region stores light induced electron after the light sensitive diode is photosensitive.
Each pixel unit of cmos image sensor of the present invention is isolated by deep trench isolation structure, due to deep trench isolation
Depth of the trench depth of structure than usual fleet plough groove isolation structure (STI), therefore the signal between pixel unit can be realized well
Crosstalk；Meanwhile the defect of dangling bonds brought by etching of the present invention also to the groove of deep trench isolation structure has carried out accordingly
Structure design, be usually mainly that oxide layer is changed by ONO by single dielectric layer by the filled layer being filled in groove
Positive electricity can be added on the first electrode by the first electrode making alive at top in layer plus conductive material layer composition, conductive material layer
After pressure, can by etching groove formed dangling bonds caused by electron injection into the trap of the second nitration case of ONO layer, due to
Electronics caused by dangling bonds is stored in the trap of the second nitration case, therefore is avoided that electron injection caused by dangling bonds arrives
In the pixel unit of deep trench isolation structure two sides, to also be avoided that the electron injection as caused by dangling bonds to pixel list
The dark current generated in member, so the present invention can be reduced dark current.
Detailed description of the invention
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:
Fig. 1 is the schematic equivalent circuit of the pixel unit circuit of existing 3T type cmos image sensor；
Fig. 2 is the schematic equivalent circuit of the pixel unit circuit of existing 4T type cmos image sensor；
Fig. 3 is the device architecture schematic diagram of existing cmos image sensor；
Fig. 4 is the device architecture schematic diagram of cmos image sensor of the embodiment of the present invention.
Specific embodiment
As shown in figure 4, being the device architecture schematic diagram of cmos image sensor of the embodiment of the present invention, the embodiment of the present invention
Isolation has deep trench isolation structure between each pixel unit of cmos image sensor, by increasing the deep trench isolation structure
2 depth of groove reduce the signal cross-talk between each pixel unit.
The deep trench isolation structure includes: the ONO of the groove 2, the side for being formed in the groove 2 and bottom surface
Layer 3 and will be formed with the fully filled conductive material layer 8 of the ONO layer 3.
The groove 2 is formed in semiconductor substrate 1, the semiconductor substrate in deep trench isolation structure two sides
The corresponding pixel cell structure is formed in 1.
The semiconductor substrate 1 is silicon substrate.The material of the first oxide layer 3a and the third oxide layer 3c is all
Silica, the material of the second nitration case 3b are silicon nitride.
The material of the conductive material layer 8 is polysilicon or tungsten.
The ONO layer 3 includes the first oxide layer 3a, the second nitration case 3b and the third oxide layer 3c being sequentially overlapped.
The conductive material layer 8 is connected to first electrode V1.
The groove 2 adds etching technics to be formed by photoetching, is formed with etching in the side of the groove 2 and bottom surface
The dangling bonds of generation.
By adding positive voltage in the first electrode V1, the electron injection that the dangling bonds are generated to second nitridation
In the trap of layer 3b, to eliminate the dark current as caused by the dangling bonds.
Be formed with second electrode V2 on the surface of the second nitration case 3b, by the second electrode V2 making alive come
Remove the electronics being injected into the trap of the second nitration case 3b.
The pixel cell structure being formed in the semiconductor substrate 1 of deep trench isolation structure two sides includes
Light sensitive diode 4.
The semiconductor substrate 1 is p-type doping, and the light sensitive diode 4 includes being formed in 1 surface of semiconductor substrate
N-type injection region, the PN junction diode composition formed between the semiconductor substrate 1 of N-type injection region bottom；The N
Type injection region stores light induced electron after the light sensitive diode 4 is photosensitive.
It is also formed with p-type epitaxial layer on the surface of the semiconductor substrate 1, the N-type injection region is formed in outside the p-type
Prolong in layer.
In Fig. 4, it is also formed with interlayer film 5 on the surface of the semiconductor substrate 1, interlayer film 5 generally includes multilayer, each
The surface of layer interlayer film 5 is formed with front metal layer, passes through between the corresponding doped region of the front metal layer of the bottom and bottom
Contact hole connects, and is connected between each front metal layer by through-hole, contact hole and through-hole all pass through corresponding interlayer film.
The surface of interlayer film 5 is also formed with chromatic filter 6, chromatic filter 6 generally include red, green and blue this
The optical filter of three colors.
Lenticule 7 is formed at the top of chromatic filter 6.
Each pixel unit of cmos image sensor of the embodiment of the present invention is isolated by deep trench isolation structure, due to zanjon
2 depth of groove of recess isolating structure than usual 2 isolation structure of shallow trench (STI) depth, therefore can realize well pixel unit it
Between signal cross-talk；Meanwhile dangling bonds brought by etching of the embodiment of the present invention also to the groove 2 of deep trench isolation structure
Defect has carried out corresponding structure design, is usually mainly oxygen by single dielectric layer by the filled layer being filled in groove 2
Change layer is changed into be made of ONO layer 3 plus conductive material layer 8, and conductive material layer 8 can pass through the first electrode V1 making alive at top,
After positive voltage is added on first electrode V1, groove 2 can be etched to electron injection caused by the dangling bonds formed to ONO layer 3
The second nitration case 3b trap in, the electronics as caused by dangling bonds is stored in the trap of the second nitration case 3b, therefore
Be avoided that electron injection caused by dangling bonds into the pixel unit of deep trench isolation structure two sides, thus be also avoided that due to
The dark current that electron injection caused by dangling bonds is generated into pixel unit.
The manufacturing method of cmos image sensor of the embodiment of the present invention includes the following steps:
Step 1: providing semi-conductive substrate 1, ditch is formed in the semiconductor substrate 1 using photoetching plus etching technics
Slot 2, etching technics can form dangling bonds in the inner surface and bottom surface of the groove 2；The groove 2 is defined on CMOS figure
As sensor each pixel unit between.
The semiconductor substrate 1 is silicon substrate.
Step 2: the inner surface and bottom surface in the groove 2 form ONO layer 3, the ONO layer 3 includes successively
The first oxide layer 3a, the second nitration case 3b and the third oxide layer 3c of superposition.
The first oxide layer 3a, the second nitration case 3b and the third oxide layer 3c are sequentially formed, after formation
The first oxide layer 3a, the second nitration case 3b and the third oxide layer 3c can also extend to 2 outside of groove
Surface, extended meeting is by returning carving technology or chemical mechanical milling tech after extending to the ONO layer 3 of 2 outer surface of groove
Removal.
The material of the first oxide layer 3a and the third oxide layer 3c are all silica, the second nitration case 3b's
Material is silicon nitride.
The groove 2 is filled up completely Step 3: forming conductive material layer 8；By the groove 2, the ONO layer 3 and institute
It states conductive material layer 8 and forms deep trench isolation structure together, dropped by increasing by 2 depth of groove of the deep trench isolation structure
Signal cross-talk between low each pixel unit.
The material of the conductive material layer 8 is polysilicon.Also can in other embodiments are as follows: the conductive material layer 8
Material is tungsten.
The conductive material layer 8 can also extend to the outer surface of the groove 2, extend to 2 outer surface of groove
The conductive material layer 8 after extended meeting pass through return carving technology or chemical mechanical milling tech removal.In general, in the conductive material
After layer 8 is formed, by chemical mechanical milling tech by the conductive material layer 8 and the ONO layer 3 outside the groove 2
Successively remove, and by 2 region of groove the conductive material layer 8 and the ONO layer 3 is grinding and the groove 2
Surface it is equal.
Step 4: form interlayer film, contact hole and front metal layer, the contact hole passes through the interlayer film, it is described just
It is formed with first electrode V1 after the metallic layer graphic of face, the first electrode V1 passes through the corresponding contact hole in bottom and described
Conductive material layer 8 connects；By adding positive voltage in the first electrode V1, the electron injection that the dangling bonds are generated is described in
In the trap of second nitration case 3b, to eliminate the dark current as caused by the dangling bonds.
The front metal layer is also formed with second electrode V2 after graphical, and the second electrode V2 is corresponding by bottom
Contact hole be connected to the surface of the second nitration case 3b, by being injected into institute in the second electrode V2 making alive to remove
State the electronics in the trap of the second nitration case 3b.
In present invention method, it is formed in the semiconductor substrate 1 of deep trench isolation structure two sides
The pixel cell structure includes light sensitive diode 4.
The semiconductor substrate 1 is p-type doping, after step 3 completion and before step 4 forms the interlayer film
It further comprises the steps of:
N-type injection region, the semiconductor substrate 1 of N-type injection region bottom are formed on 1 surface of semiconductor substrate
Between formed PN junction diode composition；The N-type injection region stores light induced electron after the light sensitive diode 4 is photosensitive.
The present invention has been described in detail through specific embodiments, but these are not constituted to limit of the invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these are also answered
It is considered as protection scope of the present invention.
Claims (17)
1. a kind of cmos image sensor, which is characterized in that isolation has zanjon between each pixel unit of cmos image sensor
Recess isolating structure reduces the signal between each pixel unit by increasing the trench depth of the deep trench isolation structure
Crosstalk；
The deep trench isolation structure include: the groove, the side for being formed in the groove and bottom surface ONO layer and
The fully filled conductive material layer of the ONO layer will be formed with；
The groove is formed in semiconductor substrate, is formed in the semiconductor substrate of deep trench isolation structure two sides
There is the corresponding pixel cell structure；
The ONO layer includes the first oxide layer being sequentially overlapped, the second nitration case and third oxide layer；
The conductive material layer is connected to first electrode；
The groove adds etching technics to be formed by photoetching, is formed with what etching generated in the side of the groove and bottom surface
Dangling bonds；
By adding positive voltage in the first electrode, the electron injection that the dangling bonds are generated to second nitration case is fallen into
In trap, to eliminate the dark current as caused by the dangling bonds.
2. cmos image sensor as described in claim 1, it is characterised in that: the semiconductor substrate is silicon substrate.
3. cmos image sensor as claimed in claim 2, it is characterised in that: first oxide layer and third oxidation
The material of layer is all silica, and the material of second nitration case is silicon nitride.
4. cmos image sensor as claimed in claim 1 or 2, it is characterised in that: the material of the conductive material layer is more
Crystal silicon or tungsten.
5. the cmos image sensor as described in claims 1 or 2 or 3, it is characterised in that: on the surface of second nitration case
It is formed with second electrode, by removing the electricity being injected into the trap of second nitration case in the second electrode making alive
Son.
6. cmos image sensor as claimed in claim 1 or 2, it is characterised in that: be formed in the deep trench isolation structure
The pixel cell structure in the semiconductor substrate of two sides includes light sensitive diode.
7. cmos image sensor as claimed in claim 6, it is characterised in that: the semiconductor substrate is p-type doping, described
Light sensitive diode includes the N-type injection region for being formed in the semiconductor substrate surface, described partly the leading of N-type injection region bottom
The PN junction diode composition formed between body substrate；N-type injection region storage photoproduction electricity after the light sensitive diode is photosensitive
Son.
8. cmos image sensor as claimed in claim 7, it is characterised in that: also formed on the surface of the semiconductor substrate
There is p-type epitaxial layer, the N-type injection region is formed in the p-type epitaxial layer.
9. a kind of manufacturing method of cmos image sensor, which comprises the steps of:
Step 1: providing semi-conductive substrate, groove is formed using photoetching plus etching technics in the semiconductor substrate, etched
Technique can form dangling bonds in the inner surface and bottom surface of the groove；The groove is defined on cmos image sensor
Between each pixel unit；
Step 2: the inner surface and bottom surface in the groove form ONO layer, the ONO layer includes being sequentially overlapped
First oxide layer, the second nitration case and third oxide layer；
The groove is filled up completely Step 3: forming conductive material layer；By the groove, the ONO layer and the conduction material
The bed of material forms deep trench isolation structure together, reduces each picture by increasing the trench depth of the deep trench isolation structure
Signal cross-talk between plain unit；
Step 4: forming interlayer film, contact hole and front metal layer, the contact hole passes through the interlayer film, the front gold
It is formed with first electrode after belonging to layer pattern, the first electrode passes through the corresponding contact hole in bottom and the conductive material
Layer connection；By adding positive voltage in the first electrode, the electron injection that the dangling bonds are generated to second nitration case
Trap in, thus eliminate the dark current as caused by the dangling bonds.
10. the manufacturing method of the manufacturing method of cmos image sensor as claimed in claim 9, it is characterised in that: step 2
In, first oxide layer, second nitration case and the third oxide layer sequentially form, first oxidation after formation
Layer, second nitration case and the third oxide layer can also extend to the surface outside the groove, extend to the groove
Extended meeting is removed by returning carving technology or chemical mechanical milling tech after the ONO layer of outer surface.
11. the manufacturing method of cmos image sensor as claimed in claim 9, it is characterised in that: the semiconductor substrate is
Silicon substrate.
12. the manufacturing method of cmos image sensor as claimed in claim 11, it is characterised in that: first oxide layer and
The material of the third oxide layer is all silica, and the material of second nitration case is silicon nitride.
13. the manufacturing method of the cmos image sensor as described in claim 9 or 11, it is characterised in that: the conductive material
The material of layer is polysilicon or tungsten.
14. the manufacturing method of cmos image sensor as claimed in claim 13, it is characterised in that: conduction described in step 3
Material layer can also extend to the outer surface of the groove, and the conductive material layer for extending to the groove outer surface is subsequent
It can be removed by returning carving technology or chemical mechanical milling tech.
15. the manufacturing method of the cmos image sensor as described in claim 9 or 11 or 13, it is characterised in that: the front
Metal layer is also formed with second electrode after graphical, and the second electrode is connected to described the by the corresponding contact hole in bottom
The surface of nitride layer, by removing the electricity being injected into the trap of second nitration case in the second electrode making alive
Son.
16. the manufacturing method of the cmos image sensor as described in claim 9 or 11, it is characterised in that: be formed in the depth
The pixel cell structure in the semiconductor substrate of groove isolation construction two sides includes light sensitive diode.
17. the manufacturing method of cmos image sensor as claimed in claim 16, it is characterised in that: the semiconductor substrate is
P-type doping, step 3 completion after and step 4 form the interlayer film before further comprise the steps of:
N-type injection region, shape between the semiconductor substrate of N-type injection region bottom are formed in the semiconductor substrate surface
At PN junction diode composition；The N-type injection region stores light induced electron after the light sensitive diode is photosensitive.
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