CN109495103B - Integrated Circuit (IC) integrating direct current isolation and application thereof - Google Patents

Integrated Circuit (IC) integrating direct current isolation and application thereof Download PDF

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CN109495103B
CN109495103B CN201711239594.1A CN201711239594A CN109495103B CN 109495103 B CN109495103 B CN 109495103B CN 201711239594 A CN201711239594 A CN 201711239594A CN 109495103 B CN109495103 B CN 109495103B
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input
integrated
direct current
active device
impedance
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CN109495103A (en
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维卡斯·马南
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Chengdu Ying Scarlett Semiconductor Technology Co Ltd
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Chengdu Ying Scarlett Semiconductor Technology Co Ltd
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/017545—Coupling arrangements; Impedance matching circuits
    • H03K19/017554—Coupling arrangements; Impedance matching circuits using a combination of bipolar and field effect transistors [BIFET]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175—Coupling arrangements; Interface arrangements
    • H03K19/0185—Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018557—Coupling arrangements; Impedance matching circuits

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  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)

Abstract

The invention discloses an Integrated Circuit (IC) integrated with direct current isolation and application thereof, which can integrate a small capacitor into an input end inside a broadband IC for optical communication and simplify impedance matching. The input end inside the IC is integrated with input impedance, an integrated direct current isolation capacitor, an active device and a bias resistor; one end of the input impedance is grounded, and the other end of the input impedance is connected with the direct current input outside the IC and the front end of the integrated direct current isolation capacitor; the rear end of the integrated direct current isolation capacitor is connected with the grid electrode of the active device; one end of the bias resistor is grounded, and the other end of the bias resistor is connected between the rear end of the integrated direct current isolation capacitor and the active device; the active device is connected as a first stage input of the IC to other parts of the circuit than the input terminals inside the IC.

Description

Integrated Circuit (IC) integrating direct current isolation and application thereof
Technical Field
The invention relates to the technical field of broadband radio frequency integrated circuits, in particular to an IC integrated with direct current isolation and application thereof.
Background
The dc voltage generated at the output of one integrated circuit IC typically does not match the dc level of the input of another IC and requires the use of wideband dc isolation when ICs are cascaded. There is an independent dc voltage between two ICs connected together (see IC1 and IC2 in fig. 1). The decoupling of the dc voltages of the two ICs is usually achieved by using broadband capacitances (typical values of these capacitances range from 10nF to 1uF depending on the application). The higher the capacitance value, the lower the cut-off frequency due to the capacitance. These capacitances add to the size and cost of such an implementation. And they also increase the losses (insertion loss and reflection loss) of the interconnect between the two ICs.
Many applications in optical systems use differential inputs and have 4 or more lanes (e.g., 100Gb/s is acquired over 4 25Gb/s lanes). This means that 8 (as opposed to 4 differential lanes) or more dc blocking capacitors need to be used on the circuit board to connect the ICs together, which increases the cost and takes up space on the circuit board. This problem is further amplified at operating frequencies up to the GHz level, as the insertion loss of the capacitor becomes significant at these frequencies.
In most broadband applications today, especially optical communication related applications, where impedance matching (typically 50 ohms single ended, or 100 ohms differential) is required to reduce reflection losses, a broadband capacitance of 10nF or greater is used to cover the operating frequency range. Typically, the lower cut-off frequency of the operating frequency is required to be in the kHz order and the upper cut-off frequency may be up to 50GHz depending on the application. The size of the wideband capacitor for dc isolation is about 1 x 0.5mm or more, depending on the capacitance value. These capacitors are typically provided on a printed circuit board PCB to connect two ICs and increase the size and cost of such an implementation.
As the physical size and shape of product packages in the optical communications market continue to shrink (e.g., packages for 100Gbs applications are being changed from CFP to QSFP28), there is a greater demand for shrinking the size of the ICs and the size of the components required to interconnect the ICs together. However, the above-described connection method in the related art cannot satisfy such a requirement.
Disclosure of Invention
It is an object of the present invention to overcome at least the above problems of the prior art by providing an IC integrated with dc isolation and its application, which can integrate a small capacitance into the input terminals inside a broadband IC for optical communication and simplify impedance matching, these ICs typically operating in the KHz to GHz range. A circuit for implementing the present invention includes the following aspects.
An integrated circuit IC integrated with DC isolation has an input end integrated with input impedance, integrated DC isolation capacitor, active device, and bias resistor;
one end of the input impedance is grounded, and the other end of the input impedance is connected with the direct current input outside the IC and the front end of the integrated direct current isolation capacitor; the rear end of the integrated direct current isolation capacitor is connected with the grid electrode of the active device; one end of the bias resistor is grounded, and the other end of the bias resistor is connected between the rear end of the integrated direct current isolation capacitor and the active device; the active device is connected as a first stage input of the IC to other parts of the circuit than the input terminals inside the IC.
Preferably, the dc value of the input impedance is set by a dc input external to the IC, and the input impedance does not provide a dc bias to the IC, nor is it tied to any dc voltage.
Preferably, the bias resistor has a value of the order of kilo-ohms to mega-ohms.
Preferably, the value of the integrated direct-current isolation capacitor is in the picofarad level.
Preferably, the active device is a field effect transistor.
Preferably, the IC operates in the KHz to GHz range.
A modulation driver chip of 100G, 200G or 400G comprises the IC.
An optical communication module in the form of a CFP, CFP2, CFP4, QSFP28, QSFPDD, or OSFP package comprises the above-described modulation driver chip.
A100 Gbs clock data recovery chip comprises the IC.
An optical communication module in the form of a CFP, CFP2, CFP4, or QSFP28 package includes the above clock data recovery chip.
In summary, due to the adoption of the technical scheme, the invention at least has the following beneficial effects:
the invention sets the dc bias by integrating a small capacitance of the picofarad scale, which can be easily integrated into the IC, into the input of a wideband IC, and using a very high impedance resistor. The designed wideband IC can be applied in wideband applications such as optical communications where the operating bandwidth is from kHz to tens of GHz while maintaining the desired impedance matching in the kHz to GHz range. The present invention eliminates the need for an external broadband capacitor disposed on the PCB and integrates the dc isolation function into the IC. And it decouples the impedance matching by a fraction of the actual dc bias generated in the IC. The present invention allows the impedance between ICs to be any desired value (typically used as differential 100 ohms or single-ended 50 ohms) and makes impedance matching relatively simple because the broadband matching resistance is not tied into the bias generation or dc circuit of the IC.
Drawings
Fig. 1A and 1B are schematic diagrams of single-ended and differential interfaces between two wideband ICs, respectively, as is typical in the prior art.
Fig. 2A and 2B are schematic diagrams illustrating details of single-ended and differential inputs, respectively, of IC2 of fig. 1.
Fig. 3A and 3B are schematic diagrams of an IC incorporating dc isolation for single-ended and differential connections, respectively, according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and embodiments, so that the objects, technical solutions and advantages of the present invention will be more clearly understood. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Fig. 1 shows a typical interface between two broadband ICs that maintains impedance matching and allows the ICs to have different DC levels (shown as DC1 and DC 2). R22Representing the broadband impedance, R, at the output of IC111Is the broadband impedance of the input of IC 2. Z1Is the impedance of the transmission line connecting the two ICs. To minimize reflection, R11、Z1And R22Should be matched as closely as possible. CblockIs the dc isolation capacitance between the two ICs. CblockThe value of (c) determines the lower cut-off frequency. In 100Gbs optical applications, the desired cutoff frequency is typically 100-blockThe value of (a) is 10nF or more.
The main reason that the dc isolation capacitance connecting the two ICs in the prior art is not integrated inside the IC is that a large value of capacitance (>10nF) is required, and it is not practical to integrate such a large capacitance inside the IC. An IC according to an embodiment of the present invention integrates wideband impedance matching at the input in the IC and wideband dc isolation is implemented within the IC.
Where broadband impedance matching refers to matching the input (differential or single ended) of one IC to the output of a previous IC.
At millimeter wave frequencies, such impedance is typically 100 ohms differential or 50 ohms single ended, but the impedance may be any value required and the invention allows this value to be chosen very easily. This parameter is typically measured using an S-parameter (scattering parameter). Impedance matching is required to avoid reflection losses and performance degradation caused by connecting two ICs.
In most broadband ICs in use today, the input impedance is a fraction of the dc at the input or a bias generation circuit. This generally makes wideband matching more difficult, as shown in fig. 2, because the bias generation circuit increases parasitic impedance, especially at high frequencies. Fig. 2 shows the input of IC2 of fig. 1 in more detail. By increasing the DC bias generated for input active devices (e.g. field effect transistors)11Is often complicated. The BIAS generation circuit BIAS increases the parasitic capacitance or inductance of the input terminal and reduces the impedance matching (S)11Or Sd11)。
Fig. 3 shows an input section circuit schematic of an IC2 incorporating dc isolation in accordance with an embodiment of the present invention.
In the single-ended example of FIG. 3A and the differential example of FIG. 3B, input impedance R is integrated at the input side of IC211Integrated DC isolation capacitor CintegratedActive device (e.g., field effect transistor T1), and bias resistor RDC(ii) a Wherein the input impedance R11Is grounded, and the other end is connected with a DC input DC1 outside the IC2 and an integrated DC isolation capacitor CintegratedIs connected with the front end of the front end; capacitor CintegratedIs connected to the gate of transistor T1; bias resistor RDCOne end of the capacitor is grounded, and the other end of the capacitor is connected to an integrated direct current isolation capacitor CintegratedAnd the gate of transistor T1; the other terminal of the transistor T1 is connected to other functional circuits of the IC 2.
Due to the input impedance R11Does not provide any DC bias to IC2 and is not tied to any DC voltage, R11Will be determined by the DC output DC1 of IC 1. Integrated DC isolation capacitor CintegratedIntegrated in IC2 and this capacitor CintegratedIs dependent on the input impedance Z provided by the transistor T1in. Z at low frequency operationinThe higher, CintegratedThe lower the value of (c) can be.
The key to integrating this capacitor is to integrate ZinRemain as a high impedance node and pass through very high impedance nodesLarge (kilo-ohm to mega-ohm level) bias resistor RDCTo provide the bias. If R is11Without the decoupling combination (typically on the order of 50 ohms) producing a partial dc bias, the lower cutoff frequency will be very high because RDCWill be close to 50 ohms. Because the invention sets the DC isolation capacitor as the input impedance R11Then R is realized11Decoupled from the direct current in IC2, and therefore can pass through a large bias resistor RDCAnd active devices to provide a large input impedance ZinThereby reducing the value of the dc isolation capacitance (e.g. pico farad level) so that the dc isolation capacitance can be easily integrated in the IC without the need to additionally increase the bulk of the IC.
As shown in fig. 3, the present invention integrates dc isolation capacitors within IC2, enabling wideband dc isolation to be implemented within the IC. The key challenge is to maintain the performance of the IC, i.e., to maintain impedance matching and frequency gain response (usually measured using S-parameters), because the dc blocking capacitance affects both the upper and lower cutoff frequencies of the device frequency response.
Capacitor C shown in FIG. 1blockThe impedance on either side is typically 50 ohms (being a very low impedance), and the capacitance needs to have a very low impedance at the lowest desired frequency (impedance 1/(2 pi f)lC)), wherein C is a capacitance value, f)lThe lowest frequency at which the impedance is measured. The lower operating frequency for 100Gbs optical communication circuits is typically about 100kHz, and the capacitance values used are typically 10nF to 100 nF. It is not practical and cost effective to implement such large capacitances in an IC. The present invention solves this problem by decoupling impedance matching and generating a dc offset in the circuit. As shown in fig. 3, impedance matching is provided at the input of the circuitry internal to IC2, and no dc voltage is applied to the input of the circuitry. DC isolation capacitor C with small valueintegratedArranged at an impedance R matched to an external input of IC211And then. Capacitor CintegratedIt needs to be made small enough not to increase the cost of the IC from a size point of view. This means that the capacitance value needs to be on the pF level in order to be implemented in an IC without adding extra area. Electricity providedThe value of the capacitance depends on the input impedance (shown as Z in FIG. 3) provided by the first stage input of the IC (shown in FIG. 3 as the input with T1 as the first stage input of IC2)in). The higher the impedance input, C, at the lowest desired operating frequencyintegratedThe lower the value of (c). The highest input impedance can be provided by a Field Effect Transistor (FET) device because its input typically has little or no dc current. Any device capable of providing high impedance may be used and the invention is not limited to the use of FETs only.
To maintain a high input impedance, the biasing of this input transistor can be achieved by using a very large bias resistor RDC(k ohm to M ohm range). The lower the value of the resistor, the lower the lowest cut-off frequency, since the impedance of the transistor is parallel to Zin(input impedance of the transistor).
The IC integrated with dc isolation according to the embodiment of the present invention may be applied to a modulation driver chip of 100G, 200G, or 400G, and an optical communication module in the form of a CFP, CFP2, CFP4, QSFP28, QSFPDD, or OSFP package, by packaging in the form of a small outline package SOP, a pin grid array package PGA, a ball grid array package BGA, a dual in-line package DIP, or the like. The modulation driving chip comprises modulation driving chips such as direct modulation driving, electro-absorption modulation driving, Mach-Zehnder modulation (Mach-Zehnder Modulator) driving and the like.
The IC integrated with dc isolation according to the embodiment of the present invention may also be applied to a clock data recovery chip at 100Gbs and used in an optical communication module in the form of a CFP, CFP2, CFP4, or QSFP28 package.
The foregoing is merely a detailed description of specific embodiments of the invention and is not intended to limit the invention. Various alterations, modifications and improvements will occur to those skilled in the art without departing from the spirit and scope of the invention.

Claims (6)

1. An Integrated Circuit (IC) integrated with direct current isolation is characterized in that an input end inside the IC is integrated with an input impedance, an integrated direct current isolation capacitor, an active device and a bias resistor;
wherein the active device is a high impedance active device; one end of the input impedance is grounded, and the other end of the input impedance is connected with the direct current input outside the IC and the front end of the integrated direct current isolation capacitor; the rear end of the integrated direct current isolation capacitor is connected with the grid electrode of the active device; one end of the bias resistor is grounded, and the other end of the bias resistor is connected between the rear end of the integrated direct current isolation capacitor and the active device; the active device is used as a first-stage input of the IC and is connected with other parts of the circuit except the input end inside the IC;
the active device comprises a field effect transistor; the value of the bias resistor is in a kiloohm to megohm level; the value of the integrated direct-current isolation capacitor is in a picofarad level;
the dc value of the input impedance is set by a dc input external to the IC, and the input impedance does not provide a dc bias to the IC, nor is it tied to any dc voltage.
2. The IC of claim 1, wherein the IC operates in the KHz to GHz range.
3. A 100G, 200G, or 400G modulation driver chip comprising the IC of any of claims 1-2.
4. An optical communications module in the form of a CFP, CFP2, CFP4, QSFP28, QSFPDD, or OSFP package comprising the modulation driver chip of claim 3.
5. A 100Gbs clock data recovery chip comprising the IC according to any one of claims 1 to 2.
6. An optical communication module in the form of a CFP, CFP2, CFP4, or QSFP28 package, comprising the clock data recovery chip of claim 5.
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CN111181547A (en) * 2020-02-28 2020-05-19 思瑞浦微电子科技（苏州）股份有限公司 Chip and capacitive isolation circuit
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