CN109462396A - A kind of clock circuit for spaceborne measuring and controlling equipment - Google Patents
A kind of clock circuit for spaceborne measuring and controlling equipment Download PDFInfo
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- CN109462396A CN109462396A CN201811578571.8A CN201811578571A CN109462396A CN 109462396 A CN109462396 A CN 109462396A CN 201811578571 A CN201811578571 A CN 201811578571A CN 109462396 A CN109462396 A CN 109462396A
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
- H03L1/02—Stabilisation of generator output against variations of physical values, e.g. power supply against variations of temperature only
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H11/00—Networks using active elements
- H03H11/02—Multiple-port networks
- H03H11/04—Frequency selective two-port networks
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
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Abstract
The invention discloses the clock circuits for spaceborne measuring and controlling equipment.The clock circuit includes crystal oscillation signal source, with reference to source amplifier and clock generator, the oscillator signal that crystal oscillation signal source generates single-frequency is input to be amplified with reference to source amplifier, then it is input to again in clock generator and generates three tunnel clock signals of output, wherein first via clock signal input is to data feedback channel local oscillation circuit, second tunnel clock signal input is to down going channel local oscillation circuit, third road clock signal input to digital baseband circuit.The clock circuit is using same crystal oscillator reference source and carries out integral multiple frequency conversion, ensure that the uniformity and stability of signal source.And the chip volume that the clock circuit is chosen is small, low in energy consumption, and printed circuit board includes the cavity of three connection, and chip lays compact, saving space, with miniaturization and the good advantage of electromagnetic compatibility wherein.
Description
Technical field
The present invention relates to Satellite TT field more particularly to a kind of clock circuits for spaceborne measuring and controlling equipment.
Background technique
Spaceborne measuring and controlling equipment refers to the equipment for being loaded in and the functions such as being used for completing star observing and controlling, ranging on satellite, test the speed, right
It plays an important role in the in-orbit flight of satellite.In equipment usually by antenna, channel circuit, baseband circuit, clock circuit, computer,
The composition such as power supply.
Due to being influenced by factors such as satellite load weight, space, energy consumptions, it is desirable to the volume of spaceborne measuring and controlling equipment, weight, function
The indexs such as consumption will meet the design requirement of miniaturization, lightness and low-power consumption, and stable and reliable in work.For clock circuit
Speech, it is also necessary to meet homologous, versatility design requirement.
Summary of the invention
The invention mainly solves the technical problem of providing a kind of clock circuits for spaceborne measuring and controlling equipment, solve satellite
The problems such as communicating clock circuit miniaturization in the prior art, low-power consumption, homologous and versatility.
In order to solve the above technical problems, one technical scheme adopted by the invention is that providing a kind of for spaceborne measuring and controlling equipment
Clock circuit, including crystal oscillation signal source, with reference to source amplifier and clock generator, the crystal oscillation signal source generates single-frequency
Oscillator signal be input to it is described amplify with reference to source amplifier, be then input to again in the clock generator and generate output
Three tunnel clock signals, wherein first via clock signal input to data feedback channel local oscillation circuit, the second tunnel clock signal input arrive down
Row of channels local oscillation circuit, third road clock signal input to digital baseband circuit.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, the crystal oscillation signal source includes temperature compensation
Crystal oscillator E6472LF generates the oscillator signal of output 10MHz, and the reference source amplifier includes chip TLV3501AIDBVT, institute
The output end for stating temperature compensating crystal oscillator E6472LF is connected to the input terminal of the chip TLV3501AIDBVT by capacitive coupling.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, the clock generator chip
The end CLK0 of Si5351C-B-GM, the chip Si5351C-B-GM export third road clock signal, the chip
The end CLK2 of Si5351C-B-GM is linked into splitter chip SBTCJ-1W+ by coupled capacitor, the chip SBTCJ-1W+'s
Two output ends PORT1 and PORT2 are separately connected the first clock signal filter network and second clock signal filter network respectively.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, first clock signal filters net
Network is filtered to obtain first clock signal to the clock signal of the output end PORT1 output of the chip SBTCJ-1W+,
The second clock signal filter network filters the clock signal of the output end PORT2 output of the chip SBTCJ-1W+
Wave obtains the second clock signal.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, the data feedback channel local oscillation circuit packet
Include chip SI4136, the first via clock signal input to the end XIN of the chip SI4136, the chip SI4136's
The end RFOUT exports RF local oscillator signal, and the end IFOUT of the chip SI4136 exports intermediate frequency local oscillator signal.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, the down going channel local oscillation circuit packet
Include chip SI4133, second tunnel clock signal input to the end XIN of the chip SI4133, the chip SI4133's
The end RFOUT exports the first local oscillation signal, and the end IFOUT of the chip SI4133 exports the second local oscillation signal.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, third road clock signal is frequency
The square-wave signal of rate 80MHz, first clock signal and the second clock signal are the sine wave signal of frequency 4F0, institute
The RF local oscillator signal frequency for stating the generation of data feedback channel local oscillation circuit is 133F0, and intermediate frequency local oscillator signal frequency is 87F0, under described
The first local oscillator signal frequency that row of channels local oscillation circuit generates is 13F0 and the second local oscillation signal frequency is 225F0, and F0 is fundamental frequency.
In clock circuit another embodiment of the present invention for spaceborne measuring and controlling equipment, the temperature compensating crystal oscillator E6472LF, core
Piece TLV3501AIDBVT, chip Si5351C-B-GM and SBTCJ-1W+ are arranged in clock circuit cavity, the chip
SI4136 is arranged in data feedback channel circuit cavity, and the chip SI4133 is arranged in down going channel circuit cavity, when described
Clock circuit cavity, data feedback channel circuit cavity and down going channel circuit cavity connection.
The beneficial effects of the present invention are: the invention discloses the clock circuits for spaceborne measuring and controlling equipment.The clock circuit
Including crystal oscillation signal source, with reference to source amplifier and clock generator, the oscillator signal input of crystal oscillation signal source generation single-frequency
It is amplified to reference source amplifier, is then input to again in clock generator and generates three tunnel clock signals of output, wherein first
Road clock signal input is to data feedback channel local oscillation circuit, the second tunnel clock signal input to down going channel local oscillation circuit, third road
Clock signal input is to digital baseband circuit.The clock circuit is using same crystal oscillator reference source and carries out integral multiple frequency conversion, protects
The uniformity and stability of signal source are demonstrate,proved.And the chip volume that the clock circuit is chosen is small, low in energy consumption, printed circuit board packet
The cavity of three connection is included, chip lays compact, saving space, with miniaturization and the good advantage of electromagnetic compatibility wherein.
Detailed description of the invention
Fig. 1 is the composition block diagram for being used for one embodiment of clock circuit of spaceborne measuring and controlling equipment according to the present invention；
Fig. 2 is crystal oscillation signal source and the reference source for one embodiment of clock circuit for being used for spaceborne measuring and controlling equipment according to the present invention
The circuit diagram of amplifier；
Fig. 3 is the circuit for being used for the clock generator of one embodiment of clock circuit of spaceborne measuring and controlling equipment according to the present invention
Figure；
Fig. 4 is the down going channel local oscillation circuit for being used for one embodiment of clock circuit of spaceborne measuring and controlling equipment according to the present invention
Figure；
Fig. 5 is the data feedback channel local oscillation circuit for being used for one embodiment of clock circuit of spaceborne measuring and controlling equipment according to the present invention
Figure；
Fig. 6 is that the frequency multiple according to the present invention for each signal of one embodiment of clock circuit of spaceborne measuring and controlling equipment closes
It is distribution map；
Fig. 7 is the printed circuit board artwork for being used for one embodiment of clock circuit of spaceborne measuring and controlling equipment according to the present invention.
Specific embodiment
To facilitate the understanding of the present invention, in the following with reference to the drawings and specific embodiments, the present invention will be described in more detail.
A better embodiment of the invention is given in the attached drawing.But the invention can be realized in many different forms, and unlimited
In this specification described embodiment.On the contrary, purpose of providing these embodiments is makes to the disclosure
Understand more thorough and comprehensive.
It should be noted that unless otherwise defined, all technical and scientific terms used in this specification with belong to
The normally understood meaning of those skilled in the art of the invention is identical.Used term in the description of the invention
It is the purpose in order to describe specific embodiment, is not intended to the limitation present invention.Term "and/or" packet used in this specification
Include any and all combinations of one or more related listed items.
Fig. 1 shows flow chart of the present invention for one embodiment of clock circuit of spaceborne measuring and controlling equipment.In Fig. 1, packet
Include: crystal oscillation signal source 10, with reference to source amplifier 11 and clock generator 12, the crystal oscillation signal source 10 generates the vibration of single-frequency
Swing signal be input to it is described amplify with reference to source amplifier 11, be then input to again in the clock generator 12 and generate output
Three tunnel clock signals, wherein first via clock signal input to data feedback channel local oscillation circuit 13, the second tunnel clock signal input arrive
Down going channel local oscillation circuit 14, third road clock signal input to digital baseband circuit 15.Here, data feedback channel local oscillation circuit 13
The multichannel local oscillation signal that frequency multiplication generation is used for upstream radio-frequency channel, down going channel local oscillator are carried out to the first via clock signal of input
Second tunnel clock signal of 14 pairs of circuit inputs carries out frequency multiplication and generates the multichannel local oscillation signal for being used for downlink radio frequency channel, third road
Clock signal is then input to signal source of clock of the digital baseband circuit as digital circuit.
This mode through this embodiment can provide system for the radio-frequency channel of entire measuring and controlling equipment and digital baseband part
The clock signal in one source is conducive to avoid the not homologous bring frequency departure of clock.
Preferably, crystal oscillation signal source 10 provides the oscillator signal that frequency is 10MHz, with reference to source amplifier to the 10MHz's
After oscillator signal amplifies, the third road clock signal generated by the clock generator 12 is that the square-wave signal of 80MHz is straight
It connects and is input to digital baseband circuit, and after the second tunnel clock signal and third road clock signal carry out shaping filter respectively, by side
Wave signal is converted to sine wave signal and is separately input to data feedback channel local oscillation circuit 13 and down going channel local oscillation circuit 14, corresponding
Frequency indicates with the integral multiple of fundamental frequency F0, such as 4F0.
Preferably, Fig. 2 shows crystal oscillation signal source and the circuit diagram embodiments with reference to source amplifier.It is to be believed by crystal oscillator first
Number source includes the oscillator signal that temperature compensating crystal oscillator E6472LF generates output 10MHz, which is 10MHz, and 3.3V is supplied
Electricity, temperature range are -40~+85 DEG C, and temperature stability is ± 0.3ppm, and volume is 7.0 × 5.0 × 2.2mm, and frequency accuracy is excellent
In ± 1 × 10-5.The end Vs of the crystal oscillator by power filter network insertion+3.3V, the power filter network include inductance L57,
L58 and capacitor C162, C163, wherein inductance L57, L58 are in parallel, one end of the two inductance access+3.3V, the other end
It is electrically connected with the end Vs of the crystal oscillator, one end of capacitor C162, C163 are electrically connected with the end Vs of the crystal oscillator, and capacitor C162,
The other end of C163 is grounded.Power filter net is conducive to filter out other of power supply bring power-supply fluctuation interference and crosstalk
Interference signal improves the Electro Magnetic Compatibility of channel circuit,
The output OUT terminal of crystal oscillator E6472LF is coupled to the input-IN of chip TLV3501AIDBVT by capacitor C161
End includes chip TLV3501AIDBVT with reference to source amplifier, the effect of the chip be exactly to the oscillator signal of crystal oscillator generation into
Row amplification.It is grounded after the also parallel resistance R82 of the end-IN of the chip, the end the V- ground connection of the chip, the end+IN series resistance R86 is followed by
Ground；The output end OUT series resistance R85 output frequency source signal end 10MHZ_TTL, V+ of the chip is connect with the one end inductance L59
Afterwards access 3.3V DC voltage, the end V+ of the chip respectively with one end of capacitor C165, C164 and company, capacitor C165, C164's
The other end is grounded.
Preferably, Fig. 3 shows the circuit diagram of clock generator embodiment.The clock generator includes chip Si5351C-
B-GM is input to the end CLKIN by the frequency source signal 10MHZ_TTL of the chip TLV3501AIDBVT output in Fig. 2, the chip
Output 8 tunnel clock signals output can be controlled simultaneously, and per the frequency of the clock signal of output all the way then by the end SCL and SDA
End receives frequency control word and carries out control generation, thus the end SCL and the end SDA for receiving externally input frequency control word and
Realization controls the frequency for clock signal of not going the same way.Preferably, tri- tunnel clock signal of circuit Zhong You export, mainly from
The end CLK0, the output of the end CLK2, the wherein end CLK0 electric connection resistance R95 and R30, and the output at the electrical connection of the two resistance
Third road clock signal REF_BB, which is square-wave signal, for supplying the derived reference signal of base-band digital circuit.The end CLK2
It then is linked into splitter chip SBTCJ-1W+ by coupled capacitor C173, two output ends PORT1 and PORT2 of the chip are then
It is separately connected the first clock signal filter network and second clock signal filter network.Wherein, the first clock signal filter network
It is electrically connected the one end capacitor C172 including capacitor C172, output end PORT1, the other end of capacitor C172 is electrically connected with inductance L23, electricity
Sense L23 is parallel with capacitor C3, is grounded after the series capacitance C5 of the one end capacitor C3, is grounded after the other end series capacitance C6 of capacitor C3.
Second clock signal filter network includes capacitor C174, and output end PORT2 is electrically connected the one end capacitor C174, and capacitor C174's is another
End is electrically connected with inductance L29, and inductance L29 is parallel with capacitor C7, is grounded after the series capacitance C8 of the one end capacitor C7, capacitor C7's is another
It is grounded after the series capacitance C9 of end.It can be seen that the two clock signal filter networks circuit composition having the same, effect is just
Be the square-like clock signal that exports two the output ends PORT1 and PORT2 of splitter chip SBTCJ-1W+ after filtering at
For sine wave clock signal REF_U (corresponding the second above-mentioned tunnel clock signal) and sine-wave clock signal REF_D, (correspondence is above-mentioned
First via clock signal), the two clock signals are separately input to data feedback channel local oscillation circuit and down going channel local oscillator electricity again
Road.
Preferably, Fig. 4 shows the circuit diagram of down going channel local oscillation circuit embodiment.The channel local oscillation circuit includes chip
SI4136.Locking phase loop local oscillation circuit is made of the chip, radio frequency reference frequency output is 2.3GHz-2.5GHz or 2.05GHz-
2.3GHz, intermediate frequency reference frequency output are 52.5MHz-1000MHz, and output power range is -7dBm-0dBm, and reference frequency is most
Height arrives 26MHz, operating voltage 2.7-3.6V, operating current 25mA.The first via clock signal REF_U of input is through overcoupling electricity
Hold the end XIN that C50 is input to the chip, the RF local oscillator signal ULO_RF which generates is defeated through resistance R21 by the end RFOUT
Out, the intermediate frequency local oscillator signal which generates is exported by the end IFOUT, and the intermediate frequency local oscillator signal is by capacitor C60 electrical connection filtering
Amplifying circuit, the filter amplification circuit mainly include filter chip LFCN-120+, the output end 3 of the chip and a decaying
It is electrically connected with circuit, which includes resistance R33, it is grounded after the one end resistance R33 connection resistance R44, resistance R33's
It is grounded after other end connection resistance R47, the other end of resistance R33 is electrically connected with capacitor C113, the other end access of capacitor C113
Intermediate frequency local oscillator signal is exported after the input terminal IN of amplifier chip ECG001F-G, the output end OUT connection capacitor C112 of the chip
ULO_IF.In addition, the output end OUT of chip ECG001F-G is also connected with inductance L35, the other end of inductance L35 connects capacitor C127
After be grounded, capacitor C127 is connected in parallel with a capacitor C126, and the one end capacitor C126 connects resistance R24, the other end ground connection of capacitor C126；
Other end connection+5V the voltage of resistance R24.
Alternatively, it is also possible to find out chip SI4136 the end SDATA and the end SCLK be for inputting frequency control word, can be with
The frequency exported respectively to the end RFOUT and the end IFOUT is configured.
Preferably, Fig. 5 shows the circuit diagram of data feedback channel local oscillation circuit embodiment.The channel local oscillation circuit includes chip
SI4133.Locking phase loop local oscillation circuit is made of the chip, radio frequency reference frequency output is 0.9GHz-1.8GHz or 0.75GHz-
1.5GHz, intermediate frequency reference frequency output are 62.5MHz-1000MHz, and output power range is -7dBm-0dBm, and reference frequency is most
Height arrives 26MHz, operating voltage 2.7-3.6V, operating current 18mA.Second tunnel clock signal REF_D of input is through overcoupling electricity
Hold the end XIN that C56 is input to the chip, the inductance that the RF local oscillator signal DLO_RF which generates is concatenated by the end RFOUT
L18 and capacitor C42 and export, the inductance L34 and capacitor C109 that the intermediate frequency local oscillator signal DLO_IF of generation is concatenated by the end IFOUT
And it exports.
Alternatively, it is also possible to find out chip SI4133 the end SDATA and the end SCLK be for inputting frequency control word, can be with
The frequency exported respectively to the end RFOUT and the end IFOUT is configured.
Preferably, Fig. 6 shows the frequency relation explanatory diagram that the clock circuit generates.It can be seen that by crystal oscillation signal source 10
The 10MHz oscillator signal exported generates the square-wave signal of 80MHz to digital baseband circuit, separately all the way after clock generator 12
It is exactly outside to generate the identical two-way clock signal of frequency, frequency 4F0 is exported respectively to data feedback channel local oscillation circuit 13 and downlink
Channel local oscillation circuit 14, the phase-locked loop therethrough of data feedback channel local oscillation circuit 13 generate RF local oscillator signal respectively again
133F0 and intermediate frequency local oscillator signal 87F0, the phase-locked loop therethrough of down going channel local oscillation circuit 14 generate first again respectively
Shake signal 13F0 and the second local oscillation signal 225F0.There it can be seen that the clock circuit is all based on the same crystal oscillation signal source
10 generate the local oscillation signal of different frequency by many times frequency multiplication, and these local oscillation signals are reference with the same fundamental frequency F0,
And the frequency generated is the integral multiple of the fundamental frequency.
Further, Fig. 7 shows layout stracture of the clock circuit in printed circuit board.The printed circuit board is divided into 3
A cavity, i.e. clock circuit cavity Q1, data feedback channel circuit cavity Q3, down going channel circuit cavity Q2, these three cavity connection.
U40 in clock circuit cavity Q1 corresponds to chip temperature compensating crystal oscillator E6472LF, and U39 corresponds to chip TLV3501AIDBVT, and U44 is corresponding
Chip Si5351C-B-GM, U45 correspond to chip SBTCJ-1W+, the U7 in down going channel circuit cavity Q2 corresponds to microarray biochip
U10 in SI4136, data feedback channel circuit cavity Q3 corresponds to chip SI4133, these chips also chip phase with Fig. 2 into Fig. 5
It is corresponding.
In addition, the chip in the clock circuit mainly uses 3.3V direct current supply, avoid needed for multiple feed
Multiple power supply chips, and also to power supply carry out power filter, be conducive to the electromagnetism for improving entire clock signal circuit
Compatibility and anti-interference ability.
It can be seen that the invention discloses the clock circuits for spaceborne measuring and controlling equipment.The clock circuit includes crystal oscillator letter
Number source, with reference to source amplifier and clock generator, the oscillator signal that crystal oscillation signal source generates single-frequency is input to reference source and puts
Big device amplifies, and is then input in clock generator again and generates three tunnel clock signals of output, wherein first via clock signal
It is input to data feedback channel local oscillation circuit, the second tunnel clock signal input to down going channel local oscillation circuit, third road clock signal is defeated
Enter to digital baseband circuit.The clock circuit is using same crystal oscillator reference source and carries out integral multiple frequency conversion, ensure that signal source
Uniformity and stability.And the chip volume that the clock circuit is chosen is small, low in energy consumption, and printed circuit board includes three connection
Cavity, chip lay wherein it is compact, save space, have miniaturization and the good advantage of electromagnetic compatibility.
The above description is only an embodiment of the present invention, is not intended to limit the scope of the invention, all to utilize this hair
Equivalent structure transformation made by bright specification and accompanying drawing content is applied directly or indirectly in other relevant technical fields,
Similarly it is included within the scope of the present invention.
Claims (8)
1. a kind of clock circuit for spaceborne measuring and controlling equipment, which is characterized in that including crystal oscillation signal source, with reference to source amplifier and
Clock generator, the oscillator signal that the crystal oscillation signal source generates single-frequency are input to the source amplifier that refers to and are put
Greatly, it is then input to again in the clock generator and generates three tunnel clock signals of output, wherein first via clock signal input arrives
Data feedback channel local oscillation circuit, the second tunnel clock signal input to down going channel local oscillation circuit, third road clock signal input to number
Word baseband circuit.
2. the clock circuit according to claim 1 for spaceborne measuring and controlling equipment, which is characterized in that the crystal oscillation signal source
The oscillator signal of output 10MHz is generated including temperature compensating crystal oscillator E6472LF, the reference source amplifier includes the chip
The output end of TLV3501AIDBVT, the temperature compensating crystal oscillator E6472LF are connected to the chip by capacitive coupling
The input terminal of TLV3501AIDBVT.
3. the clock circuit according to claim 2 for spaceborne measuring and controlling equipment, which is characterized in that the clock generator
The end CLK0 of chip Si5351C-B-GM, the chip Si5351C-B-GM export third road clock signal, the chip
The end CLK2 of Si5351C-B-GM is linked into splitter chip SBTCJ-1W+ by coupled capacitor, the chip SBTCJ-1W+'s
Two output ends PORT1 and PORT2 are separately connected the first clock signal filter network and second clock signal filter network.
4. the clock circuit according to claim 3 for spaceborne measuring and controlling equipment, which is characterized in that the first clock letter
Number filter network is filtered to obtain described first to the clock signal of the output end PORT1 output of the chip SBTCJ-1W+
Clock signal, the second clock signal filter network believe the clock of the output end PORT2 output of the chip SBTCJ-1W+
It number is filtered to obtain the second clock signal.
5. the clock circuit according to claim 4 for spaceborne measuring and controlling equipment, which is characterized in that the down going channel sheet
The circuit that shakes includes chip SI4136, the first via clock signal input to the end XIN of the chip SI4136, the chip
The end IFOUT of SI4136 exports the first local oscillation signal, and the end RFOUT of the chip SI4136 exports the second local oscillation signal.
6. the clock circuit according to claim 5 for spaceborne measuring and controlling equipment, which is characterized in that the data feedback channel sheet
The circuit that shakes includes chip SI4133, second tunnel clock signal input to the end XIN of the chip SI4133, the chip
The end RFOUT of SI4133 exports RF local oscillator signal, and the end IFOUT of the chip SI4133 exports intermediate frequency local oscillator signal.
7. the clock circuit according to claim 6 for spaceborne measuring and controlling equipment, which is characterized in that third road clock
Signal is the square-wave signal of frequency 80MHz, the sine wave that first clock signal and the second clock signal are frequency 4F0
Signal, the RF local oscillator signal frequency that the data feedback channel local oscillation circuit generates are 133F0, and intermediate frequency local oscillator signal frequency is
87F0, the first local oscillator signal frequency that the down going channel local oscillation circuit generates is 13F0 and the second local oscillation signal frequency is
225F0, F0 are fundamental frequency.
8. the clock circuit according to claim 6 for spaceborne measuring and controlling equipment, which is characterized in that the temperature compensating crystal oscillator
E6472LF, chip TLV3501AIDBVT, chip Si5351C-B-GM and SBTCJ-1W+ are arranged in clock circuit cavity, institute
Chip SI4136 is stated to be arranged in down going channel circuit cavity, the chip SI4133 is arranged in data feedback channel circuit cavity,
The clock circuit cavity, data feedback channel circuit cavity and down going channel circuit cavity connection.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201811578571.8A CN109462396A (en) | 2018-12-24 | 2018-12-24 | A kind of clock circuit for spaceborne measuring and controlling equipment |
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| CN201811578571.8A CN109462396A (en) | 2018-12-24 | 2018-12-24 | A kind of clock circuit for spaceborne measuring and controlling equipment |
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| 王培章，余同彬，晋军编著: "《微波射频技术电路设计与分析》", 国防工业出版社, pages: 235 - 240 * |
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