CN109427609A - System and method of the semiconductor wafer in X -ray inspection X - Google Patents
System and method of the semiconductor wafer in X -ray inspection X Download PDFInfo
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- CN109427609A CN109427609A CN201811000393.0A CN201811000393A CN109427609A CN 109427609 A CN109427609 A CN 109427609A CN 201811000393 A CN201811000393 A CN 201811000393A CN 109427609 A CN109427609 A CN 109427609A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
- H01L22/24—Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
A kind of system and method for semiconductor device in X -ray inspection X.In one embodiment, a kind of method includes: that chip is automatically transported to inspection point from the first treating stations；Camera scanning wafer surface is used in inspection point；Generate at least one image of wafer surface；At least one described image is analyzed, to detect the defect in wafer surface based on one group of predetermined criterion；If it is determined that chip is defective, then the chip is automatically transported to accumulator from inspection point；And if it is determined that chip zero defect, then be transported to second processing station automatically by the chip to be further processed according to semiconductor device manufacturing process.
Description
Technical field
The embodiment of this exposure relates to a kind of semiconductor wafer in the system and method for X -ray inspection X.
Background technique
In semiconductor integrated circuit (integrated circuit, IC) industry, it is continuously needed smaller plant bulk
And higher circuit package density.Such requirement drive semiconductor industry exploitation new material and complicated technology.Manufacture is in such
The IC of size and complexity generally using to advanced technology come at the various stages of manufacturing process examine IC to realize quality control
Purpose processed.
For example, when to be formed on chip feature (for example, the gate/drain of transistor/source electrode feature, level in
Line or vertical through hole etc.) when, chip is usually passed through the production line including multiple treating stations (processing station), institute
It states multiple treating stations and executes such as cleaning (cleaning), photoetching usually using different handling implements
(photolithography), dielectric deposition, dry-etching (dry etching)/wet etching (wet etching) and metal
The various operations such as deposition.Before the next step (for example, next treating stations) being transferred in production line, chip usually receives
Fault detection.
In general, such inspection be by people using optical tooling manually perform with determination may because of one of production line or
Multiple faulty treating stations and caused by defect presence.This failure such as parameter (for example, line width (line width)) failure,
(for example, individual through-holes) failure and area dependent failure (for example, " critical defect (killer defect) " particle) at random.When
When detecting defect due to such " manual " inspection, chip is moved generally before entering next treating stations from currently processed station
It removes, this commonly known as " examines (offline inspection) under line ".It is examined under such line and disadvantageously results in various problems.
For example, the compromise of m- resource causes to examine the compromise between resolution ratio and sampling rate when, such as high adopts
Sample rate (i.e. high inspection flux) is usually with low inspection resolution ratio, and vice versa.In addition, it is " manual " operation cause it is such
A possibility that examining under line usually interrupts automatic assembly line, this also will increase wafer contamination.It is usually needed in addition, being examined under line
Expensive checking equipment, special human resources and lab space.
Therefore, IC industry it is expected it is a kind of do not need additional lab space and can low cost automatically and effectively examine
Defect is tested to examine without significantly interrupting production line or influencing " on the line " of its output.Although such demand of long-term existence, so
And not yet find the suitable system for meeting these requirements.
Summary of the invention
A kind of method that one embodiment of the invention discloses semiconductor device on-line checking, which is characterized in that the method
It include: that the semiconductor wafer is transported to inspection point from the first treating stations；Camera scanning chip is used in the inspection point
Surface；Generate at least one image of the wafer surface；Analyze at least one described image, with based on one group of predetermined criterion come
Detect the defect in the wafer surface；If it is determined that the chip is defective, then the chip is transported from the inspection point
To accumulator；And if it is determined that the chip zero defect, then by the chip conveying to second processing station partly to be led according to described
Body device manufacturing process is further processed.
One embodiment of the invention discloses a kind of semiconductor wafer in the system of X -ray inspection X, which is characterized in that the system
Include: conveyer, is configured to the semiconductor wafer being transported to the inspection point from first treating stations；Camera, quilt
It is configured to scan the surface of the semiconductor wafer and generates at least one image on the surface；And at least one processing
Device is configured to receive at least one described image from the camera and analyzes at least one described image with predetermined based on one group
Criterion detects the defect on the surface, wherein the conveyer is further configured to: if it is determined that the chip zero defect, then
The chip is automatically transported to second processing station from the inspection point or if it is determined that the chip is defective, then by institute
It states chip and is automatically transported to accumulator from the inspection point.
One embodiment of the invention discloses a kind of semiconductor wafer in the system of X -ray inspection X, which is characterized in that the system
Include: the first treating stations, executes the first semiconductor fabrication process；Second processing station executes the second semiconductor fabrication process；It examines
It stands, is coupled between first treating stations and the second processing station, in first treating stations and the second processing
Semiconductor wafer is transported between standing, wherein the inspection point includes: conveyer, is configured to the semiconductor wafer automatically
The inspection point is transported to from first treating stations；Reflecting mirror, by the optics road between the camera and the wafer surface
Diameter changed course, wherein the reflecting mirror has surface waviness and surface curvature, wherein the surface waviness is equal to or less than 20 μ
M/20mm and the surface curvature are equal to or less than 0.1mm/100mm；Camera is configured to scan the table of the semiconductor wafer
Face and at least one image for generating the surface；And at least one processor, it is configured to from described in camera reception
At least one image simultaneously analyzes at least one described image to detect the defect on the surface based on one group of predetermined criterion,
Described in conveyer be further configured to: if it is determined that the chip zero defect, then by the chip automatically from the inspection point
It is transported to the second processing station or if it is determined that the chip is defective, then by the chip automatically from the inspection point
It is transported to accumulator.
Detailed description of the invention
Following detailed description is read in conjunction with the figure, the various aspects of present disclosure may be best understood.It should be noted that various
Feature is not necessarily drawn to scale.In fact, can arbitrarily increase or reduce the size and geometry of various features for the sake of showing clearly
Shape.
Fig. 1, which is shown, is integrated into semiconductors manufacture for multiple online checking systems according to some embodiments of present disclosure
The block diagram of system in production line.
Fig. 2A shows the perspective view of checking system in accordance with some embodiments.
Fig. 2 B shows the perspective view of the checking system in accordance with some embodiments including reflecting mirror.
Fig. 2 C shows the cross-sectional view of the online checking system in accordance with some embodiments including reflecting mirror.
Fig. 2 D shows reflectivity in accordance with some embodiments to the wavelength in visible range (410 nanometers (nm) are arrived 700nm)
Figure.
Fig. 2 E shows the perspective view in accordance with some embodiments for examining the online checking system with large-sized chip.
Fig. 3 A to Fig. 3 C is shown according to some embodiments of present disclosure for by conveyer transferring plates
The perspective view of the system of wafer surface is scanned in the visual field through line scan camera (line scan camera) simultaneously.
Fig. 4 shows the flow chart of the method for the online checking system of some embodiments according to present disclosure.
Drawing reference numeral explanation
100,300: system
102a, 102b, 102c: treating stations
104a, 200A, 200B: checking system
104b: checking system/the second checking system
106a, 106b: accumulator
108: interconnecting piece
110: remote computer/remote computer resource
112a: local machine
112b: local machine/the second local machine
200C, 200E: online checking system
200D: figure
202: line scan camera/optical sensor
203: lens/imaging len
204: frame
206: chip
208: wafer rack
209: operating distance
210: transfer mechanical arm/electronic transfer tool arm/conveyer
212: image line
214: mirror/reflecting mirror
218: the visual field
220: track/local machine
222: display/display unit
230: light source/linear light source/linear light sorurce
244,248: angle
250: distance/first position
251: the second position
252: distance/the third place
254: distance
260: reflectivity/reflectance value
262: wavelength
400: method
401、402、403、409、410、412、413、414、415、416、417、420、421、422、430、432、434、
436: operation
X, Y, Z: direction
Specific embodiment
Following disclosure illustrates the various exemplary embodiments of the different characteristic for this target of implementation.Set forth below group
Part and the specific example of arrangement are to simplify present disclosure.Certainly, these are only example rather than are intended for limiting.Citing comes
It says, it should be appreciated that when claiming an element " being connected to " or " being coupled to " another element, the element may be coupled directly to or direct coupling
Another element is closed, or one or more intermediary elements may be present.
The disclosure proposed provides the various embodiments of the online checking system including high-resolution line scan camera.
In some embodiments, such online checking system can be incorporated in the transfer station with transfer conveyer, and the transfer is defeated
It send machine to be configured to from previous treating stations unloading wafer and is transferred into next treating stations.In addition, in contrast to only on chip
Several positions sampled to test, according to some embodiments, line scan camera can be in such wafer transfer process
Period entire wafer surface is scanned in a manner of line by line with judge from previous treating stations unloading after and being loaded onto it is next
It whether there is defect before treating stations.So, it is contrasted with inspection man's skill manual under traditional wire, such online inspection technique
High-throughput is provided in the case where not sacrificing high inspection resolution ratio, and (i.e. there is no foldings between sampling rate and inspection resolution ratio
Inner feelings).Therefore, it may be advantageous to avoid the above problem under traditional wire in checking system.
Fig. 1 is shown partly to be led according to being integrated into multiple online checking systems of one or more embodiments of present disclosure
The block diagram of system 100 in body manufacturing line.It should be noted that system 100 is only example, and it is not intended to limit in the disclosure
Hold.It will be understood, therefore, that before system 100 shown in Fig. 1, during system shown in Fig. 1 100 and system shown in Fig. 1 100 it
After can provide operation bidirectional, and may only illustrate some other operations in a capsule herein.
Referring to Fig.1, system 100 includes multiple treating stations 102a, 102b until 102c (referred to herein, generally, as treating stations
102), multiple checking system 104a between respective handling station 102 and 104b (referred to herein, generally, as checking system 104) with
And the multiple accumulator 106a and 106b (referred to herein, generally, as accumulator 106) coupled with corresponding checking system 104.In treating stations
The example for the IC manufacturing process implemented in 102 includes cleaning, photoetching, wet etching, dry-etching, dielectric deposition, metal deposit
And known any technique in fields.It can be formed at least one feature in each treating stations 102, including metal connects
Point, etching groove, isolation part (isolation), through-hole, intraconnections etc..
Intermediate survey system 104 is coupled at least two treating stations 102, wherein extremely from a previous treating stations 102
A few chip can accept inspection before it is transported to next treating stations 102.For example, treating stations 102b passes through inspection
System 104a is coupled to previous treating stations 102a and is also coupled to latter treatment station 102c by checking system 104b.Each inspection
System 104 is coupled at least one accumulator 106.For example, checking system 104a is coupled with accumulator 106a, wherein via
Checking system 104a determines that the defective chip of tool can be taken away from production line and be stored in accumulator 106a for from again
(rejection) is managed or retracted, and is no longer transferred to next treating stations 102b.
As follows to be discussed in further detail, in some embodiments, checking system 104 includes passing through inspection point's transferring plates
Chip conveying system (for example, conveyer), line scan camera and the local machine with storage unit and display unit.
For example, chip can be transferred to treating stations 102b, Huo Zheru from treating stations 102a on the conveyer in checking system 104a
Fruit detects defect, then chip can be transferred to corresponding accumulator from treating stations 102a on the conveyer in checking system 104a
106a.While transfer in checking system 104a, the surface of chip is imaged by line scan camera.It is collected by line scan camera
Data can be stored in the storage unit of local machine 112a, then undergo pre-treatment step.It is as follows further detailed
Thin to illustrate, pretreated example may include the two dimensional image and various distortion corrections by row image reconstruction at wafer surface.Such as
Shown in Fig. 1, the second local machine 112b is coupled to the second checking system 104b to store by the second checking system 104b institute
The data of collection simultaneously pre-process the data.
Herein, each of local machine 112a and 112b is generically and collectively referred to as or is referred to as local machine 112.Respectively
A local machine 112 is coupled to remote computer resource 110 each by interconnecting piece 108.In some embodiments, interconnecting piece
108 may include in Ethernet cable (Ethernet cable), optical fiber, wireless communication media and/or fields it is known its
His network.It should be understood that other interconnecting pieces and intermediate electricity can be disposed between local machine 112 and remote computer resource 110
Road connects in promoting.
In some embodiments, image processing operations can be executed by remote computer resource 110 with pre- according to being related to
Algorithm or rule (such as line width, irregular shape, heterogeneity etc.) are determined automatically to compare design criteria and wafer surface
Collected image.In some embodiments, remote computer resource 110 include computer network, server, application program and/
Or data center (commonly referred to as " cloud " or cloud calculate).Whether containing about chip from remote computer resource 110
The result of defect and judgement are handled and are transmitted back to the machine meter associated with corresponding checking system 104 by interconnecting piece 108
Calculation machine 112.In some embodiments, if local machine 112 can execute image process and analysis, remote computation in the machine
Machine resource 110 can be unnecessary.In some embodiments, various inspection results are (for example, the size of defect, density and distribution
And the mapping of the defect Chong Die with layout) be shown on the machine display unit and, if it is determined that chip is defective, then sends out
Send control signal to conveyer chip is transferred to corresponding accumulator 106.In some embodiments, chip is unable to satisfy predetermined
Adopted threshold value or criterion, and be therefore confirmed as defective and accumulator 106a is transferred to by the conveyer in checking system 104a
In cassette (cassette) for reprocessing or retract.On the other hand, if it is determined that chip zero defect and meet predefined threshold
Value or criterion, then chip is transferred to next treating stations 102b for further processing by conveyer.In some embodiments, threshold
Value can change according to application and can be set by manufacturer.
Although the system 100 in the illustrated embodiment of Fig. 1 includes only three treating stations, 102, two checking systems 104, two
106, two local machines 112 of a accumulator and a remote computer 110, it should be understood, however, that providing the shown implementation of Fig. 1
Example is only used for illustrating.System 100 may include having any desired checking system 104 of number and any institute of accumulator 106
The treating stations 102 of desired number, while being still within that scope of the present disclosure interior.In addition, in some embodiments, examining system
System 104 can be coupled to two or more treating stations 102 and/or two or more accumulators 106.In some embodiments,
Two or more checking systems 104 can be located between two treating stations 102.
In some embodiments, the transfer chamber separated in inspection point 104 can be coupled to the process chamber in treating stations 102.?
In some embodiments, handled such as metal deposit or dielectric deposition, by the line camera of checking system 104 and processing
Stand settling chamber separation with protect checking system 104 camera and other assemblies from material deposit such as be heated at high temperature and
The extreme environments such as particle bombardment (ion bombardment) influence.In some embodiments, the transfer chamber of checking system 104 can
Vacuum sealing is maintained between two vacuum processing chambers, or using high-purity inert gas (for example, Ar and N2) purged
To provide inert atmosphere during shifting process for the chip to air-sensitive.In some embodiments, if processing is not interfered
It examines, then checking system 104 is configurable on the inner treatment chamber for the treatment of stations 102.Such be integrated into checking system existing is partly led
The mode of body manufacturing line provides can be independent of the manual inspections or statistic sampling to wafer surface and efficiently to entire
The defect of chip detected and map in X -ray inspection X.As a part of online manufacturing process, by each processing rank
The defect of chip is mapped after section, can be realized while minimizing the negative effect to output to each stage
Operational characteristic (for example, tool and condition) important understanding.
As described above, Fig. 2A to Fig. 2 C shows various space requirements, wafer size and transfer in accordance with some embodiments
The various perspective views of the online checking system 200 of system.Certainly, these are only example rather than are intended for limiting.
Fig. 2A shows the perspective view of checking system 200A in accordance with some embodiments.In one embodiment, chip 206 is
It is fixed by the suitable wafer rack 208 coupled with conveyer (for example, electronic transfer tool arm 210).Shift mechanical arm 210
It can be shifted in x-direction and y-direction the two.In some embodiments, transfer mechanical arm 210 can also be specific in X-Y plane
Center rotation.In the shown embodiment, be coupled to transfer mechanical arm 210 wafer rack 208 during scanning with constant speed along X
Axis transferring plates 206.
In fig. 2 in illustrated embodiment, the line scan camera 202 with imaging len 203 is mounted on frame 204, frame
Frame 204 is located at particular job distance (working distance) relative to the surface of chip 206 on vertical direction (Z)
At 209.In some embodiments, these three components (i.e. 202,203 and 204) are fixed.In some embodiments, it can be used
Diffused illumination (diffused illumination) from the light source (not shown) for being located at distal end, diffused illumination can sweep for line
It retouches camera 202 and provides enough light to shoot the high-definition picture of chip 206.In some embodiments, it can adjust frame 204
And line scan camera 202 realizes alignment purpose relative to the position of chip 206.
In some embodiments, the general image of chip is not shot, but line scan camera 202 is per next scan line
Collect image data.Image line 212 by the short dash line instruction in Fig. 2A is wherein to scan phase by line through imaging len 203
The optical sensor of machine 202 is collected from the area Guang Xian (line region) by the surface reflection or scattering for examining chip.Some
In embodiment, the visual field 218 (for example, maximum length of image line 212) of line scan camera 202 in the Y direction can be swept by line
The focal length of the width of the optical sensor in camera 202, operating distance 209 and lens 203 is retouched to adjust.In some embodiments
In, image line 212 is the lap on the surface in the visual field 218 and chip 206 in Y-direction.For example, the width of imaging len
Degree can be 25 millimeters (mm), this can provide width in the Y direction and reaches the visual field 218 of 215mm and the sensor width of 14mm.Cause
This, the diameter of chip 206 can be taken into account and be controlled by operating distance 209 by the resolution ratio in Y-direction, for being 1024
The optical sensor width of a pixel/row, the unit of the resolution ratio are mm/ pixels.In some other embodiments, packet can be used
The line scan camera of the optical sensor with different in width and number of pixels is included, and in scope of the present disclosure interior.One
In a little embodiments, the available resolution ratio of such system institute is 9 microns.
In some embodiments, line scan camera 202 include can be based on the optical sensor of various technologies, such as be electrically coupled inspection
Survey device (charge-coupled detector, CCD), complementary metal oxide semiconductor (complementary metal-
Oxide-semiconductor, CMOS) or hybrid CCD/CMOS framework etc..In some embodiments, optical sensor can be black
White sensor or color sensor.In some embodiments, such optical sensor can be configured in wide wave-length coverage or narrow
Wave-length coverage (for example, ultraviolet light, visible light, infrared light, x-ray and/or other suitable wavelength) in work.It is some its
In his embodiment, such optical sensor can be configured to receive the non-fluorescence light for reflecting and/or scattering from light source or due to light
The excitation in source and the fluorescence light issued by defect or feature.
In some embodiments, chip 206 includes silicon substrate.Alternatively, chip 206 may include other yuan
Plain semiconductor material, such as germanium.Substrate also may include that the compound such as silicon carbide, GaAs, indium arsenide and indium phosphide is partly led
Body material.In addition, chip 206 may include the alloy semiconductor material such as SiGe, silicon germanium carbide, gallium arsenic and InGaP
Material.Each material can be since different material properties be (for example, refractive index and extinction coefficient (extinction
Coefficient it)) is interacted in different ways with the incident light from light source, this may influence light source and light sensing
The design (for example, wavelength, sensitivity and mode (for example, astigmatism, reflected light or fluorescence)) of device and the speed of conveyer.
Chip 206 will receive the feature of optical check containing at least one.In some embodiments, chip 206 can wrap
It includes by including fluorinated silica glass (fluorinated silica glass, FSG), phosphosilicate glass
(phosphosilicate glass, PSG), boron phosphorus silicate glass (borophosphosilicate glass, BPSG) gather
Dielectric material including acid imide and/or the low k dielectric of other future exploitations carries out dry-etching/wet etching and is formed
Groove.In some embodiments, chip 206 may also include for example through such as chemical vapor deposition (chemical vapor
Deposition, CVD), physical vapour deposition (PVD) (physical vapor deposition, PVD), rotary coating (spin-on
Coating) techniques and the conductive features such as the horizontal intraconnections formed or vertical through hole such as.In some embodiments, due to for example
Phenomena such as disturbing effect and antireflective effect, therefore the design of light source, optical sensor and imaging len 203 may also be subjected to position
In the physical size (for example, thickness and roughness) of material those of on chip 206 and the material properties of chip 206 and it is located at
The material properties of material on the top of chip 206 is influenced.
Fig. 2 B shows the perspective view of the checking system 200B in accordance with some embodiments including reflecting mirror 214.In some realities
It applies in example, non-fluorescence light and/or fluorescence light can be passed through lens from the image line 212 on the surface of chip 206 by reflecting mirror 214
203 are reflected into the optical sensor in line scan camera 202.Due to optical path can be changed and a part be located at and chip 206
The parallel X-direction of shift direction on, therefore may make can wherein in z-direction cannot be big for the use of reflecting mirror 214
Space (for example, summation that the total height of transfer chamber is less than the length of operating distance 209 and line scan camera 102) application in
Use checking system 200B.In some embodiments, it can adjust the position in X-Z plane and incline along the Y-axis of reflecting mirror 114
Alignment purpose is realized at oblique angle (that is, rotation).The configuration presented in Fig. 2 B is only used for showing and being not intended to being limited.Citing comes
It says, multiple reflecting mirrors can be used to provide desired optical path to direct light to desired direction.In some embodiments
In, reflecting mirror 214 is flat to prevent the reflection light distortion as caused by the surface of reflecting mirror 214.For example, reflecting mirror
214 include that range is less than or equal to 20 microns/20 millimeters (μm/mm) of surface waviness and range is equal to or less than 0.1mm/
The surface curvature of 100mm.
Fig. 2 C shows the cross-sectional view of the online checking system 200C in accordance with some embodiments including reflecting mirror 214.Due to
The wide visual field 218 is needed, therefore especially when examining big chip in a limited space, floodlight source lighting is become difficult to achieve
Even intensity.As noted previously, as unique needs that image line 212 is chip are uniformly lighted through line scan camera 202
The part of line scan image is collected, therefore the illumination of image line 212 may be from the narrower slots for guiding light beam
Linear light source 230.In some embodiments, linear light source 230 may include assembling row lens (half bar converging with half item
Line lens) light emitting diode (light emitting diode, LED) array as light guide (optical guide).
Such light source can maintain on chip 206 image line 212 carry out Uniform Illumination while configuration in the confined space.
In some embodiments, the distance 250 from an end of lens 203 to the reflecting surface of mirror 214 is less than or waits
In 145mm, wherein the reflecting surface of mirror 214 is the face for reflecting the light beam from light source 230.In some embodiments, it reflects
252 400mm of the distance between the surface that the light beam of mirror 214 and chip 206 made from light source 230 reflects.In addition, light source
The distance between 230 end and the surface of chip 206 254 are 65mm.Light source 230 is further configured to relative to chip
206 surface has angle 248, so as to can arrive at reflecting mirror 214 from the light of the surface reflection of chip 206.Reflecting mirror 214 is opposite
In the direction vertical with the surface of chip 206 with angle 244 tilt with by light from the surface reflection of chip 206 to optical sensor
In 202.In some embodiments, angle 248 is 75 degree and angle 244 is 52.5 degree.In some embodiments, coupling can be passed through
The motor of frame and light source 230 to reflecting mirror 214 adjusts or automatically adjusts angle 244 and 248 manually with realization pair
Quasi- purpose.
Fig. 2 D shows reflectivity in accordance with some embodiments to the figure of the wavelength in visible range (410nm to 700nm)
200D.The reflectivity 260 at wavelength 262 lower than 650nm is greater than at 90% and the wavelength between 650nm and 700nm
Reflectance value 260 is greater than 85%.
Fig. 2 E, which is shown, in accordance with some embodiments examines chip 206 with large scale (for example, diameter be 152mm)
The perspective view of online checking system 200E.In some embodiments, the optical sensor in line scan camera 202, operating distance 209
And imaging len 203 may be configured to ensure that the width in the visual field 218 in the Y direction is equal to or more than the diameter of chip 206.?
In some embodiments, as shown in FIG. 2 C, chip 206 can transport in a pair of tracks 220.
Due to needing the wide visual field 218, especially when examining big chip in a limited space, floodlight source lighting becomes
It must be difficult to realize uniform intensity.As noted previously, as unique needs that image line 212 is chip are uniformly lighted to pass through line
Scanning camera 202 collects the part of line scan image, therefore may be from having the illumination of image line 212 for guiding light beam
The linear light source 230 of narrow slits.In some embodiments, linear light source 230 may include that row lens are assembled using half item as light guide
Light emitting diode matrix.Such light source can exist in configuration while maintaining to carry out Uniform Illumination to the image line 212 on chip 206
In the confined space.However, according to various embodiments, using the various light sources for being suitable for various applications.In another embodiment,
The imaging len 203 with larger diameter, smaller focal length and/or big refractive index can be used to mention with small operating distance 209
For the wide visual field 218.For obtain with lesser chip on the comparable resolution ratio of resolution ratio (mm/ pixel), can be used have compared with
The camera of large sensor size.In some embodiments, optical path can be by reflecting mirror or for example reflection mirror array (does not show
Multiple reflecting mirrors changed courses such as out), to adapt to the checking system in specific application.
In some embodiments, the gate valve (gate valve) of line scan camera 202 being located proximate in process chamber.One
In a little embodiments, the relative position between line scan camera 202 and light source 230 may influence test criterion.For example, right
Chip 206 with reflecting surface, when line scan camera 202 deviates angle of reflection, is reflected using in the situation of linear light sorurce 230
Surface is rendered as dark in optical sensor, and feature and/or defect then can scatter light and be rendered as in the picture bright.It is another to lift
An example, when line scan camera 202 is in the angle of reflection of the incident light from light source 230, the surface be rendered as it is bright, and
Feature and/or defect can depend upon their reflectivity and the rest part relative to the surface be rendered as it is darker or brighter.
In some embodiments, conveyer can be the mechanical transfer being made of multiple connectors, single arm and platform.
In some embodiments, mechanical transfer can provide high speed and the processing of high-precision chip in a limited space.Such as the above institute
It discusses, requires chip 206 to carry out on the direction of the axis perpendicular to image line 212 using the surface examination of line scan camera 202
Linear movement.In some embodiments, the online checking system 200 with line scan camera 202 can be configured to focus on crystalline substance
On one part of piece transfer path, in the part, such linear relative motion between chip 206 and image line 212
It can be mentioned by the combination (for example, the rotation of connector and linear movement of arm and platform) of the moving parts of mechanical transfer
For.
In some embodiments, such checking system can be with other for carrying out additional functionality yield test (function
Yield test) (for example, conductivity measurement) online or line under functional check technique be combined.Although it is illustrated above
Wire defect detection system includes only one line scan camera (for example, 202 in Fig. 2A to Fig. 2 C), however is keeping being in this public affairs
It, can be by the line scan camera of any desired number (for example, working in different wavelength range while opening in the range of content
And different defects (for example, size, distribution and material) are detected simultaneously) combine in checking system.
Fig. 3 A to Fig. 3 C shows in accordance with some embodiments for working as while through conveyer transferring plates through phase
The machine visual field carries out the perspective view of the system 300 of image recording when scanning wafer surface.
As shown in fig. 3, system 300 is first in the first position 250 of the chip 206 controlled by conveyer 208/210
Scan chip 206.According to some embodiments, in first position 250, the scanning of wafer surface is started.As chip 206 exists
Enter the visual field 218 in Y-direction, initiation is followed by record of the local machine 220 to the line scan image from line scan camera 202
Ring.In some embodiments, the record can also be by the address of the encoder on the motor for being located at transfer tool arm 210
Signal is initiated.In some embodiments, continue with scanning, image data is shown to be coupled with local machine 220
Display 222 on.It as shown in fig. 3, even cannot be for the figure that is shown on display 222 when scanning process starts
As data.
In some embodiments, such that local machine is recorded in single a pixel column from line scan camera 202
220 process is implemented with two steps, i.e. step of exposure and reading step.In some embodiments, implement to from line
The recording process of multiple pixel columns of scanning camera 202.In the first step, as discussed above, line scan camera 202 is one
Single pixel row is collected for each exposure at a position, this is from initiating to camera application trigger pulse.Trigger pulse is also
Terminate exposure cycle and start second step, make sensor image information be transferred to readout register and eventually off camera and
Local machine is reached, to complete reading step.In some embodiments, sensor image information is with next every pixel column
Local machine 220 is provided to mode.In some other embodiments, line scan camera 202 is at a position for every
Multiple pixel columns are collected in one exposure.
In some embodiments, the time for exposure of individual rows at image line 212 and line number may be by chips 206
Speed and the resolution requirement in wafer plane along X-axis are influenced.In some embodiments, the time for exposure may also be subjected to photograph
The type of bright intensity, the sensitivity of optical sensor and detected defect out is influenced.While the first readout interval, line is swept
It retouches the continuation of camera 202 and carries out next step of exposure in subsequent cycle, while shifting mechanical arm 210 and being moved to down chip 206
One position.
According to some embodiments, as shown in Figure 3B, system 300 continues at the second position 251, in the second position 251
In the partial sweep on associated wafer surface is completed.In some embodiments, to the weight of the image of the wafer surface to accept inspection
Structure is to be based on multiple uniline images by local machine 220 and implemented, and surface image is then shown in real time as shown in Figure 3B
Show on display unit 222.
Once scanning (as shown in FIG. 3 C) is completed on the surface of the chip to accept inspection at the third place 252, then originally
Machine computer 220 then continues to complete two-dimensional surface image is reconstructed and pre-processed so that described image is ready to receive
Defects detection.In some embodiments, to such pretreatment of surface image include deviation correction, gain calibration, distortion correction,
Adjustment comparison etc..According to some embodiments, as shown in FIG. 3 C, the image reconstructed is shown on display unit 222.
Fig. 4 show it is in accordance with some embodiments on chip manufacture integrated circuit during to wafer surface carry out in X -ray inspection X
Method 400 flow chart.As indicated by the respective dashed in Fig. 4, method 400 includes by machine operating system 409, the machine
Three sub- mac functions that checking system 416 and remote computer 422 execute respectively.
Method 400 starts from operation 401, and operation 401 includes providing the first chip from the first treating stations.The method with
Operation 402 continues, and the first chip is transferred to inspection point on a conveyor in operation 402.In some embodiments, such defeated
Sending machine can be transfer mechanical arm, conveyer belt etc., it is possible to provide for example horizontal movement, vertical movement, linear movement, rotary motion and it
The movement such as combination.In some embodiments, conveyer can handle various substrates, such as thin substrate, large substrates, film frame-type
Substrate, glass substrate, substrate with groove etc..In some embodiments, conveyer can turn between cassette, platform and/or room
Move chip.In some embodiments, controller 403 is communicated with the encoder on conveyer and sends trigger signal to the machine
Line scan camera in checking system 416.
Method 400 continues to operation 410, in act 410 configuration check parameter.In some embodiments, such
Configuration includes that formula (inspection recipe) will be examined to be written to the process of checked operation 416 or recall existing formula
To the process of checked operation 416, existing formula is joined containing the checking system to certain types of substrate, feature or defect to be tested
Number setting.In some embodiments, operation 410 further includes the control of the movement (for example, speed and direction) to control conveyer
The configuration of device.In some embodiments, inspection parameter includes triggering criterion, examines resolution ratio, line frequency, dot frequency, always adopts
Collect time (total acquisition time), illumination intensity, the movement speed of conveyer, the size of chip and/or other
Suitable parameter.
Method 400 continues to operation 412, in operation 412, such as extremely above by reference to such as Fig. 2A to Fig. 2 E and Fig. 3 A
Fig. 3 C is discussed, and while conveyer transports the first chip along the direction vertical with direction of line scan with constant speed, is passed through
Line scan camera scans the surface of the first chip.It in some embodiments, can be by being acquired from the encoder being located on conveyer
The triggering row scanning of controller 403 of location parameter.
Method 400 continues to operation 413, in operation 413, is passed through according to system 300 shown in Fig. 3 A to Fig. 3 C
Optical sensor in line scan camera records multiple line scan images.In some embodiments, by the multiple line scan image
Be converted into digital signal from analog signal and be stored in local machine, carry out later operation 414 and 415, operation 414 and
During 415, sample image is reconstructed based on the multiple line scan image and works as scanning through to the surface of the first chip
At when the sample image is pre-processed.In some embodiments, it is such operation 414 and 415 include for example deviation correction,
At least one of techniques such as gain calibration, distortion correction, adjustment comparison.
Method 400 continues to operation 417, can be in the board display coupled with local machine in operation 417
The upper pretreated sample image of display.In some embodiments, display can also be for for inputting and showing inspection parameter
Touch control screen.In some embodiments, pretreated sample image and reference value, design criteria and predefined thresholds are carried out
Compare to implement wafer scale mapping (wafer-scale mapping) so that it is determined that defect to defect by remote computer 422
Type and distribution.Then result is transmitted back to local machine so that instruction control unit 403 controls conveyer and makes chip can quilt
Reprocess, retract or continue to move to next technique.
In some embodiments, the linear velocity of line scan camera is determined by the speed of conveyer.In another embodiment,
The type of the defect of potential introducing it can determine that line is swept in type by related defects or the corresponding steps in manufacturing line
Retouch the resolution requirement of camera.
Method 400 continues to operation 420, in operation 420, sends long-range meter for pretreated sample image
Calculation machine 422.In some embodiments, then in operation 421 period processing sample image so that the size and distribution characteristics of defect
Change, and the design criteria (such as size, shape, position and color) of sample image and device is compared so that defect to be classified
At predefined classification.In some embodiments, design criteria can be in the various steps in the production line with different layout characters
Between be varied.In some embodiments, image process and analysis system 421 can identify the boundary of each tube core first.?
In some embodiments, the sensitivity of system can be adjusted by the resolution ratio of camera.In some embodiments, remote computer
422 can also determine to be retracted, reprocessed or made first to the first chip based on design criteria associated with technique information
Chip continues to move to.The treated surface image of completion can be transmitted back to local machine.
Then result is transmitted back to local machine for display, this makes that control signal conveying can also be provided back to
Machine.If the first chip is defective and must be removed from production line, method 400 continues to operation 430, wherein by defeated
It send machine by the first chip conveying to accumulator, then carries out operation 432, wherein passing through conveyer for the second wafer-load to inspection
It stands for examining.If it is determined that the first chip zero defect and can continue its it is further handle, then method 400 continues to behaviour
Make 434.In some embodiments, when (that is, current) treating stations are treating stations last in production line when first, method 400 after
It is continuous to proceed to operation 430 and 432 as discussed above.In other embodiments, when first (that is, current) treating stations are not most
When the latter, method 400 is continued to the operation 436 of the first chip conveying to second (that is, next) treating stations wherein, it
It continues to afterwards and wherein provides the operation 432 of the second chip from the first treating stations.Therefore, it can be achieved that automatic on-line is examined and crystalline substance
Piece is sorted out.
Foregoing teachings only show the principle of present disclosure.Therefore, it should be appreciated that, it illustrates or shows although being not known herein,
However the those of ordinary skill in fields will imagine the principle using present disclosure and be included in the disclosure
Various arrangements in the spirit and scope of content.In addition, all examples set forth herein and conditional language are mainly clear
It is intended only for teaching purpose and reader is helped to understand the principle and summary of the invention of present disclosure, and will be considered as being not limited to
Such example and condition specifically stated.In addition, the principles, aspects and embodiments of present disclosure set forth herein and its tool
All statements of body example, which are intended to, includes both its structural equivalents and function equivalents.In addition, it is contemplated that
Such equivalents include both equivalents of currently known equivalents and the following exploitation, that is, that is developed any holds
The element of row identical function, regardless of structure how.
The attached drawing, which will be considered as entire book, to be understood in conjunction with each figure in attached drawing to this explanation of exemplary embodiment
A part that face illustrates.In explanation, for example, " lower part ", " top ", " horizontal ", " vertical ", " top ", " lower section ",
The relativities term such as "upper", "lower", " top " and " bottom " and their derivative are (for example, " horizontally ", " downward ", " court
On " etc.) should be understood to refer to it is then being illustrated in discussed schema or shown in orientation.These relativity terms be for
Facilitate elaboration and equipment is not required to be constructed or operated on specific orientation.
Although elaborating that present disclosure, present disclosure are not limited only to this according to exemplary embodiment.Definitely
For, appended claim should be construed broadly to include can be by the those of ordinary skill in fields without departing substantially from this
Other modifications and embodiment of present disclosure are realized under conditions of scope of the disclosure and equivalent scope.
In embodiment, a kind of that the defect on semiconductor wafer surface is carried out during semiconductor device manufacturing process
The method of line detection, which comprises the semiconductor wafer is automatically transported to inspection point from the first treating stations；Institute
It states and uses camera scanning wafer surface in inspection point；Generate at least one image of the wafer surface；Analysis described at least one
A image, to detect the defect in the wafer surface based on one group of predetermined criterion；If it is determined that the chip is defective, then
The chip is automatically transported to accumulator from the inspection point；And if it is determined that the chip zero defect, then by the crystalline substance
Piece is transported to second processing station automatically to be further processed according to the semiconductor device manufacturing process.In some implementations
In example, transport includes transporting the semiconductor die between first treating stations and the inspection point using transfer mechanical arm
Piece.In some embodiments, transfer mechanical arm is coupled to the frame for supporting the semiconductor wafer.In some embodiments,
Camera includes line scan camera, scans the semiconductor wafer surface in a manner of scanning a pixel column every time.In some realities
It applies in example, including using reflecting mirror that the optical path between the camera and the semiconductor wafer alters course, wherein described anti-
Mirror is penetrated with surface waviness and surface curvature, wherein the surface waviness is equal to or less than 20m/20mm and the surface is bent
Rate is equal to or less than 0.1mm/100mm；And the wafer surface is irradiated using light source.In some embodiments, light source includes
Linear light source, the linear light source only irradiate the line part of the wafer surface each time.In some embodiments, at least one is generated
Image includes: to provide pixel data to the native handlers coupled with the camera from the camera；To the pixel data
It is pre-processed to generate the described image of the wafer surface；And it is shown on the display for being coupled to the native handlers
Show the described image of the wafer surface.It in some embodiments, further include the described image that will represent the wafer surface
Data transmission is to remote computer；Wherein at least one described image of the analysis wafer surface is by the long-range meter
What calculation machine was implemented；And at native handlers from the remote computer receive the analysis as a result, wherein described by institute
State that semiconductor wafer is transported to the second processing station or the accumulator is carried out based on the result.
In another embodiment, the defect on a kind of pair of semiconductor wafer surface carries out the inspection point of on-line checking, described
The first treating stations are coupled in inspection point, and the inspection point includes: conveyer, be configured to by the semiconductor wafer automatically from
First treating stations are transported to the inspection point；Camera is configured to scan the surface of the semiconductor wafer and generates institute
State at least one image on surface；And at least one processor, it is configured to receive at least one described figure from the camera
Picture simultaneously analyzes at least one described image to detect the defect on the surface based on one group of predetermined criterion, wherein the conveying
Machine is further configured to: if it is determined that the chip, then be automatically transported to from the inspection point described by the chip zero defect
Second processing station or if it is determined that the chip is defective, then be automatically transported to storing from the inspection point for the chip
Device.In some embodiments, conveyer includes transfer mechanical arm.In some embodiments, transfer mechanical arm is coupled to frame, described
Frame is for supporting the chip during being transported between each station.In some embodiments, camera includes line scanning
Camera scans the wafer surface in a manner of automatically scanning a pixel column every time.In some embodiments, further includes:
Reflecting mirror alters course the optical path between the camera and the wafer surface, wherein the reflecting mirror has external waviness
Degree and surface curvature, wherein the surface waviness is equal to or less than 20m/20mm and the surface curvature is equal to or less than
0.1mm/100mm；And light source, irradiate the wafer surface.In some embodiments, light source includes linear light source, the linear light
The row part of the wafer surface is only irradiated in source each time.In some embodiments, it is coupled to described at least the one of the camera
A processor is further configured to: receiving pixel data from the camera；The pixel data is pre-processed described in generation
At least one image of wafer surface；And the described image of the wafer surface is shown over the display.In some embodiments
In, at least one processor includes: native handlers；And remote computer, it is configured to: receiving the institute of the wafer surface
State image；Analyze the described image of the wafer surface；And analysis result is transmitted to the native handlers.
In another embodiment, it is a kind of during semiconductor device manufacturing process to the defect on semiconductor wafer surface into
The system of row on-line checking, the system comprises: the first treating stations execute the first semiconductor fabrication process；Second processing station, holds
The second semiconductor fabrication process of row；Inspection point is coupled between first treating stations and the second processing station, described
Semiconductor wafer is transported between first treating stations and the second processing station, wherein the inspection point includes: conveyer, is configured
The inspection point automatically is transported to from first treating stations at by the semiconductor wafer；Reflecting mirror, by the camera with
Optical path changed course between the wafer surface, wherein the reflecting mirror has surface waviness and surface curvature, wherein institute
Surface waviness is stated equal to or less than 20 μm/20mm and the surface curvature is equal to or less than 0.1mm/100mm；Camera is matched
It is set at least one image for scanning the surface of the semiconductor wafer and generating the surface；And at least one processor,
It is configured to receive at least one described image from the camera and analyzes at least one described image to fix in advance based on one group
The defect on the surface then is detected, wherein the conveyer is further configured to: if it is determined that the chip zero defect, then will
The chip is automatically transported to the second processing station from the inspection point or if it is determined that the chip is defective, then will
The chip is automatically transported to accumulator from the inspection point.In some embodiments, conveyer includes transfer mechanical arm.?
In some embodiments, camera includes line scan camera, scans the wafer surface in a manner of scanning a pixel column every time.?
In some embodiments, at least one processor includes: local machine；And remote computer, it is configured to: receiving the crystalline substance
The described image on piece surface；Analyze the described image of the wafer surface；Generate the result of the analysis；And by the result
It is transmitted to the local machine, wherein described be automatically transported to the second processing station or the accumulator for the chip
It is to be implemented based on the result.
Claims (10)
1. a kind of semiconductor device is in the method for X -ray inspection X, which is characterized in that the described method includes:
The semiconductor wafer is transported to inspection point from the first treating stations；
Camera scanning wafer surface is used in the inspection point；
Generate at least one image of the wafer surface；
At least one described image is analyzed, to detect the defect in the wafer surface based on one group of predetermined criterion；
If it is determined that the chip is defective, then the chip is transported to accumulator from the inspection point；And
If it is determined that the chip zero defect, then by the chip conveying to second processing station according to the semiconductor device system
Technique is made to be further processed.
2. the method according to claim 1, wherein further include:
The optical path between the camera and the semiconductor wafer is altered course using reflecting mirror, wherein the reflecting mirror has
Surface waviness and surface curvature, wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature is equal to
Or it is less than 0.1mm/100mm；And
The wafer surface is irradiated using light source.
3. the method according to claim 1, wherein described at least one image of generation includes:
Pixel data is provided from the camera to the native handlers coupled with the camera；
The pixel data is pre-processed to generate the described image of the wafer surface；And
The described image of the wafer surface is shown on the display for being coupled to the native handlers.
4. according to the method described in claim 3, it is characterized by further comprising:
The data transmission of the described image of the wafer surface will be represented to remote computer；The wherein analysis chip table
At least one image in face is implemented by the remote computer；And
At native handlers from the remote computer receive the analysis as a result, wherein described by the semiconductor wafer
It is transported to the second processing station or the accumulator is carried out based on the result.
5. a kind of semiconductor wafer is in the system of X -ray inspection X, which is characterized in that the system comprises:
Conveyer is configured to the semiconductor wafer being transported to the inspection point from first treating stations；
Camera is configured to scan the surface of the semiconductor wafer and generates at least one image on the surface；And
At least one processor is configured to receive at least one described image from the camera and analyzes at least one described figure
As to detect the defect on the surface based on one group of predetermined criterion,
Wherein the conveyer is further configured to: if it is determined that the chip zero defect, then by the chip automatically from described
Inspection point is transported to second processing station or if it is determined that the chip is defective, then by the chip automatically from the inspection
Station is transported to accumulator.
6. system according to claim 5, which is characterized in that the camera includes line scan camera, with every time automatically
The mode for scanning a pixel column scans the wafer surface.
7. system according to claim 5, which is characterized in that further include:
Reflecting mirror alters course the optical path between the camera and the wafer surface, wherein the reflecting mirror has surface
Percent ripple and surface curvature are equal to or small wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature
In 0.1mm/100mm；And
Light source irradiates the wafer surface.
8. system according to claim 5, which is characterized in that be coupled at least one described processor of the camera also
It is configured to:
Pixel data is received from the camera；
The pixel data is pre-processed to generate at least one image of the wafer surface；And
The described image of the wafer surface is shown over the display.
9. a kind of semiconductor wafer is in the system of X -ray inspection X, which is characterized in that the system comprises:
First treating stations execute the first semiconductor fabrication process；
Second processing station executes the second semiconductor fabrication process；
Inspection point is coupled between first treating stations and the second processing station, with first treating stations with it is described
Second processing transports semiconductor wafer between station, wherein the inspection point includes:
Conveyer is configured to the semiconductor wafer being automatically transported to the inspection point from first treating stations；
Reflecting mirror alters course the optical path between the camera and the wafer surface, wherein the reflecting mirror has surface
Percent ripple and surface curvature are equal to or small wherein the surface waviness is equal to or less than 20 μm/20mm and the surface curvature
In 0.1mm/100mm；
Camera is configured to scan the surface of the semiconductor wafer and generates at least one image on the surface；And
At least one processor is configured to receive at least one described image from the camera and analyzes at least one described figure
As to detect the defect on the surface based on one group of predetermined criterion,
Wherein the conveyer is further configured to: if it is determined that the chip zero defect, then by the chip automatically from described
Inspection point is transported to the second processing station or if it is determined that the chip is defective, then by the chip automatically from described
Inspection point is transported to accumulator.
10. system according to claim 9, which is characterized in that at least one described processor includes:
Local machine；And
Remote computer is configured to:
Receive the described image of the wafer surface；
Analyze the described image of the wafer surface；
Generate the result of the analysis；And
The result is transmitted to the local machine, wherein described be automatically transported to the second processing for the chip
It stands or the accumulator is implemented based on the result.
Applications Claiming Priority (4)
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| US201762552216P | 2017-08-30 | 2017-08-30 | |
| US62/552,216 | 2017-08-30 | ||
| US16/058,400 US10872794B2 (en) | 2017-06-20 | 2018-08-08 | Automatic in-line inspection system |
| US16/058,400 | 2018-08-08 |
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| CN109427609A true CN109427609A (en) | 2019-03-05 |
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| CN109427609B (en) | 2022-03-01 |
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