CN109397070A - The substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold - Google Patents
The substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold Download PDFInfo
- Publication number
- CN109397070A CN109397070A CN201811240107.8A CN201811240107A CN109397070A CN 109397070 A CN109397070 A CN 109397070A CN 201811240107 A CN201811240107 A CN 201811240107A CN 109397070 A CN109397070 A CN 109397070A
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- CN
- China
- Prior art keywords
- substrate
- ceramic
- mold
- polishing
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B24—GRINDING; POLISHING
- B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
- B24B37/00—Lapping machines or devices; Accessories
- B24B37/27—Work carriers
- B24B37/30—Work carriers for single side lapping of plane surfaces
Abstract
The invention discloses one kind to polish mold for indium phosphide wafer and its epitaxial wafer piece, and structure includes ceramic channel, ceramic substrate, clump weight.The ceramic channel to play a supportive role between polishing pad and ceramic substrate.By increasing ceramic channel on ceramic substrate, the complexity of polishing mold can be reduced using polishing mold of the present invention, stablizes mold rotation in polishing process, while accelerating polishing speed, to obtain the substrate of high-flatness, and reduces process costs.
Description
Technical field
The present invention relates to the wafer level processing techniques field of semiconductor crystal wafer sheet material, in particular to it is related to a kind of for phosphorus
Change the polishing mold of indium chip and its epitaxial wafer.
Background technique
Indium phosphide (InP) has high breakdown electric field and high electricity as a kind of important III-V group semi-conductor material
Sub- average drift velocity, while its electro-optical efficiency and capability of resistance to radiation are also relatively strong, it can be in optic communication, microwave, millimeter wave
Device, photovoltaic cell, infrared detector etc. realize important application.Currently, the material of InP-base is answered in multiple fields
With, such as laser diode, light emitting diode, infrared focal plane device etc..
In InP-base device and InP epitaxial material preparation process, it is required to be processed by shot blasting chip.Currently, mainstream
InP polishing method be using chemically mechanical polishing.Since the K-hardness of InP is smaller, thus it is easy to damage in process
Wound generates deformation.Thus it is guaranteed that the surface quality of burnishing surface can be to the performance and growth high quality for preparing high performance device
Epitaxial material it is particularly important.During the polishing process, the stability of sample rotation will directly affect the surface topography of final sample
And flatness.Therefore complex for the polissoir structure of InP substrate processing at present due to special material properties, from
And increases research and development cost and reduce processing efficiency.
Therefore, in view of the above problems, needing to propose new solution.
Summary of the invention
The purpose of the present invention is to provide a kind of InP wafer and its polishing molds of epitaxial material wafer, to overcome
The deficiencies in the prior art make polishing process have high stability and high duplication, to promote working efficiency and product
Yield.Compared to traditional polishing patch substrate, ceramic channel is introduced slide glass substrate for the first time by the present invention, so that sample is polished
Rotation is stablized in journey, and is guided polishing fluid into sample and increased polishing efficiency.Mold can be effectively reduced using this ceramic channel
Complexity, reduce process costs, while play the role of protect sample.
Polishing mold of the present invention further comprises:
As shown in Figure 1, mold includes ceramic substrate 1, ceramic channel 1-1, clump weight 2.
Sample as shown in Figure 2 is pasted in 1 center of ceramic substrate, and there are 2~6 groups of ceramics channel 1-1 on the surface of ceramic substrate 1,
It is distributed in sample surrounding；Every group of ceramics channel 1-1 is made of 3-10 bulge-structure.
As shown in figure 3, being higher by 100~1000 microns of 1 surface of ceramic substrate, ceramic channel 1-1 at the top of ceramic channel 1-1
Groove depth be 0.1~0.5cm.
As shown in Figure 1, mold tips upside down on polishing pad in polishing, clump weight 2 is located at 1 top of ceramic substrate.
Clump weight 2 during the polishing process, is fixed on ceramic substrate 1；The weight per unit area that clump weight applies, with ceramics
The gross area of channel 1-1 and sample calculates, and range is in 50~500g/cm2。
The present invention has the advantages that
A. the polishing mold can reduce the complexity of polishing mold by the ceramic channel of increase on ceramic substrate,
Promote high production and efficiency of research and development.
B. ceramic channel facilitates die table rotation in polishing process, makes sample after a polish and can obtain and is high smooth
Degree.
C. ceramic channel and polishing pad have lesser contact area, while can guide polishing fluid into sample, to be promoted
Polishing speed.
Detailed description of the invention
Fig. 1 is polishing die structure dwg of the invention.
Fig. 2 is ceramic channel schematic diagram of the invention.
Fig. 3 is polishing mold stereoscopic schematic diagram of the invention.
In figure:
1 --- ceramic substrate；
1-1 --- ceramic channel；
2 --- clump weight.
Specific embodiment
Embodiment 1
1 ceramic channel height is 300 microns, groove depth 0.3cm.
350 microns of thick 2 inch indium phosphide wafers are sticked in ceramic substrate by 2.
3 fixed weight blocks make sample stress 250g/cm2, polishing disk rotating speed range 80rpm.
Embodiment 2
1 ceramic channel height is 100 microns, groove depth 0.1cm.
The indium phosphide wafer of 150 microns of thick 3 inch extension indium aluminium arsenic is sticked in ceramic substrate by 2.
3 increase clump weight, make sample stress 50g/cm2, polishing disk rotating speed range 30rpm.
Embodiment 3
1 ceramic channel height is 1000 microns, groove depth 0.5cm.
The indium phosphide wafer of 800 microns of thick 4 inch extension indium gallium arsenic is sticked in ceramic substrate by 2.
3 increase clump weight, make sample stress 500g/cm2, polishing disk rotating speed range 120rpm.
Claims (3)
1. the substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold, including ceramic substrate (1), ceramic channel
(1-1), clump weight (2), it is characterised in that:
Polished sample, which is pasted, has 2~6 groups of ceramics channels (1-1) on ceramic substrate (1) center, ceramic substrate (1), uniformly distributed
In sample surrounding；Every group of ceramics channel (1-1) is made of 3-10 bulge-structure；In polishing, mold is tipped upside down on polishing pad,
Clump weight (2) is placed on ceramic substrate (1).
2. the substrate of a kind of indium phosphide wafer according to claim 1 and its epitaxial wafer piece polishes mold, feature
It is: is higher by 100~1000 microns of ceramic substrate (1) surface, ceramic ditch at the top of described ceramic channel (1-1) bulge-structure
The groove depth in road (1-1) is 0.1~0.5cm.
3. the substrate of a kind of indium phosphide wafer according to claim 1 and its epitaxial wafer piece polishes mold, feature
It is: the weight per unit area that the clump weight (2) applies, with the calculating of the gross area of ceramic channel (1-1) and sample, model
It is trapped among 50~500g/cm2。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811240107.8A CN109397070A (en) | 2018-10-24 | 2018-10-24 | The substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811240107.8A CN109397070A (en) | 2018-10-24 | 2018-10-24 | The substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN109397070A true CN109397070A (en) | 2019-03-01 |
Family
ID=65468864
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811240107.8A Pending CN109397070A (en) | 2018-10-24 | 2018-10-24 | The substrate of a kind of indium phosphide wafer and its epitaxial wafer piece polishes mold |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109397070A (en) |
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| CN1254441A (en) * | 1997-04-30 | 2000-05-24 | 美国3M公司 | Method of planarizing upper surface of semiconductor wafer |
| JP2001121405A (en) * | 1999-10-25 | 2001-05-08 | Matsushita Electric Ind Co Ltd | Polishing pad |
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| CN102049723A (en) * | 2009-10-28 | 2011-05-11 | 硅电子股份公司 | Method for polishing a semiconductor wafer |
| CN203418417U (en) * | 2013-08-12 | 2014-02-05 | 元鸿（山东）光电材料有限公司 | Precision polishing clamping ceramic plate for sapphire substrate material |
| CN104476384A (en) * | 2011-09-15 | 2015-04-01 | 硅电子股份公司 | Method for the double-side polishing of a semiconductor wafer |
| CN204954602U (en) * | 2015-09-19 | 2016-01-13 | 哈尔滨秋冠光电科技有限公司 | Modified pottery structure of twining |
| KR20160115789A (en) * | 2015-03-26 | 2016-10-06 | 다우 글로벌 테크놀로지스 엘엘씨 | Polishing Pad Window |
| CN106233431A (en) * | 2014-04-22 | 2016-12-14 | 应用材料公司 | Inner surface has the retainer ring of facet |
| CN106670956A (en) * | 2015-11-03 | 2017-05-17 | 力晶科技股份有限公司 | Polishing apparatus and polishing method |
| CN206925702U (en) * | 2017-07-08 | 2018-01-26 | 上海致领半导体科技发展有限公司 | It is a kind of for semiconductor wafer polishing without wax polishing template |
| CN108356684A (en) * | 2017-12-13 | 2018-08-03 | 中国电子科技集团公司第十三研究所 | A kind of semiconductor wafer polishing apparatus vacuum suction template and burnishing device |
-
2018
- 2018-10-24 CN CN201811240107.8A patent/CN109397070A/en active Pending
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1254441A (en) * | 1997-04-30 | 2000-05-24 | 美国3M公司 | Method of planarizing upper surface of semiconductor wafer |
| CN1312742C (en) * | 1999-03-30 | 2007-04-25 | 株式会社尼康 | Polishing disk, polishing machine and method for manufacturing semiconductor |
| JP2001121405A (en) * | 1999-10-25 | 2001-05-08 | Matsushita Electric Ind Co Ltd | Polishing pad |
| CN201151081Y (en) * | 2007-10-16 | 2008-11-19 | 魏荣志 | Guiding ring structure |
| CN102049723A (en) * | 2009-10-28 | 2011-05-11 | 硅电子股份公司 | Method for polishing a semiconductor wafer |
| CN104476384A (en) * | 2011-09-15 | 2015-04-01 | 硅电子股份公司 | Method for the double-side polishing of a semiconductor wafer |
| CN203418417U (en) * | 2013-08-12 | 2014-02-05 | 元鸿（山东）光电材料有限公司 | Precision polishing clamping ceramic plate for sapphire substrate material |
| CN106233431A (en) * | 2014-04-22 | 2016-12-14 | 应用材料公司 | Inner surface has the retainer ring of facet |
| KR20160115789A (en) * | 2015-03-26 | 2016-10-06 | 다우 글로벌 테크놀로지스 엘엘씨 | Polishing Pad Window |
| CN204954602U (en) * | 2015-09-19 | 2016-01-13 | 哈尔滨秋冠光电科技有限公司 | Modified pottery structure of twining |
| CN106670956A (en) * | 2015-11-03 | 2017-05-17 | 力晶科技股份有限公司 | Polishing apparatus and polishing method |
| CN206925702U (en) * | 2017-07-08 | 2018-01-26 | 上海致领半导体科技发展有限公司 | It is a kind of for semiconductor wafer polishing without wax polishing template |
| CN108356684A (en) * | 2017-12-13 | 2018-08-03 | 中国电子科技集团公司第十三研究所 | A kind of semiconductor wafer polishing apparatus vacuum suction template and burnishing device |
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Application publication date: 20190301 |
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