CN109308391B - Signal compensation method and system for common mode and differential mode conversion - Google Patents
Signal compensation method and system for common mode and differential mode conversion Download PDFInfo
- Publication number
- CN109308391B CN109308391B CN201811103773.7A CN201811103773A CN109308391B CN 109308391 B CN109308391 B CN 109308391B CN 201811103773 A CN201811103773 A CN 201811103773A CN 109308391 B CN109308391 B CN 109308391B
- Authority
- CN
- China
- Prior art keywords
- differential
- common mode
- mode
- different
- dynamic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title claims abstract description 29
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 20
- 238000004088 simulation Methods 0.000 claims abstract description 13
- 230000005672 electromagnetic field Effects 0.000 claims abstract description 10
- 230000003068 static effect Effects 0.000 claims description 6
- 230000000007 visual effect Effects 0.000 abstract description 3
- 230000000694 effects Effects 0.000 description 4
- 230000001502 supplementing effect Effects 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 230000002401 inhibitory effect Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Evolutionary Computation (AREA)
- Geometry (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Dc Digital Transmission (AREA)
Abstract
The invention provides a signal compensation method and a system aiming at common mode and differential mode conversion, comprising the following steps: respectively adopting different differential pair wiring completion schemes to carry out electromagnetic field simulation; obtaining different S parameters under different compensation modes; and setting dynamic constraint and prompting dynamic phase errors in the actual wiring process. The invention can convert the differential mode into the common mode to be directly and dynamically expressed; different from the prior visual experience impression, different compensation modes are expressed by an S parameter method. The differential mode is converted into the common mode under different compensation modes, and the common mode is directly highlighted in the high-speed line routing. The problem of adopt the compensation mode to restrain differential mode interference among the prior art is solved, realize obtaining the specific loss condition to the signal, convert the differential mode into the direct dynamic expression of common mode.
Description
Technical Field
The invention relates to the technical field of high-speed signal integrity test, in particular to a signal compensation method and system aiming at common-mode and differential-mode conversion.
Background
As digital circuit speeds and clock frequencies continue to increase, in high speed systems, high speed signals passing through interconnect lines can create signal integrity problems such as delay, reflection, attenuation, crosstalk, and the like. Signal integrity issues have become one of the key issues for the success of high-speed digital circuit designs.
The common mode refers to the potential of the two signals a, B with respect to a reference point (GND) and the differential mode refers to the relative value between a and B. The common-mode interference refers to the interference of two signal lines to the ground, and is called as common-mode interference if the environment generates the same-direction and equal-amplitude interference (the same voltage is superposed) to the ground between the two signal lines.
The differential signal has good common mode rejection because the differential amplifier only amplifies the difference between the two signals, if the common mode interference with the same size can be completely eliminated, the differential mode interference is also referred to as a series mode, and is referred to as the difference between the two signal lines, and the differential mode interference is equivalent to adding an interference voltage between the two signals.
In the PCB wiring, the situation that the DP and DN are not equal often occurs, and the compensation mode is often adopted, which is variable, and the compensation effect is different from person to person.
In the prior art, different compensation modes have larger influence on the integrity of signals, no relevant research is carried out on the influence of the signals brought by the different compensation modes, judgment is carried out only by depending on experience, and the error is larger.
Disclosure of Invention
The invention aims to provide a signal compensation method and a signal compensation system aiming at common mode and differential mode conversion, which aim to solve the problem of inhibiting differential mode interference by adopting a compensation mode in the prior art, realize the acquisition of specific signal loss conditions and directly and dynamically express the conversion of the differential mode into the common mode.
To achieve the above technical object, the present invention provides a signal compensation method for common mode to differential mode conversion, comprising the following operations:
respectively adopting different differential pair wiring completion schemes to carry out electromagnetic field simulation;
obtaining different S parameters under different compensation modes;
and setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
Preferably, the differential pair routing completion scheme includes: non-filling length difference, centralized filling of end point and timely filling of length difference.
Preferably, the S parameter is obtained by generating an S4P file in Hspice software.
Preferably, the setting of Dynamic constraints is specifically to set Static Phase and Dynamic Phase in the constraint rules.
Preferably, the signals include SATA, SAS, UPI high speed signals.
The invention also discloses a signal compensation system for common mode and differential mode conversion, which comprises:
the electromagnetic simulation module is used for performing electromagnetic field simulation by respectively adopting different differential pair wiring compensation schemes;
the S parameter acquisition module is used for acquiring different S parameters in different compensation modes;
and the dynamic prompting module is used for setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
Preferably, the differential pair routing completion scheme includes: non-filling length difference, centralized filling of end point and timely filling of length difference.
Preferably, the S parameter is obtained by generating an S4P file in Hspice software.
Preferably, the setting of Dynamic constraints is specifically to set Static Phase and Dynamic Phase in the constraint rules.
Preferably, the signals include SATA, SAS, UPI high speed signals.
The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:
compared with the prior art, the invention carries out electromagnetic field simulation by adopting different differential pair routing compensation schemes, obtains different S parameters in different compensation modes, sets dynamic constraint and prompts dynamic phase errors in the actual routing process. The differential mode can be converted into the common mode to be directly and dynamically expressed; different from the prior visual experience impression, different compensation modes are expressed by an S parameter method. The differential mode is converted into the common mode under different compensation modes, and the common mode is directly highlighted in the high-speed line routing. The problem of adopt the compensation mode to restrain differential mode interference among the prior art is solved, realize obtaining the specific loss condition to the signal, convert the differential mode into the direct dynamic expression of common mode.
Drawings
Fig. 1 is a flowchart of a signal compensation method for common mode and differential mode conversion according to an embodiment of the present invention;
fig. 2 is a block diagram of a signal compensation system for common-mode and differential-mode conversion according to an embodiment of the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
A signal compensation method and system for common mode and differential mode conversion according to embodiments of the present invention are described in detail below with reference to the accompanying drawings.
As shown in fig. 1, an embodiment of the present invention discloses a signal compensation method for common-mode to differential-mode conversion, including the following operations:
respectively adopting different differential pair wiring completion schemes to carry out electromagnetic field simulation;
obtaining different S parameters under different compensation modes;
and setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
The differential mode signals are also called normal mode, series mode, line-to-line inductive and symmetric signals, and the like, and in the two-wire cable transmission loop, the ground voltage of each line is represented by symbols V1 and V2. The differential mode signal component is VDIFF. The pure differential mode signal is: v1 ═ V2; the sizes are equal, and the phase difference is 180 degrees; VDIFF-V1-V2, no current flows on the ground line because V1 and V2 are symmetrical to ground. All differential mode current (IDIFF) flows through the load. Differential mode interference invades and travels to and from two signal lines, the direction of which is consistent with the direction of signal current, one is generated by a signal source, the other is generated by electromagnetic induction in the transmission process, the differential mode interference is connected with the signal in series and in phase, and the interference is generally difficult to suppress.
The differential pair routing causes 24 mil phase deviation, and three completion schemes are adopted, which are respectively as follows: non-filling length difference, centralized filling of end point and timely filling of length difference. And respectively carrying out electromagnetic field simulation, and finally carrying out mixed-mode separation.
In Hspice software, an S4P file is obtained by opening different compensation modes.
And obtaining different Trace models according to different compensation modes.
Different S parameters are obtained under different compensation modes, and the insertion loss data can be visually compared by the different S parameters. It can be obtained that the specific values of the S parameter are-0.28696 dB, -0.30654dB, -0.30749dB respectively under the conditions of respectively not supplementing the length difference, intensively supplementing the end point and timely supplementing the length difference.
Aiming at the condition that differential mode signals are converted into common modes, Static Phase and Dynamic Phase are set in a constraint rule, Dynamic Phase errors can be prompted in the actual wiring process in the set settings, common mode signals can be compensated in time by performing line compensation at the prompted positions, and the unmatched timing sequence problem in the lines can be found in time.
The signals in the embodiment of the invention comprise high-speed signals such as SATA, SAS, UPI and the like.
According to the embodiment of the invention, different differential pair wiring completion schemes are adopted to carry out electromagnetic field simulation, different S parameters are obtained in different compensation modes, dynamic constraints are set, and dynamic phase errors are prompted in the actual wiring process. The differential mode can be converted into the common mode to be directly and dynamically expressed; different from the prior visual experience impression, different compensation modes are expressed by an S parameter method. The differential mode is converted into the common mode under different compensation modes, and the common mode is directly highlighted in the high-speed line routing. The problem of adopt the compensation mode to restrain differential mode interference among the prior art is solved, realize obtaining the specific loss condition to the signal, convert the differential mode into the direct dynamic expression of common mode.
As shown in fig. 2, an embodiment of the present invention further discloses a signal compensation system for common-mode to differential-mode conversion, where the system includes:
the electromagnetic simulation module is used for performing electromagnetic field simulation by respectively adopting different differential pair wiring compensation schemes;
the S parameter acquisition module is used for acquiring different S parameters in different compensation modes;
and the dynamic prompting module is used for setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
The differential pair routing completion scheme comprises: non-filling length difference, centralized filling of end point and timely filling of length difference.
The S parameter is obtained by generating an S4P file in Hspice software.
The setting of Dynamic constraints is specifically to set Static Phase and Dynamic Phase in a constraint rule.
The signals comprise SATA, SAS and UPI high-speed signals.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A method of signal compensation for common mode to differential mode conversion, comprising the operations of:
respectively adopting different differential pair wiring completion schemes to carry out electromagnetic field simulation;
obtaining different S parameters under different compensation modes;
and setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
2. The method of claim 1, wherein the differential pair routing alignment scheme comprises: non-filling length difference, centralized filling of end point and timely filling of length difference.
3. The method of claim 2, wherein the S parameter is obtained by generating an S4P file in Hspice software.
4. A method for signal compensation for common mode to differential mode conversion as claimed in claim 2 wherein said setting Dynamic constraints is specifically setting Static Phase and Dynamic Phase in the constraint rules.
5. A method of signal compensation for common mode to differential mode conversion according to any of claims 1 to 4 wherein said signals include SATA, SAS, UPI high speed signals.
6. A signal compensation system for common mode to differential mode conversion, the system comprising:
the electromagnetic simulation module is used for performing electromagnetic field simulation by respectively adopting different differential pair wiring compensation schemes;
the S parameter acquisition module is used for acquiring different S parameters in different compensation modes;
and the dynamic prompting module is used for setting dynamic constraint and prompting dynamic phase errors in the actual wiring process.
7. A signal compensation system for common mode to differential mode conversion as claimed in claim 6 wherein said differential pair routing alignment scheme comprises: non-filling length difference, centralized filling of end point and timely filling of length difference.
8. The system of claim 7, wherein the S parameter is obtained by generating an S4P file in Hspice software.
9. A signal compensation system for common mode to differential mode conversion according to claim 7 wherein said Dynamic constraints are set specifically by setting Static Phase and Dynamic Phase in the constraint rules.
10. A signal compensation system for common mode to differential mode conversion as claimed in claim 7 wherein said signal comprises SATA, SAS, UPI high speed signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811103773.7A CN109308391B (en) | 2018-09-20 | 2018-09-20 | Signal compensation method and system for common mode and differential mode conversion |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811103773.7A CN109308391B (en) | 2018-09-20 | 2018-09-20 | Signal compensation method and system for common mode and differential mode conversion |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109308391A CN109308391A (en) | 2019-02-05 |
| CN109308391B true CN109308391B (en) | 2022-02-18 |
Family
ID=65225001
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811103773.7A Active CN109308391B (en) | 2018-09-20 | 2018-09-20 | Signal compensation method and system for common mode and differential mode conversion |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109308391B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113836071B (en) * | 2021-11-26 | 2022-02-22 | 苏州浪潮智能科技有限公司 | Self-correcting circuit and signal self-correcting method |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06177926A (en) * | 1992-12-09 | 1994-06-24 | Nippon Telegr & Teleph Corp <Ntt> | Dc drift compensation circuit |
| CN102339245A (en) * | 2010-07-22 | 2012-02-01 | 鸿富锦精密工业（深圳）有限公司 | System and method for compensating circuit direct-current (DC) offset |
| CN102402639A (en) * | 2011-12-31 | 2012-04-04 | 清华大学 | Circuit simulation method based on local compensation |
| CN103220244A (en) * | 2011-12-20 | 2013-07-24 | 英特赛尔美国有限公司 | Method and system for compensating mode conversion over a communications channel |
| CN104125177A (en) * | 2014-07-17 | 2014-10-29 | 浪潮电子信息产业股份有限公司 | Design method of differential line winding compensation |
| CN104133971A (en) * | 2014-08-07 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | Design method for optimizing difference wire wrapping compensation |
| CN105426570A (en) * | 2015-10-28 | 2016-03-23 | 西安电子科技大学 | GaN HEMT large signal model improvement method based on active compensation sub-circuit |
-
2018
- 2018-09-20 CN CN201811103773.7A patent/CN109308391B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06177926A (en) * | 1992-12-09 | 1994-06-24 | Nippon Telegr & Teleph Corp <Ntt> | Dc drift compensation circuit |
| CN102339245A (en) * | 2010-07-22 | 2012-02-01 | 鸿富锦精密工业（深圳）有限公司 | System and method for compensating circuit direct-current (DC) offset |
| CN103220244A (en) * | 2011-12-20 | 2013-07-24 | 英特赛尔美国有限公司 | Method and system for compensating mode conversion over a communications channel |
| CN102402639A (en) * | 2011-12-31 | 2012-04-04 | 清华大学 | Circuit simulation method based on local compensation |
| CN104125177A (en) * | 2014-07-17 | 2014-10-29 | 浪潮电子信息产业股份有限公司 | Design method of differential line winding compensation |
| CN104133971A (en) * | 2014-08-07 | 2014-11-05 | 浪潮电子信息产业股份有限公司 | Design method for optimizing difference wire wrapping compensation |
| CN105426570A (en) * | 2015-10-28 | 2016-03-23 | 西安电子科技大学 | GaN HEMT large signal model improvement method based on active compensation sub-circuit |
Non-Patent Citations (2)
| Title |
|---|
| 基于差分高速信号的完整性分析及应用;朱园园;《万方数据库》;20171129;1-61 * |
| 高速差分传输线模型的分析与设计;赵志超;《万方数据库》;20120731;1-76 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109308391A (en) | 2019-02-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7493509B2 (en) | Intra-pair differential skew compensation method and apparatus for high-speed cable data transmission systems | |
| Aprile et al. | An eight-lane 7-Gb/s/pin source synchronous single-ended RX with equalization and far-end crosstalk cancellation for backplane channels | |
| US8560296B2 (en) | Printed circuit board via model design for high frequency performance | |
| CN109308391B (en) | Signal compensation method and system for common mode and differential mode conversion | |
| KR20220107956A (en) | Signal correction for serial interfaces | |
| KR20060034204A (en) | Data transmission device and data transmission method | |
| JP2017028489A (en) | Skew correction circuit, electronic device and skew correction method | |
| US8295408B2 (en) | Receiving apparatus and method for signal detection | |
| Jung et al. | A transmitter to compensate for crosstalk-induced jitter by subtracting a rectangular crosstalk waveform from data signal during the data transition time in coupled microstrip lines | |
| JP2007295021A (en) | Receiver and receiving method | |
| Lee et al. | A single-ended parallel transceiver with four-bit four-wire four-level balanced coding for the point-to-point dram interface | |
| US10079701B1 (en) | Three-valued signal generation device and three-valued signal generation method | |
| Choi et al. | A differentiating receiver with a transition-detecting DFE for dual-rank mobile memory interface | |
| US10754810B2 (en) | Interposer for peripheral component interconnect express generation 4 | |
| US6920183B2 (en) | Crosstalk equalization for input-output driver circuits | |
| CN210137305U (en) | Improved VGA topology design system | |
| Jeong et al. | Single-Ended Receiver-Side Crosstalk Cancellation With Independent Gain and Timing Control for Minimum Residual FEXT | |
| Vazgen et al. | High PSRR and accuracy receiver active equalizer | |
| Kim et al. | A PAM-4 Crosstalk Compensation Receiver Using an RC Circuit per Pin for $4\times 24$ Gb/s/Pin Single-Ended DRAM Interface | |
| Xiaoyan et al. | Signal Integrity Analysis and Simulation of High-Speed Circuit | |
| Park et al. | Current-integrating DFE with sub-UI ISI cancellation for multi-drop channels | |
| Pandey | Ensuring high signal quality in PCIe Gen3 channels | |
| Melikyan et al. | High accuracy equalization method for receiver active equalizer | |
| US9046550B2 (en) | Signal transmission lines with test pad | |
| EP3515025A1 (en) | Transmitting device, and system |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |