CN109274337A - A kind of method and device handling clock signal - Google Patents
A kind of method and device handling clock signal Download PDFInfo
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- CN109274337A CN109274337A CN201710585678.4A CN201710585678A CN109274337A CN 109274337 A CN109274337 A CN 109274337A CN 201710585678 A CN201710585678 A CN 201710585678A CN 109274337 A CN109274337 A CN 109274337A
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- 238000000034 method Methods 0.000 title claims abstract description 44
- 229910052701 rubidium Inorganic materials 0.000 claims abstract description 48
- IGLNJRXAVVLDKE-UHFFFAOYSA-N rubidium atom Chemical compound [Rb] IGLNJRXAVVLDKE-UHFFFAOYSA-N 0.000 claims abstract description 48
- 238000001914 filtration Methods 0.000 claims description 58
- 230000005669 field effect Effects 0.000 claims description 56
- 238000001514 detection method Methods 0.000 claims description 10
- 230000003321 amplification Effects 0.000 description 23
- 238000003199 nucleic acid amplification method Methods 0.000 description 23
- 239000003990 capacitor Substances 0.000 description 20
- 230000009977 dual effect Effects 0.000 description 11
- 230000000694 effects Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 5
- 230000005611 electricity Effects 0.000 description 3
- 241000826860 Trapezium Species 0.000 description 2
- 238000013016 damping Methods 0.000 description 2
- 238000009499 grossing Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000011946 reduction process Methods 0.000 description 2
- 239000000654 additive Substances 0.000 description 1
- 230000000996 additive effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B19/00—Generation of oscillations by non-regenerative frequency multiplication or division of a signal from a separate source
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Abstract
Invention describes a kind of method and devices for handling clock signal, which includes: a times frequency module, carry out process of frequency multiplication to the signal generated by rubidium atomic clock for the Clock Multiplier Factor according to setting, obtain reference clock signal；Clock generation module, for generating clock signal according to the reference clock signal.External reference clock by using rubidium atomic clock as signal source of clock, and the reference clock after the signal progress process of frequency multiplication for generating rubidium atomic clock as signal source of clock, instead of internal phase-locking frequency multiplication circuit in the prior art, to prevent the influence of internal phase-locking frequency multiplication circuit bring additional phase noise.
Description
Technical field
The present invention relates to signal source of clock technical field more particularly to a kind of method and devices for handling clock signal.
Background technique
With the volume transport rate of PTN (Packet Transport Network, Packet Transport Network) load bearing equipment
It improves, the higher requirement for improving signal-to-noise ratio also proposed to the clock performance of PTN device.Signal source of clock is as PTN device
Critical piece, the stability of signal source of clock and the signal-to-noise ratio of clock signal directly affect the performance of PTN device.
Phaselocked loop of the signal source of clock in the prior art generally inside is as reference clock and uses common nothing
Edge filter.But it can be because of the original of frequency multiplication of phase locked loop circuit as the reference clock of clock signal using internal phaselocked loop
Additive phase drift is thus generated, to directly affect the phase noise of the output signal of signal source of clock.In addition, using having no chance
Filter cannot filter out that harmonic wave is spuious, and the purity of frequency spectrum of the output signal of signal source of clock is caused to deteriorate, to influence clock letter
The stability and signal-to-noise ratio in number source.
Summary of the invention
It is a primary object of the present invention to propose a kind of method and device for handling clock signal, clock signal can be improved
Stability and signal-to-noise ratio, improve the quality of clock signal.
To achieve the above object, the present invention provides a kind of device for handling clock signal, described device includes:
Times frequency module carries out process of frequency multiplication to the signal generated by rubidium atomic clock for the Clock Multiplier Factor according to setting,
Obtain reference clock signal；
Clock generation module, for generating clock signal according to the reference clock signal.
Optionally, described times of frequency module, comprising: the first field-effect tube unit, the first tuned cell, the second field-effect tube list
Member and the second tuned cell；
The first field-effect tube unit amplifies place for the amplitude to the signal generated by rubidium atomic clock
Reason；
First tuned cell, for the signal generated by rubidium atomic clock described in after amplitude enhanced processing
It carries out that frequency is accompanied to be filtered, obtains the signal of the first setting frequency point；
The second field-effect tube unit, the amplitude for the signal to the first setting frequency point amplify processing；
Second tuned cell is carried out for the signal to the first setting frequency point after amplitude enhanced processing
Frequency multiplication filtering processing, obtains the reference clock signal of the second setting frequency point.
Optionally, described device further include:
Amplitude adjusting module, for the amplitude of the clock signal of generation to be adjusted in setting amplitude range.
Optionally, the amplitude adjusting module, comprising: amplitude detection unit, control unit and adjustable gain amplifying unit；
The amplitude detection unit, for detecting the amplitude information of the clock signal generated；
Described control unit, for the parameter of the adjustable gain amplifying unit to be arranged according to the amplitude information；
The adjustable gain amplifying unit, parameter for being arranged according to described control unit is by the width of the clock signal
Degree is adjusted in setting amplitude range.
Optionally, described device further include:
Frequency-selecting and filtering module, for amplifying processing, and frequency-selecting to the amplitude Jing Guo amplitude clock signal adjusted
Filter out the clock signal of third setting frequency point.
In addition, to achieve the above object, the present invention also proposes a kind of method for handling clock signal, which comprises
Process of frequency multiplication is carried out to the signal generated by rubidium atomic clock according to the Clock Multiplier Factor of setting, obtains reference clock letter
Number；
Clock signal is generated according to the reference clock signal.
Optionally, the Clock Multiplier Factor according to setting carries out process of frequency multiplication to the signal generated by rubidium atomic clock, obtains
To reference clock signal, comprising:
Processing is amplified to the amplitude of the signal generated by rubidium atomic clock；
Frequency multiplication filtering processing is carried out by the signal that rubidium atomic clock generates to described in after amplitude enhanced processing, is obtained
The signal of first setting frequency point；
Processing is amplified to the amplitude of the signal of the first setting frequency point；
Frequency multiplication filtering processing is carried out to the signal of the first setting frequency point after amplitude enhanced processing, obtains second
Set the reference clock signal of frequency point.
Optionally, the method also includes:
The amplitude of the clock signal of generation is adjusted in setting amplitude range.
Optionally, the amplitude of the clock signal by generation is adjusted in setting amplitude range, comprising:
Detect the amplitude information of the clock signal generated；
The amplitude of the clock signal of generation is adjusted in setting amplitude range according to the amplitude information.
Optionally, the method also includes:
Processing is amplified to the amplitude Jing Guo amplitude clock signal adjusted, and frequency-selective filtering goes out third setting frequency point
Clock signal.
The method and device of processing clock signal proposed by the present invention, by using rubidium atomic clock as signal source of clock
External reference clock, and the reference clock after the signal progress process of frequency multiplication that rubidium atomic clock is generated as signal source of clock, generation
Internal phase-locking frequency multiplication circuit in the prior art is replaced, to prevent internal phase-locking frequency multiplication circuit bring additional phase noise
Influence.It is adjusted by the amplitude to clock signal, so that the spuious of clock signal is inhibited.At frequency-selective filtering
Reason, further filters out the band stray frequency signal in clock signal, improves the stability and signal-to-noise ratio of clock signal.
Detailed description of the invention
Fig. 1 is the composed structure schematic diagram of the device of the processing clock signal of first embodiment of the invention；
Fig. 2 is the composed structure schematic diagram of the device of the processing clock signal of second embodiment of the invention；
Fig. 3 is the composed structure schematic diagram of the device of the processing clock signal of third embodiment of the invention；
Fig. 4 is the flow chart of the method for the processing clock signal of fourth embodiment of the invention；
Fig. 5 is the composed structure schematic diagram of the system of the processing clock signal of fifth embodiment of the invention.
Specific embodiment
Further to illustrate the present invention to reach the technical means and efficacy that predetermined purpose is taken, below in conjunction with attached drawing
And preferred embodiment, the present invention is described in detail as after.
First embodiment of the invention, it is a kind of handle clock signal device, as shown in Figure 1, described device specifically include with
Lower component part:
1) times frequency module 101 carries out frequency multiplication to the signal generated by rubidium atomic clock for the Clock Multiplier Factor according to setting
Processing, obtains reference clock signal.
Specifically, external reference clock of the rubidium atomic clock as signal source of clock is used in the present embodiment, to substitute
Reference clock of the internal phaselocked loop as signal source of clock used in the prior art.In the present embodiment, it is also necessary to rubidium
Atomic clock generate signal according to setting Clock Multiplier Factor carry out process of frequency multiplication, and using the signal after process of frequency multiplication as when
The reference clock of clock signal source.Preferably, times frequency module 101 uses the secondary processing for amplifying secondary frequency multiplication in the present embodiment.
Further, times frequency module 101, specifically includes: the first field-effect tube unit, the first tuned cell, second effect
Answer pipe unit and the second tuned cell；
The first field-effect tube unit amplifies place for the amplitude to the signal generated by rubidium atomic clock
Reason.
By adjusting the resistance value of the D.C. resistance in field-effect tube, field-effect tube can be adjusted to the work of amplitude amplification
Make state.It is amplified by the amplitude to signal, can be nonlinear signal by linear signal discrete, to generate humorous
Wave component.
First tuned cell, for the signal generated by rubidium atomic clock described in after amplitude enhanced processing
Frequency multiplication filtering processing is carried out, the signal of the first setting frequency point is obtained.
The signal of the first setting frequency point is selected from the signal after amplitude enhanced processing.First setting frequency point and rubidium
The frequency point for the signal that atomic clock generates is integral multiple relation.
The second field-effect tube unit, the amplitude for the signal to the first setting frequency point amplify processing.
Second tuned cell is carried out for the signal to the first setting frequency point after amplitude enhanced processing
Frequency multiplication filtering processing, obtains the reference clock signal of the second setting frequency point.
First, which sets frequency point and second, sets frequency point as integral multiple relation.
2) clock generation module 102, for generating clock signal according to the reference clock signal.
Specifically, clock generation module 102, is used for:
Clock signal is generated according to the reference clock signal of the second setting frequency point.
Clock generation module 102 generates clock signal in the way of signal source of clock in the prior art.This reality
The difference for applying example and the prior art is that the present embodiment is believed the signal generated by using rubidium atomic clock as reference clock
Number, instead of internal phase-locking frequency multiplication circuit in the prior art, so that having prevented internal phase-locking frequency multiplication circuit bring adds phase
The influence of position noise.
Preferably, it in order to improve the signal-to-noise ratio of clock signal and improve the quality of clock signal, can be adjusted by amplitude
Module 103 and/or the clock signal of 104 pairs of frequency-selecting and filtering module generations carry out subsequent noise reduction process operation.
Amplitude adjusting module 103, for the amplitude of the clock signal of generation to be adjusted in setting amplitude range.
Specifically, amplitude adjusting module 103, comprising: amplitude detection unit, control unit and adjustable gain amplifying unit；
The amplitude detection unit, for detecting the amplitude information of the clock signal generated；
Described control unit, for the parameter of the adjustable gain amplifying unit to be arranged according to the amplitude information；
The adjustable gain amplifying unit, parameter for being arranged according to described control unit is by the width of the clock signal
Degree is adjusted in setting amplitude range.The purpose that the amplitude of the clock signal is adjusted in setting amplitude range is clock synchronization
The amplitude of clock signal is smoothed.
It is adjusted by amplitude of the amplitude adjusting module 103 to clock signal, so that the spuious of clock signal is pressed down
System.
Frequency-selecting and filtering module 104, the amplitude for the clock signal to generation amplifies processing, and frequency-selective filtering goes out
The clock signal of three setting frequency points.
Specifically, frequency-selecting and filtering module 104 is made of field-effect tube and single-tuned circuit.
The field-effect tube is for amplifying processing to the amplitude of clock signal.By adjusting the electricity in field-effect tube
Resistance, so that field-effect tube is in amplitude magnifying state.Resistance value is bigger, and amplification factor is bigger.
The single-tuned circuit is made of tunable capacitor and inductance in parallel, and the value by adjusting tunable capacitor makes single tuning
Circuit is in the maximum impedance of required frequency signal, so that gain amplifier reaches maximum, and then carries out frequency-selecting filter to clock signal
Wave processing, filters out the signal of required frequency from clock signal.
By adjusting the parameter of the tunable capacitor in single-tuned circuit, in conjunction with the field-effect tube, so that frequency-selective filtering mould
Block 104 is in optimal tuning state, to filter out the band stray signal in clock signal.
Further, the processing of the secondary secondary frequency-selecting of amplification can be used in frequency-selecting and filtering module 104, i.e. clock signal first passes through
The first time amplitude enhanced processing of field-effect tube, and after the processing of the first time frequency-selective filtering of single-tuned circuit；Using field
Second of amplitude enhanced processing of effect pipe, and handled by second of frequency-selective filtering of single-tuned circuit, to preferably mention
The noise ratio of high clock signal.
Frequency-selecting and filtering module 104 filters out side frequency component signal unwanted in clock signal, it is ensured that the clock of output
Interference signal in signal is minimum.
In practical applications, the amplitude adjusting module that can be used alone 103 or the clock of 104 pairs of frequency-selecting and filtering module generations letter
Number carry out noise reduction process, the clock signal of generation can also successively be passed through amplitude adjusting module 103 and frequency-selecting and filtering module 104,
To reach more preferably noise reduction effect.
Second embodiment of the invention, it is a kind of handle clock signal device, as shown in Fig. 2, described device specifically include with
Lower component part:
Clock generation module 102, for generating clock signal according to reference clock signal.
Amplitude adjusting module 103, for the amplitude of the clock signal of generation to be adjusted in setting amplitude range.
Specifically, amplitude adjusting module 103, comprising: amplitude detection unit, control unit and adjustable gain amplifying unit；
The amplitude detection unit, for detecting the amplitude information of the clock signal generated；
Described control unit, for the parameter of the adjustable gain amplifying unit to be arranged according to the amplitude information；
The adjustable gain amplifying unit, parameter for being arranged according to described control unit is by the width of the clock signal
Degree is adjusted in setting amplitude range.The purpose that the amplitude of the clock signal is adjusted in setting amplitude range is clock synchronization
The amplitude of clock signal is smoothed.
It is adjusted by amplitude of the amplitude adjusting module 103 to clock signal, so that the spuious of clock signal is pressed down
System, to improve the signal-to-noise ratio of clock signal.
Preferably, in order to avoid using internal phase-locking frequency multiplication circuit as the reference clock of clock generation module 102,
Reference clock letter of the signal as clock generation module 102 rubidium atomic clock generation and after process of frequency multiplication can be used
Number, to prevent the influence of internal phase-locking frequency multiplication circuit bring additional phase noise.
Specifically, increasing times frequency module 101 in said device, times frequency module 101 is used for: according to the Clock Multiplier Factor of setting
Process of frequency multiplication is carried out to the signal generated by rubidium atomic clock, obtains reference clock signal.
Further, times frequency module 101, specifically includes: the first field-effect tube unit, the first tuned cell, second effect
Answer pipe unit and the second tuned cell；
The first field-effect tube unit amplifies place for the amplitude to the signal generated by rubidium atomic clock
Reason.
By adjusting the resistance value of the D.C. resistance in field-effect tube, field-effect tube can be adjusted to the work of amplitude amplification
Make state.It is amplified by the amplitude to signal, can be nonlinear signal by linear signal discrete, to generate humorous
Wave component.
First tuned cell, for the signal generated by rubidium atomic clock described in after amplitude enhanced processing
Frequency multiplication filtering processing is carried out, the signal of the first setting frequency point is obtained.
The signal of the first setting frequency point is selected from the signal after amplitude enhanced processing.First setting frequency point and rubidium
The frequency point for the signal that atomic clock generates is integral multiple relation.
The second field-effect tube unit, the amplitude for the signal to the first setting frequency point amplify processing.
Second tuned cell is carried out for the signal to the first setting frequency point after amplitude enhanced processing
Frequency multiplication filtering processing, obtains the reference clock signal of the second setting frequency point.
First, which sets frequency point and second, sets frequency point as integral multiple relation.
When increasing times frequency module 101 in described device, clock generation module 102 is according to the second setting frequency
The reference clock signal of point generates clock signal.
Preferably, in order to further filter out the band stray frequency signal in clock signal, the stabilization of clock signal is improved
Property and signal-to-noise ratio, in said device increase frequency-selecting and filtering module 104.
Frequency-selecting and filtering module 104 for amplifying processing to the amplitude Jing Guo amplitude clock signal adjusted, and is selected
Frequency filters out the clock signal of third setting frequency point.
Specifically, frequency-selecting and filtering module 104 is made of field-effect tube and single-tuned circuit.
The field-effect tube is for amplifying processing to the amplitude of clock signal.By adjusting the electricity in field-effect tube
Resistance, so that field-effect tube is in amplitude magnifying state.Resistance value is bigger, and amplification factor is bigger.
The single-tuned circuit is made of tunable capacitor and inductance in parallel, and the value by adjusting tunable capacitor makes single tuning
Circuit is in the maximum impedance of required frequency signal, so that gain amplifier reaches maximum, and then carries out frequency-selecting filter to clock signal
Wave processing, filters out the signal of required frequency from clock signal.
By adjusting the parameter of the tunable capacitor in single-tuned circuit, in conjunction with the field-effect tube, so that frequency-selective filtering mould
Block 104 is in optimal tuning state, to filter out the band stray signal in clock signal.
Further, the processing of the secondary secondary frequency-selecting of amplification can be used in frequency-selecting and filtering module 104, i.e. clock signal first passes through
The first time amplitude enhanced processing of field-effect tube, and after the processing of the first time frequency-selective filtering of single-tuned circuit；Using field
Second of amplitude enhanced processing of effect pipe, and handled by second of frequency-selective filtering of single-tuned circuit, to preferably mention
The noise ratio of high clock signal.
Frequency-selecting and filtering module 104 filters out side frequency component signal unwanted in clock signal, it is ensured that the clock of output
Interference signal in signal is minimum.
In practical applications, times frequency module 101, clock generation module 102, amplitude adjusting module be can be used simultaneously
103 and frequency-selecting and filtering module 104, to reach more preferably noise reduction effect.
Third embodiment of the invention, it is a kind of handle clock signal device, as shown in figure 3, described device specifically include with
Lower component part:
Clock generation module 102, for generating clock signal according to reference clock signal.
Frequency-selecting and filtering module 104, the amplitude for the clock signal to generation amplifies processing, and frequency-selective filtering goes out
The clock signal of three setting frequency points.
Specifically, frequency-selecting and filtering module 104 is made of field-effect tube and single-tuned circuit.
The field-effect tube is for amplifying processing to the amplitude of clock signal.By adjusting the electricity in field-effect tube
Resistance, so that field-effect tube is in amplitude magnifying state.Resistance value is bigger, and amplification factor is bigger.
The single-tuned circuit is made of tunable capacitor and inductance in parallel, and the value by adjusting tunable capacitor makes single tuning
Circuit is in the maximum impedance of required frequency signal, so that gain amplifier reaches maximum, and then carries out frequency-selecting filter to clock signal
Wave processing, filters out the signal of required frequency from clock signal.
By adjusting the parameter of the tunable capacitor in single-tuned circuit, in conjunction with the field-effect tube, so that frequency-selective filtering mould
Block 104 is in optimal tuning state, to filter out the band stray signal in clock signal.
Further, the processing of the secondary secondary frequency-selecting of amplification can be used in frequency-selecting and filtering module 104, i.e. clock signal first passes through
The first time amplitude enhanced processing of field-effect tube, and after the processing of the first time frequency-selective filtering of single-tuned circuit；Using field
Second of amplitude enhanced processing of effect pipe, and handled by second of frequency-selective filtering of single-tuned circuit, to preferably mention
The noise ratio of high clock signal.
Frequency-selecting and filtering module 104 filters out side frequency component signal unwanted in clock signal, it is ensured that the clock of output
Interference signal in signal is minimum.
Preferably, in order to avoid using internal phase-locking frequency multiplication circuit as the reference clock of clock generation module 102,
Reference clock letter of the signal as clock generation module 102 rubidium atomic clock generation and after process of frequency multiplication can be used
Number, to prevent the influence of internal phase-locking frequency multiplication circuit bring additional phase noise.
Specifically, increasing times frequency module 101 in said device, times frequency module 101 is used for: according to the Clock Multiplier Factor of setting
Process of frequency multiplication is carried out to the signal generated by rubidium atomic clock, obtains reference clock signal.
Further, times frequency module 101, specifically includes: the first field-effect tube unit, the first tuned cell, second effect
Answer pipe unit and the second tuned cell；
The first field-effect tube unit amplifies place for the amplitude to the signal generated by rubidium atomic clock
Reason.
By adjusting the resistance value of the D.C. resistance in field-effect tube, field-effect tube can be adjusted to the work of amplitude amplification
Make state.It is amplified by the amplitude to signal, can be nonlinear signal by linear signal discrete, to generate humorous
Wave component.
First tuned cell, for the signal generated by rubidium atomic clock described in after amplitude enhanced processing
Frequency multiplication filtering processing is carried out, the signal of the first setting frequency point is obtained.
The signal of the first setting frequency point is selected from the signal after amplitude enhanced processing.First setting frequency point and rubidium
The frequency point for the signal that atomic clock generates is integral multiple relation.
The second field-effect tube unit, the amplitude for the signal to the first setting frequency point amplify processing.
Second tuned cell is carried out for the signal to the first setting frequency point after amplitude enhanced processing
Frequency multiplication filtering processing, obtains the reference clock signal of the second setting frequency point.
First, which sets frequency point and second, sets frequency point as integral multiple relation.
When increasing times frequency module 101 in described device, clock generation module 102 is according to the second setting frequency
The reference clock signal of point generates clock signal.
Preferably, in order to which the spuious of the clock signal to generation inhibits, module is adjusted in described device increasing degree
103。
Amplitude adjusting module 103, for the amplitude of the clock signal of generation to be adjusted in setting amplitude range, and by width
It spends clock signal adjusted and is sent to frequency-selecting and filtering module 104.
Specifically, amplitude adjusting module 103, comprising: amplitude detection unit, control unit and adjustable gain amplifying unit；
The amplitude detection unit, for detecting the amplitude information of the clock signal generated；
Described control unit, for the parameter of the adjustable gain amplifying unit to be arranged according to the amplitude information；
The adjustable gain amplifying unit, parameter for being arranged according to described control unit is by the width of the clock signal
Degree is adjusted in setting amplitude range.The purpose that the amplitude of the clock signal is adjusted in setting amplitude range is clock synchronization
The amplitude of clock signal is smoothed.
It is adjusted by amplitude of the amplitude adjusting module 103 to clock signal, so that the spuious of clock signal is pressed down
System, to improve the signal-to-noise ratio of clock signal.
In practical applications, times frequency module 101, clock generation module 102, amplitude adjusting module be can be used simultaneously
103 and frequency-selecting and filtering module 104, to reach more preferably noise reduction effect.
Fourth embodiment of the invention, a method of processing clock signal, as shown in figure 4, the method specifically include with
Lower step:
Step S401: process of frequency multiplication is carried out to the signal generated by rubidium atomic clock according to the Clock Multiplier Factor of setting, is obtained
Reference clock signal.
Specifically, using rubidium atomic clock as the reference clock of signal source of clock in the present embodiment, thus instead of existing
There is reference clock of the internal phaselocked loop as signal source of clock used in technology.In the present embodiment, it is also necessary to rubidium atom
The signal that clock generates carries out process of frequency multiplication according to the Clock Multiplier Factor of setting, and believes the signal after process of frequency multiplication as clock
The reference clock in number source.Preferably, in the present embodiment using the processing mode of secondary amplification secondary frequency multiplication.
Further, step S401 is specifically included:
Step A1: processing is amplified to the amplitude of the signal generated by rubidium atomic clock.
It is amplified by the amplitude to signal, can be nonlinear signal by linear signal discrete, to generate
Harmonic component.
Step A2: it is carried out at frequency multiplication filtering to described in after amplitude enhanced processing by the signal that rubidium atomic clock generates
Reason, obtains the signal of the first setting frequency point.
The signal of the first setting frequency point is selected from the signal after amplitude enhanced processing.First setting frequency point and rubidium
The frequency point for the signal that atomic clock generates is integral multiple relation.
Step A3: processing is amplified to the amplitude of the signal of the first setting frequency point.
Step A4: carrying out frequency multiplication filtering processing to the signal of the first setting frequency point after amplitude enhanced processing,
Obtain the reference clock signal of the second setting frequency point.
First, which sets frequency point and second, sets frequency point as integral multiple relation.
Step S402: clock signal is generated according to the reference clock signal.
Specifically, step S402, comprising:
Clock signal is generated according to the reference clock signal of the second setting frequency point.
Step S403: the amplitude of the clock signal of generation is adjusted in setting amplitude range.
Specifically, step S403, comprising:
The amplitude information of the clock signal generated is detected, and according to the amplitude information by the amplitude of the clock signal of generation
It is adjusted in setting amplitude range.
Step S404: processing is amplified to the amplitude Jing Guo amplitude clock signal adjusted, needed for frequency-selective filtering goes out
The clock signal of frequency point, and export the clock signal of required frequency point.
Specifically, step S404 is using the secondary frequency-selecting of secondary amplification, i.e. clock signal first time for first passing through field-effect tube
Amplitude enhanced processing, and after the processing of the first time frequency-selective filtering of single-tuned circuit, using second of width of field-effect tube
Enhanced processing is spent, and is handled by second of frequency-selective filtering of single-tuned circuit, the clock signal of required frequency point is obtained, thus more
The noise ratio of good raising clock signal.
Third embodiment of the invention, it is a kind of handle clock signal system, as shown in figure 5, the system specifically include with
Lower component part: rubidium atomic clock 501, frequency multiplier 502, DDS (Direct Digital Synthesizer, Direct Digital frequency
Rate synthesizer) it signal source of clock 503, peak detector 504, ARM (Acorn RISC Machine) controller 505, can adjust
Beneficial amplifier 506 and for no reason at all LC frequency-selecting tuned amplifier 507.
Wherein, rubidium atomic clock 501, for generating the frequency signal of 10MHz.
Frequency multiplier 502 successively carries out × 5 process of frequency multiplication and × 10 process of frequency multiplication for the frequency signal to 10MHz, obtains
The frequency signal of 100MHz.
DDS signal source of clock 503, it is raw for the frequency signal according to 100MHz, and under the action of ARM controller 505
At clock signal.
Peak detector 504, for detecting the signal amplitude of clock signal.
ARM controller 505, for adjusting variable gain amplifier 506 according to the signal amplitude of the clock signal detected
Parameter.
Variable gain amplifier 506, for being smoothed according to amplitude of the parameter after adjusting to clock signal, with
Make the amplitude of clock signal within the scope of predetermined amplitude.
LC frequency-selecting tuned amplifier 507, for filtering out the band stray frequency in the clock signal after smoothing processing
Signal, and export the clock signal for having filtered out band stray frequency signal.
Specifically, frequency multiplier 502 is by VHF (Very High Frequency, very high frequency(VHF)) dual gate FET and UHF
The second level frequency multiplier of (Ultra High Frequency, superfrequency) dual gate FET composition.
At the second level frequency multiplication of 5 frequencys multiplication and 2 frequencys multiplication of the frequency signal for the 10MHz that rubidium atomic clock 501 generates Jing Guo frequency multiplier
After reason, the frequency signal of 100MHz, and the reference clock as DDS signal source of clock 503 are obtained, it is in the prior art to replace
The included phase-locking frequency multiplication circuit of DDS chip.
In actual use, DC power supply passes through VHF double grid field of the filter inductance capacitor filter into frequency multiplier 502
Effect pipe and the power supply of UHF dual gate FET.
Further, frequency multiplier 502 specifically include: VHF dual gate FET, UHF dual gate FET, the first tuning
Circuit and the second tuning circuit.
The second level times of 5 frequencys multiplication and 2 frequencys multiplication of the frequency signal for the 10MHz that the rubidium atomic clock 501 generates Jing Guo frequency multiplier
After frequency is handled, the frequency signal of 100MHz is obtained, comprising:
Step C1: the resistance value by adjusting the D.C. resistance in VHF dual gate FET, by VHF dual gate FET
Working condition be adjusted to amplitude magnifying state, to control the amplitude amplification factor of VHF dual gate FET.VHF double grid field
Effect pipe amplifies processing to the amplitude of the frequency signal of 10MHz according to the amplitude amplification factor, and will be after enhanced processing
Frequency signal is sent to the first tuning circuit.
The C2: the first tuning circuit of step is made of capacitor and inductance, and capacitor is connected with inductance in parallel, by adjusting inductance
The first resonance circuit is made to be in the resonance point of 50MHz with the value of capacitor.First resonance circuit is from after amplitude enhanced processing
Frequency signal in filter out the frequency signal of 50MHz.
Step C3: the resistance value by adjusting the D.C. resistance in UHF dual gate FET, by UHF dual gate FET
Working condition be adjusted to amplitude magnifying state, to control the amplitude amplification factor of UHF dual gate FET.UHF double grid field
Effect pipe amplifies processing to the amplitude of the frequency signal of 50MHz according to the amplitude amplification factor, and will be after enhanced processing
Frequency signal is sent to the second tuning circuit.
The C4: the second tuning circuit of step is made of capacitor and inductance, and capacitor is connected with inductance in parallel, by adjusting inductance
The second resonance circuit is made to be in the resonance point of 100MHz with the value of capacitor.Second resonance circuit is from after amplitude enhanced processing
Frequency signal in filter out the frequency signal of 100MHz.
Further, peak detector 504 is used to detect the signal amplitude of clock signal, converts number for analog voltage
Voltage, and digital voltage is inputed into ARM controller 505.Variable gain amplifier 506 is realized using the method for hardware, is not adopted
The circuit of AGC is designed with discrete electronic component, but uses integrated chip design, passes through resistance trapezium network composition one
A damping matrix.ARM controller 505 is controlled according to voltage difference of the digital voltage to variable gain amplifier 506, by logical
The damping matrix for crossing resistance trapezium network composition is adjusted the amplitude of clock signal.
Further, LC frequency-selecting tuned amplifier 507 includes: the first field-effect tube, third tuning circuit, the second field-effect
Pipe and the 4th tuning circuit.
The LC frequency-selecting tuned amplifier 507 is used to filter out the band stray frequency in the clock signal after smoothing processing
Rate signal, and export the clock signal for having filtered out band stray frequency signal, comprising:
Step D1: by adjusting the resistance value in the first field-effect tube, so that the first field-effect tube is in amplitude amplification shape
State, so that it is determined that the amplitude amplification coefficient of the first field-effect tube.First field-effect tube believes clock according to the amplitude amplification factor
Number amplitude amplify processing, and the clock signal after enhanced processing is sent to third tuning circuit.
Step D2: third tuning circuit is single-tuned circuit, is made of tunable capacitor and inductance in parallel, can by adjusting
The maximum impedance for adjusting the value of capacitor that resonant tank is made to be in desired signal, gain amplifier reach maximum, carry out to clock signal
Frequency-selective filtering processing filters out the clock signal of specific frequency from clock signal, and the clock of the specific frequency after filtering out is believed
Number it is delivered to the second field-effect tube.
Step D3: by adjusting the resistance value in the second field-effect tube, so that the second field-effect tube is in amplitude amplification shape
State, so that it is determined that the amplitude amplification coefficient of the second field-effect tube.Second field-effect tube believes clock according to the amplitude amplification factor
Number amplitude amplify processing, and the clock signal after enhanced processing is sent to the 4th tuning circuit.
The D4: the four tuning circuit of step is single-tuned circuit, is made of tunable capacitor and inductance in parallel, can by adjusting
The maximum impedance for adjusting the value of capacitor that resonant tank is made to be in desired signal, gain amplifier reach maximum, carry out to clock signal
Frequency-selective filtering processing, filters out the clock signal of specific frequency from clock signal.
Certain harmonic components signal in received clock signal is filtered out and is carried out by LC frequency-selecting tuned amplifier 507
Amplification filters out unwanted side frequency component signal after amplification filtering processing, it is ensured that the interference letter in the signal of output
Number minimum.
The method and device for the processing clock signal introduced in the embodiment of the present invention, by using rubidium atomic clock as clock
The external reference clock of signal source, and the reference after the signal progress process of frequency multiplication that rubidium atomic clock is generated as signal source of clock
Clock, instead of internal phase-locking frequency multiplication circuit in the prior art, so that it is additional to have prevented internal phase-locking frequency multiplication circuit bring
The influence of phase noise.It is adjusted by the amplitude to clock signal, so that the spuious of clock signal is inhibited.Pass through choosing
Frequency is filtered, and further filters out the band stray frequency signal in clock signal, improves the stability and noise of clock signal
Than.
By the explanation of specific embodiment, the present invention can should be reached technological means that predetermined purpose is taken and
Effect is able to more deeply and specifically understand, however appended diagram is only to provide reference and description and is used, and is not used to this
Invention limits.
Claims (10)
1. a kind of device for handling clock signal, which is characterized in that described device includes:
Times frequency module carries out process of frequency multiplication to the signal generated by rubidium atomic clock for the Clock Multiplier Factor according to setting, obtains
Reference clock signal；
Clock generation module, for generating clock signal according to the reference clock signal.
2. the device of processing clock signal according to claim 1, which is characterized in that described times of frequency module, comprising: first
Field-effect tube unit, the first tuned cell, the second field-effect tube unit and the second tuned cell；
The first field-effect tube unit amplifies processing for the amplitude to the signal generated by rubidium atomic clock；
First tuned cell, for being carried out to described in after amplitude enhanced processing by the signal that rubidium atomic clock generates
It accompanies frequency to be filtered, obtains the signal of the first setting frequency point；
The second field-effect tube unit, the amplitude for the signal to the first setting frequency point amplify processing；
Second tuned cell carries out frequency multiplication for the signal to the first setting frequency point after amplitude enhanced processing
Filtering processing, obtains the reference clock signal of the second setting frequency point.
3. the device of processing clock signal according to claim 1, which is characterized in that described device further include:
Amplitude adjusting module, for the amplitude of the clock signal of generation to be adjusted in setting amplitude range.
4. the device of processing clock signal according to claim 3, which is characterized in that the amplitude adjusting module, comprising:
Amplitude detection unit, control unit and adjustable gain amplifying unit；
The amplitude detection unit, for detecting the amplitude information of the clock signal generated；
Described control unit, for the parameter of the adjustable gain amplifying unit to be arranged according to the amplitude information；
The adjustable gain amplifying unit, parameter for being arranged according to described control unit is by the amplitude tune of the clock signal
It is whole to arrive in setting amplitude range.
5. the device of processing clock signal according to claim 3, which is characterized in that described device further include:
Frequency-selecting and filtering module, for amplifying processing, and frequency-selective filtering to the amplitude Jing Guo amplitude clock signal adjusted
The clock signal of third setting frequency point out.
6. a kind of method for handling clock signal, which is characterized in that the described method includes:
Process of frequency multiplication is carried out to the signal generated by rubidium atomic clock according to the Clock Multiplier Factor of setting, obtains reference clock signal；
Clock signal is generated according to the reference clock signal.
7. the method for processing clock signal according to claim 6, which is characterized in that the Clock Multiplier Factor according to setting
Process of frequency multiplication is carried out to the signal generated by rubidium atomic clock, obtains reference clock signal, comprising:
Processing is amplified to the amplitude of the signal generated by rubidium atomic clock；
Frequency multiplication filtering processing is carried out by the signal that rubidium atomic clock generates to described in after amplitude enhanced processing, obtains first
Set the signal of frequency point；
Processing is amplified to the amplitude of the signal of the first setting frequency point；
Frequency multiplication filtering processing is carried out to the signal of the first setting frequency point after amplitude enhanced processing, obtains the second setting
The reference clock signal of frequency point.
8. the method for processing clock signal according to claim 6, which is characterized in that the method also includes:
The amplitude of the clock signal of generation is adjusted in setting amplitude range.
9. the method for processing clock signal according to claim 8, which is characterized in that the clock signal by generation
Amplitude is adjusted in setting amplitude range, comprising:
Detect the amplitude information of the clock signal generated；
The amplitude of the clock signal of generation is adjusted in setting amplitude range according to the amplitude information.
10. the method for processing clock signal according to claim 8, which is characterized in that the method also includes:
Processing amplified to the amplitude Jing Guo amplitude clock signal adjusted, and frequency-selective filtering go out third setting frequency point when
Clock signal.
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| CN201710585678.4A CN109274337A (en) | 2017-07-18 | 2017-07-18 | A kind of method and device handling clock signal |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117389381A (en) * | 2023-12-08 | 2024-01-12 | 成都世源频控技术股份有限公司 | Device and method for reducing direct digital frequency synthesis phase noise |
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Application publication date: 20190125 |