CN109243971B - 一种半导体器件介质膜低角度蚀刻方法 - Google Patents
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Abstract
本发明涉及一种半导体器件介质膜低角度蚀刻方法,依次对器件介质膜进行光刻、湿法蚀刻、干法蚀刻、去胶、去残胶及水洗工艺。通过光刻、湿法蚀刻、干法蚀刻、去胶、去残胶及水洗工艺,降低了二氧化硅或氮化硅的蚀刻角度,即使在薄金属层沉积情况下也实现了良好的金属连接,避免金属断层及空洞的出现,不仅大大提高器件的可靠性,也节约了金属的用量和成本。
Description
技术领域
本发明涉及半导体器件的制造方法,特别是涉及一种半导体器件介质膜低角度蚀刻方法。
背景技术
目前,在集成电路芯片制作过程中,介质膜(如二氧化硅或氮化硅)的作用是非常重要的,常作为杂质选择扩散的掩蔽膜、电容器的介电材料、器件或导线的电绝缘和隔离、器件的表面保护和钝化作用等。在芯片制作过程中需要多次进行介质膜的沉积和刻蚀工艺。
在半导体行业,大多采用湿法蚀刻工艺或干法蚀刻工艺对二氧化硅或氮化硅膜进行蚀刻。湿法蚀刻即利用特定的化学溶液让待蚀刻薄膜未被光刻胶覆盖的部分分解,并转成可溶于此溶液的化合物加以排除,从而达到蚀刻的目的。
参见图3,是湿法蚀刻工艺的结构示意图,其中,1为衬底,2为金属层一,3为SiO2介质层,4为光刻胶层,5为金属层二。由于湿法蚀刻是各向同性的,蚀刻液在做纵向蚀刻时,侧向的蚀刻也同时发生;蚀刻时间过短,易造成底部介质膜的残留;蚀刻时间过长,易造成图形的咬边现象,参见图3中(a),在31处形成倒梯形。
参见图4,是干法蚀刻工艺的结构示意图,其中,1为衬底,2为金属层一,3为SiO2介质层,4为光刻胶层,5为金属层二。干法蚀刻是将蚀刻气体利用辉光放电产生等离子体,对待蚀刻区域的薄膜进行蚀刻。干法蚀刻方向性较强,在进行纵向蚀刻时,横向蚀刻较小,薄膜蚀刻的蚀刻角度较大,垂直性好,如图4中(a)所示。在干法蚀刻过程中,即使采用CHF3或CH3F等含H基较多的蚀刻气体进行蚀刻时,薄膜蚀刻的角度也是较大的,一般是在75°以上。
二氧化硅或氮化硅蚀刻后,常需在其上用PVD工艺沉积上层金属以实现上下金属层之间的导通。这时若仅采用湿法蚀刻工艺,由于咬边现象,将会出现金属层二的断层或薄层,见图3中(b)所示的61处;若仅采用干法蚀刻工艺,由于蚀刻角度较大,将会出现金属层二的断层或薄层,见图4中(b)所示的62处。
为了解决上述问题的方法,一般是沉积较厚的金属膜来避免金属断层或层薄,但这又会造成金属的用量和成本增加;以及,因金属薄弱处或空洞处等(见图3中(c)的71处为金属薄层处,图3中(c)的81处为空洞处;见图4中(c)的72处为金属薄层处)引起的金属连接可靠性问题。
发明内容
本发明的目的在于提供一种半导体器件介质膜低角度蚀刻方法,可以很好地解决金属层间导通及导通可靠性的问题。
为了实现上述目的,本发明提供了以下技术方案:
本发明提供一种半导体器件介质膜低角度蚀刻方法,包括以下步骤:
A1、光刻工艺:采用光刻胶在器件介质膜上涂胶,通过前烘烤、曝光、显影及后烘烤得到光刻图形;
A2、湿法蚀刻工艺:在光刻图形位置,对介质膜进行一次蚀刻,采用蚀刻溶液蚀刻T1 时间;
A3、干法蚀刻工艺:在光刻图形位置,对介质膜进行二次蚀刻,采用蚀刻气体一蚀刻T2 时间;
A4、去胶工艺:采用NMP溶液冲洗工艺去除光刻胶,再用IPA溶液冲洗掉NMP溶液并烘干器件;
A5、去残胶工艺:对介质膜表面进行蚀刻,采用蚀刻气体二蚀刻T3时间;
A6、水洗工艺:采用水洗溶液对器件进行清洗。
进一步地,步骤A1的光刻工艺的具体内容如下:采用AZ5214光刻胶在器件介质膜上涂胶,厚度为1.4-1.6微米;再通过前烘烤、曝光、显影及后烘烤得到光刻图形。
进一步地,步骤A1中,前烘烤温度为95-110℃,前烘烤时间为50-70s;曝光能量为30mJ/cm2,曝光时间为3-6s;显影条件为1-2个puddle,显影时间为50-70s;后烘烤温度为110-125℃,后烘烤时间为50-70s。
进一步地,步骤A2的湿法蚀刻工艺的具体内容如下:在光刻图形位置,对介质膜进行一次蚀刻,采用BOE与H2O配比为1:10的溶液蚀刻,蚀刻时间为30-100s。
进一步地,步骤A3的干法蚀刻工艺的具体内容如下:一次蚀刻后,在光刻图形位置,对介质膜进行二次蚀刻,采用蚀刻气体蚀刻T2时间,使得蚀刻区域中部露出介质膜下方的金属层。
进一步地,步骤A3中,采用ICP蚀刻机台或RIE机台蚀刻,蚀刻气体为CHF3、CH3F 或CF4,使得蚀刻区域中部露出介质膜下方的金属层。
进一步地,步骤A3中,采用ICP蚀刻机台蚀刻,蚀刻气体为CF4,气体流量0-2000sccm,上电极RF功率为100-600W,下电极RF功率为0-100W,工艺压强为10mtorr。
进一步地,步骤A4的去胶工艺的具体内容如下:首先采用NMP溶液冲洗工艺去除光刻胶,冲洗压力300-1500Psi,时间为3-10min;其次用IPA溶液冲洗掉NMP溶液;最后用甩干机、烘箱或氮***烘干。
进一步地,步骤A5的去残胶工艺的具体内容如下:对去除光刻胶后的介质膜表面进行蚀刻,采用RIE蚀刻机台,蚀刻气体为O2,气体流量0-1000sccm,RF功率为100-600W,工艺压强为0.5-0.7mbar,蚀刻时间60-180s。
进一步地,步骤A6的水洗工艺的具体内容如下:采用盐酸、氨水或DI water对器件进行清洗。
与现有技术相比,本发明具有以下优点:
本发明是一种半导体器件介质膜低角度蚀刻方法,通过光刻、湿法蚀刻、干法蚀刻、去胶、去残胶及水洗工艺,降低了二氧化硅或氮化硅的蚀刻角度,即使在薄金属层沉积情况下也实现了良好的金属连接,避免金属断层及空洞的出现,不仅大大提高器件的可靠性,也节约了金属的用量和成本。
下面通过附图和实施例,对本发明的技术方案做进一步的详细描述。
附图说明
图1为本发明的工艺流程图;
图2为本发明的工艺步骤的结构示意图;
图2中(a)为步骤A1的光刻工艺示意图;
图2中(b)为步骤A2的湿法蚀刻工艺示意图;
图2中(c)为步骤A3的干法蚀刻工艺示意图;
图2中(d)为步骤A5的去残胶工艺示意图;
图2中(e)为金属蒸镀工艺示意图;
图3为现有SiO2纯湿法蚀刻工艺步骤的结构示意图;
图4为现有SiO2纯干法蚀刻工艺步骤的结构示意图。
具体实施方式
下面结合附图对本发明的技术方案进行清楚、完整地描述,显然,所描述的实施例是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
在本发明的描述中,需要说明的是,属于“中心”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“内”、“外”等指示的方向或位置关系为基于附图所述的方向或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,属于“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性。
此外,下面所描述的本发明不同实施方式中所涉及的技术特征只要彼此之间未构成冲突就可以相互结合。
实施例1
如图1-2所示,本实施例提供一种半导体器件介质膜低角度蚀刻方法,包含光刻、湿法蚀刻、干法蚀刻、去胶、去残胶、水洗等。通过工艺优化,可调节二氧化硅或氮化硅的蚀刻角度。
参见图2,是该工艺步骤的结构示意图,其中,1为衬底,2为金属层一,3为SiO2介质层,4为光刻胶层,5为金属层二。下述将以蚀刻2300埃二氧化硅介质层为例来叙述本发明内容。
步骤A1、光刻工艺:采用光刻胶在器件介质膜上涂胶,通过前烘烤、曝光、显影及后烘烤得到光刻图形;参见图2中(a)。具体内容如下:
光刻工艺:采用AZ5214涂胶,厚度约1.4-1.6微米。通过曝光和显影得到需要的光刻图形。前烘烤温度95-110℃、时间50-70s,曝光能量30mJ/cm2、时间3-6s,显影条件为1-2个 puddle、时间50-70s,后烘烤温度110-125℃、时间50-70s。也可用其他的光刻胶及光刻条件实现该工艺效果。
步骤A2、湿法蚀刻工艺:在光刻图形位置,对介质膜进行一次蚀刻,采用蚀刻溶液蚀刻 T1时间;参见图2中(b)。具体内容如下:
湿法蚀刻工艺:采用BOE与H2O配比1:10的溶液,蚀刻时间30-100s,蚀刻时间长则二氧化硅层坡度大,蚀刻时间短则二氧化硅层坡度小。也可采用该蚀刻溶液的其他配比或其他蚀刻液,蚀刻时间可根据介质膜的厚度和蚀刻角度要求适当改变。重点是不要在湿法蚀刻中过蚀刻,过蚀刻易造成介质膜的咬边现象。
步骤A3、干法蚀刻工艺:一次蚀刻后,在光刻图形位置,对介质膜进行二次蚀刻,采用蚀刻气体一蚀刻T2时间,使得蚀刻区域中部露出介质膜下方的金属层(金属层一);参见图 2中(c)。具体内容如下:
干法蚀刻工艺:采用ICP蚀刻机台,蚀刻气体为CF4,气体流量0-2000sccm,上电极RF 功率为100-600W,下电极RF功率为0-100W,工艺压强为10mtorr。蚀刻时间根据介质层厚度及湿法蚀刻的时间进行适当的调整,湿法蚀刻时间长则干法蚀刻时间短,此步骤中过蚀刻时间控制在10%-20%范围内。干法蚀刻机台也可采用RIE机台,或其他的蚀刻气体如SF6、 CHF3、C4F8等。
具体地,在本实施例中,干法蚀刻时间由总的蚀刻厚度和前期湿法蚀刻决定,在正常蚀刻干净的时间内,加上一些过蚀刻时间,以保证蚀刻干净。
例如基于氮化硅介质膜的蚀刻:SiN厚度2300A,假如湿法蚀刻1min,可蚀刻掉1000A,则剩余的厚度为1300A,假如干法蚀刻的时间为400A/min,则根据计算干法蚀刻时间为 3.25min,在实际设定时间时会考虑过蚀刻,假设过蚀刻10%,则过蚀刻时间为
3.25*10%=0.325min。那么干法蚀刻时间为3.25+0.325=3.575min。
步骤A4、去胶工艺:采用NMP溶液冲洗工艺去除光刻胶,再用IPA溶液冲洗掉NMP 溶液并烘干器件。具体内容如下:
去胶工艺:首先采用NMP溶液冲洗工艺,冲洗压力300-1500Psi,时间约3-10min。图形大则冲洗压力可加大,图形小适合小的冲洗压力,过大的压力会造成小图形被冲掉。其次用IPA溶液冲洗掉多余的NMP溶液,最后可用甩干机、烘箱或氮***等方式将wafer弄干。
步骤A5、去残胶工艺:对去除光刻胶后的介质膜表面进行蚀刻,采用蚀刻气体二蚀刻 T3时间;参见图2中(d)。具体内容如下:
去残胶工艺:采用RIE蚀刻机台,蚀刻气体为O2,气体流量0-1000sccm,RF功率为100-600W,工艺压强为0.5-0.7mbar。蚀刻时间60-180s。该步骤不仅可以去除一些光刻胶残渣,等离子体的轰击作用还可以将蚀刻角度上的一些尖角磨平,使坡度保持更平滑。
步骤A6、水洗工艺:采用水洗溶液对器件进行清洗。具体内容如下:
水洗工艺:可用盐酸或氨水或DI water进行清洗,去除表面脏污,也可增加后续蒸镀工艺中的金属粘附性。
如上述,先用湿法蚀刻工艺在介质膜(SiO2介质层)上层蚀刻出开口上部,在适当时间内蚀刻获取较为较好的横向蚀刻尺度,形成较为平缓的坡度;再用干法蚀刻工艺在介质膜下层蚀刻出开口下部,以露出介质膜下方的金属层(金属层一),形成较为平缓的坡度。
为了检验上述方法的质量,在上述完成的器件上进行下述工艺:
金属蒸镀工艺:进行金属蒸镀工艺,形成金属层二,参见图2中(e)。
金属蒸镀工艺步骤目的是方便观察二氧化硅层的蚀刻坡度,具体如下:
在SEM下观察发现,蚀刻角度可调范围为20°-90°。在二氧化硅蚀刻角度小于65°的情况下,通过在二氧化硅的蚀刻处蒸镀金属,发现蒸镀金属层的厚度在从几十纳米到几微米的变化过程中,金属在介质层蚀刻处都能保持良好的粘附性,没有出现金属断层和空洞。
由此可见,通过本方法可实现较小的二氧化硅蚀刻角度,使沉积的金属层保持良好的连接性。
在其他厚度的二氧化硅膜中,可通过改变上述流程中的某些工艺参数(以5000A的SiO2 为例,A2湿法蚀刻时间40-60s、A3干法蚀刻时间60-120s等)或工艺材料(如蚀刻液、蚀刻气体等);当然,也可用于氮化硅介质膜的蚀刻(以2000A的SiN为例,A2湿法蚀刻时间 60-300s、A3干法蚀刻时间200-500s等)。
显然,上述实施例仅仅是为清楚地说明所作的举例,而并非对实施方式的限定,对于所属领域的普通技术人员来说,在上述说明的基础上还可以做出其他不同形式的变化或变动。这里无需也无法对所有的实施方式予以穷举。而由此所引申出的显而易见的变化或变动仍处于本发明创造的保护范围之中。
Claims (10)
1.一种半导体器件介质膜低角度蚀刻方法,其特征在于,包括以下步骤:
A1、光刻工艺:采用光刻胶在器件介质膜上涂胶,通过前烘烤、曝光、显影及后烘烤得到光刻图形;
A2、湿法蚀刻工艺:在光刻图形位置,对介质膜进行一次蚀刻,采用蚀刻溶液蚀刻T1时间;在介质膜上层蚀刻出开口上部,获取较好的横向蚀刻尺度,形成较为平缓的坡度;
A3、干法蚀刻工艺:在光刻图形位置,对介质膜进行二次蚀刻,采用蚀刻气体一蚀刻T2时间;在介质膜下层蚀刻出开口下部,以露出介质膜下方的金属层,形成较为平缓的坡度,降低介质膜的蚀刻角度;
A4、去胶工艺:采用NMP溶液冲洗工艺去除光刻胶,再用IPA溶液冲洗掉NMP溶液并烘干器件;
A5、去残胶工艺:对介质膜表面进行蚀刻,采用蚀刻气体二蚀刻T3时间;
A6、水洗工艺:采用水洗溶液对器件进行清洗。
2.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A1的光刻工艺的具体内容如下:采用AZ5214光刻胶在器件介质膜上涂胶,厚度为1.4-1.6微米;再通过前烘烤、曝光、显影及后烘烤得到光刻图形。
3.根据权利要求2所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A1中,前烘烤温度为95-110℃,前烘烤时间为50-70s;曝光能量为30mJ/cm2,曝光时间为3-6s;显影条件为显影液表面停留,显影时间为50-70s;后烘烤温度为110-125℃,后烘烤时间为50-70s。
4.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A2的湿法蚀刻工艺的具体内容如下:在光刻图形位置,对介质膜进行一次蚀刻,采用BOE与H2O配比为1:10的溶液蚀刻,蚀刻时间为30-100s。
5.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A3的干法蚀刻工艺的具体内容如下:一次蚀刻后,在光刻图形位置,对介质膜进行二次蚀刻,采用蚀刻气体一蚀刻T2时间,使得蚀刻区域中部露出介质膜下方的金属层。
6.根据权利要求5所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A3中,采用ICP蚀刻机台或RIE机台蚀刻,蚀刻气体为CHF3、CH3F或CF4,使得蚀刻区域中部露出介质膜下方的金属层。
7.根据权利要求6所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A3中,采用ICP蚀刻机台蚀刻,蚀刻气体为CF4,气体流量0-2000sccm,上电极RF功率为100-600W,下电极RF功率为0-100W,工艺压强为10mtorr。
8.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A4的去胶工艺的具体内容如下:首先采用NMP溶液冲洗工艺去除光刻胶,冲洗压力300-1500Psi,时间为3-10min;其次用IPA溶液冲洗掉NMP溶液;最后用甩干机、烘箱或氮***烘干。
9.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A5的去残胶工艺的具体内容如下:对去除光刻胶后的介质膜表面进行蚀刻,采用RIE蚀刻机台,蚀刻气体为O2,气体流量0-1000sccm,RF功率为100-600W,工艺压强为0.5-0.7mbar,蚀刻时间60-180s。
10.根据权利要求1所述一种半导体器件介质膜低角度蚀刻方法,其特征在于,所述步骤A6的水洗工艺的具体内容如下:采用盐酸、氨水或去离子水对器件进行清洗。
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