CN109216154A - A kind of semiconductor devices and its manufacturing method, electronic device - Google Patents

A kind of semiconductor devices and its manufacturing method, electronic device Download PDF

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Publication number
CN109216154A
CN109216154A CN201710534165.0A CN201710534165A CN109216154A CN 109216154 A CN109216154 A CN 109216154A CN 201710534165 A CN201710534165 A CN 201710534165A CN 109216154 A CN109216154 A CN 109216154A
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gas
epitaxial
passed
epitaxial layer
layer
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三重野文健
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Zing Semiconductor Corp
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Zing Semiconductor Corp
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Priority to CN201710534165.0A priority Critical patent/CN109216154A/en
Priority to TW106138701A priority patent/TW201907489A/en
Publication of CN109216154A publication Critical patent/CN109216154A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/0257Doping during depositing
    • H01L21/02573Conductivity type

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

The present invention provides a kind of semiconductor devices and its manufacturing methods, electronic device.The described method includes: providing substrate;It is passed through to cycle alternation impurity gas and epitaxial gas, to be epitaxially formed the epitaxial layer comprising Doped ions on the substrate.Manufacturing method of the present invention is passed through impurity gas and epitaxial gas by cycle alternation, to be epitaxially formed the epitaxial layer comprising Doped ions, not only the depositing temperature of the epitaxial layer can be made lower by the method, and can guarantee that there is biggish doping concentration and activity in the epitaxial layer, to further increase the Performance And Reliability of device.

Description

A kind of semiconductor devices and its manufacturing method, electronic device
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of semiconductor devices and its manufacturing method, electronics Device.
Background technique
In consumer electronics field, multifunctional equipment is increasingly liked by consumer, compared to the simple equipment of function, Multifunctional equipment manufacturing process will be more complicated, for example need to integrate the chip of multiple and different functions in circuit version, thus go out Showing 3D IC technology, 3D IC is defined as a kind of system-level integrated morphology, multiple chips stacked in vertical plane direction, from And save space.
With the continuous development of semiconductor technology, the raising of performance of integrated circuits mainly passes through constantly diminution integrated circuit The size of device is realized with improving its speed.In order to improve the performance and integrated level of device, adopted always in technique at present Equal proportion is miniature to increase device speed with carrying out to MOSFET, and the deposition of various thin-film materials and growth also become challenge.
Such as the epitaxial growth for Ge, wherein low epitaxial temperature, which becomes, in the epitaxial growth of Ge applies it to 3D The problem to be solved of structure.GeH is selected in the epitaxial growth of Ge4It grows, or selects at 500 DEG C as epitaxial gas Ge2H6It is grown at 320 DEG C, can guarantee Ge in back-end process (BEOL) in the back side of wafer or lamination at such a temperature Grown on top, but the activity of impurity is very low at lower temperature, is not able to satisfy the demand of device.
In view of the presence of above-mentioned technical problem, it is necessary to propose a kind of manufacturing method of new semiconductor devices.
Summary of the invention
A series of concept of reduced forms is introduced in Summary, this will in the detailed description section into One step is described in detail.Summary of the invention is not meant to attempt to limit technical solution claimed Key feature and essential features do not mean that the protection scope for attempting to determine technical solution claimed more.
In view of the deficiencies of the prior art, the present invention provides a kind of manufacturing methods of semiconductor devices, which comprises
Substrate is provided;
It is passed through to cycle alternation impurity gas and epitaxial gas, be epitaxially formed on the substrate comprising Doped ions Epitaxial layer.
Optionally, the temperature for forming the epitaxial layer is 250 DEG C -450 DEG C.
Optionally, the pressure for forming the epitaxial layer is less than 5Torr.
Optionally, gas bleed step is executed after being passed through the impurity gas every time;
And/or it is passed through execution gas bleed step after the epitaxial gas every time.
Optionally, the time of the rinsing step is 10s-30s.
Optionally, the impurity gas includes n-type doping gas.
Optionally, the impurity gas includes P2H4
Optionally, the epitaxial gas includes Ge source gas.
Optionally, the epitaxial gas includes Ge2H6
Optionally, using H2The impurity gas and the epitaxial gas are passed through as carrier gas cycle alternation.
Optionally, the gas flow of the impurity gas is the 4%-6% of the gas of carrier gas flow;
The gas flow of the epitaxial gas is the 0.8%-1.2% of the gas of carrier gas flow.
Optionally, the time for being passed through the impurity gas and the epitaxial gas every time is 10s-60s.
Optionally, the substrate includes semiconductor substrate and the virtual epitaxial layer in the semiconductor substrate, described The material of virtual epitaxial layer is identical as the material of the epitaxial layer.
The present invention also provides a kind of semiconductor devices, the semiconductor devices is prepared by the above method.
The present invention also provides a kind of electronic device, the electronic device includes above-mentioned semiconductor devices.
Manufacturing method according to the invention, in order to solve the lower need without being able to satisfy Doped ions of epitaxial deposition temperature It wants, by cycle alternation is passed through impurity gas and epitaxial gas, to be epitaxially formed the epitaxial layer comprising Doped ions, pass through institute Stating method not only can make the depositing temperature of the epitaxial layer lower, but also can guarantee there is biggish mix in the epitaxial layer Miscellaneous concentration and activity, to further increase the Performance And Reliability of device.
Detailed description of the invention
Following drawings of the invention is incorporated herein as part of the present invention for the purpose of understanding the present invention.Shown in the drawings of this hair Bright embodiment and its description, principle used to explain the present invention.
In attached drawing:
Fig. 1 a to Fig. 1 d shows the correlation step institute of the manufacturing method of the semiconductor devices of one embodiment of the present invention The structural schematic diagram of the device of acquisition;
Fig. 2 shows the process flow charts of the manufacturing method of the semiconductor devices of one embodiment of the present invention;
Fig. 3 shows the schematic diagram of the electronic device in one embodiment of the invention.
Specific embodiment
In the following description, a large amount of concrete details are given so as to provide a more thorough understanding of the present invention.So And it is obvious to the skilled person that the present invention may not need one or more of these details and be able to Implement.In other examples, in order to avoid confusion with the present invention, for some technical characteristics well known in the art not into Row description.
It should be understood that the present invention can be implemented in different forms, and should not be construed as being limited to propose here Embodiment.On the contrary, provide these embodiments will make it is open thoroughly and completely, and will fully convey the scope of the invention to Those skilled in the art.In the accompanying drawings, for clarity, the size and relative size in the area Ceng He may be exaggerated.From beginning to end Same reference numerals indicate identical element.
It should be understood that when element or layer be referred to " ... on ", " with ... it is adjacent ", " being connected to " or " being coupled to " it is other When element or layer, can directly on other elements or layer, it is adjacent thereto, be connected or coupled to other elements or layer, or There may be elements or layer between two parties by person.On the contrary, when element is referred to as " on directly existing ... ", " with ... direct neighbor ", " directly It is connected to " or " being directly coupled to " other elements or when layer, then there is no elements or layer between two parties.It should be understood that although can make Various component, assembly units, area, floor and/or part are described with term first, second, third, etc., these component, assembly units, area, floor and/ Or part should not be limited by these terms.These terms be used merely to distinguish a component, assembly unit, area, floor or part with it is another One component, assembly unit, area, floor or part.Therefore, do not depart from present invention teach that under, first element discussed below, portion Part, area, floor or part are represented by second element, component, area, floor or part.
Spatial relation term for example " ... under ", " ... below ", " below ", " ... under ", " ... it On ", " above " etc., herein can for convenience description and being used describe an elements or features shown in figure with The relationship of other elements or features.It should be understood that spatial relation term intention further includes making other than orientation shown in figure With the different orientation with the device in operation.For example, then, being described as " under other elements if the device in attached drawing is overturn Face " or " under it " or " under it " elements or features will be oriented in other elements or features "upper".Therefore, exemplary art Language " ... below " and " ... under " it may include upper and lower two orientations.Device can additionally be orientated (be rotated by 90 ° or its It is orientated) and spatial description language as used herein correspondingly explained.
The purpose of term as used herein is only that description specific embodiment and not as limitation of the invention.Make herein Used time, " one " of singular, "one" and " described/should " be also intended to include plural form, unless the context clearly indicates separately Outer mode.It is also to be understood that term " composition " and/or " comprising ", when being used in this specification, determines the feature, whole The presence of number, step, operations, elements, and/or components, but be not excluded for one or more other features, integer, step, operation, The presence or addition of component, assembly unit and/or group.Herein in use, term "and/or" includes any of related listed item and institute There is combination.
It describes to send out herein with reference to the cross-sectional view of the schematic diagram as desirable embodiment (and intermediate structure) of the invention Bright embodiment.As a result, it is contemplated that from the variation of shown shape as caused by such as manufacturing technology and/or tolerance.Therefore, The embodiment of the present invention should not necessarily be limited to the specific shape in area shown here, but including due to for example manufacturing caused shape Shape deviation.For example, being shown as the injection region of rectangle usually has round or bending features and/or implantation concentration ladder at its edge Degree, rather than binary from injection region to non-injection regions changes.Equally, which can lead to by the disposal area that injection is formed Some injections in area between the surface passed through when injection progress.Therefore, the area shown in figure is substantially schematic , their shape is not intended the true form in the area of display device and is not intended to limit the scope of the invention.
In order to thoroughly understand the present invention, detailed step will be proposed in following description, to illustrate proposition of the present invention Technical solution.Presently preferred embodiments of the present invention is described in detail as follows, however other than these detailed descriptions, the present invention can be with With other embodiments.
Embodiment one
In order to solve aforementioned technical problem, the performance of device is improved, a kind of semiconductor device is provided in the embodiment of the present invention The manufacturing method of part, as described in Figure 2, the method specifically includes that
Step S1: substrate is provided;
Step S2: being passed through impurity gas and epitaxial gas to cycle alternation, includes to mix to be epitaxially formed on the substrate The epitaxial layer of heteroion.
Manufacturing method according to the invention, in order to solve the lower need without being able to satisfy Doped ions of epitaxial deposition temperature It wants, by cycle alternation is passed through impurity gas and epitaxial gas, to be epitaxially formed the epitaxial layer comprising Doped ions, pass through institute Stating method not only can make the depositing temperature of the epitaxial layer lower, but also can guarantee there is biggish mix in the epitaxial layer Miscellaneous concentration and activity, to further increase the Performance And Reliability of device.
Specifically, the manufacturing method of semiconductor devices of the invention is described in detail below with reference to Fig. 1 a- Fig. 1 d, In, the correlation step that Fig. 1 a to Fig. 1 d shows the manufacturing method of the semiconductor devices of one embodiment of the present invention is obtained The structural schematic diagram of device.
The semiconductor devices may include memory device, active device, passive device and MEMS device in the present invention Part etc., it is not limited to it is a certain, it is limited the present invention is not further yet.
No longer the entire forming process of the semiconductor devices is further repeated in the present invention, and only externally The formation for prolonging layer is described in detail.
It should be noted that the forming method of the epitaxial layer can be applied among the preparation of various semiconductor devices.
Firstly, executing step 1, substrate is provided.
Specifically, as shown in Figure 1a, the substrate includes substrate (not shown) and virtual epitaxial layer in this application 101。
Wherein, the substrate can be following at least one of the material being previously mentioned: silicon, silicon-on-insulator (SOI), absolutely Silicon (SSOI) is laminated on edge body, SiGe (S-SiGeOI), germanium on insulator SiClx (SiGeOI) and absolutely are laminated on insulator Germanium (GeOI) etc. on edge body.
The material of targeted epitaxial layer formed in the material and subsequent step of the virtual epitaxial layer 101 is identical.
It is described in detail in the present invention using Ge layers for epitaxial layer as example, but the epitaxial layer does not limit to It in Ge layers, such as can also be other semiconductor materials such as SiGe layer.
Such as the targeted epitaxial layer for needing to deposit is Ge layers, then the virtual epitaxial layer 101 is then Ge layers.
Wherein, the epitaxial growth system described in a specific embodiment of the invention can be for reduced pressure epitaxy, outside low temperature Prolong, selective epitaxy, liquid phase epitaxy, hetero-epitaxy, one of molecular beam epitaxy, but is not limited to the epitaxial system.
In a specific embodiment of the invention, comprising being used for epitaxial growth or deposition in the epitaxial growth system The chamber of various films, the chamber includes side wall and bottom wall, and to define processing region, face is provided at the top of chamber Plate is equipped with multiple multiple gas sprayer assemblies across the panel on the panel, is used for reaction gas, purge gas It is delivered to the processing region with carrier gas, the bottom of the reaction chamber is provided with extract system, in the reaction chamber It is provided with liter act needle (lift pin), chip is located at the liter and lifts on needle (lift pin), and the liter lifts needle and the crystalline substance Heater holder is additionally provided between piece, gas is passed through by reaction gas by the gas sprayer assembly to react, described Various films are formed on chip.
In addition, the epitaxial growth system further comprises drive system, the drive system is for driving the liter It lifts needle (lift pin), realizes that described rise lifts moving up and down for needle (lift pin), heater holder and chip.
It should be noted that the composition of epitaxial growth system described in above-mentioned example was merely exemplary, it is not limited to The example.
Before executing epitaxial growth steps, to improve embedded particles defect, prerinse can be carried out to reaction chamber;So Plasma (such as oxygen plasma) is selected to handle the reaction chamber afterwards, it is indoor miscellaneous to remove the reaction chamber Matter and grain defect.
In the preparation method of semiconductor devices described in a specific embodiment of the invention, first to the reaction chamber into Row prerinse processing, the prerinse processing of the chamber can be periodic or idle period progress, described outer to reduce Prolong the pollution of particle in growing system, the prerinse of the chamber can select caused by remote plasma source remotely it is equal from Daughter (Remoting plasma) carries out prerinse.The plasma is generated by plasma source, the remote plasma Body source can be set near the reaction chamber, and remote plasma source is sprayed after generating remote plasma by the gas Head assembly enters the reaction chamber, and enters processing region, starts the cleaning processing to the chamber.Or it is described it is long-range etc. from Daughter source is connected with the reaction chamber by the gas passage other than gas sprayer assembly, and remote plasma source generates remote It is passed into after journey plasma in the reaction chamber, prerinse is carried out to the reaction chamber.
Wherein, better effect in order to obtain, by selecting carrier gas described in a specific embodiment of the invention Plasma is input in the chamber, and the carrier gas can be the inert gases such as helium, nitrogen, argon gas, can also for hydrogen, Oxygen etc., the remote plasma can select chlorine, fluorine or its compound, such as NF3、CF4、SF6、C2F6、CCl4Deng preferably For NF3Remote plasma cleans the chamber.Optionally, shorten the plasma source and the chamber as far as possible Distance improves the cleaning effect of the plasma to improve the time-to-live of the plasma.
In the prewashed step of chamber, the chamber can also be heated, to improve cleaning effect, be selected long-range Plasma carries out prewashed condition are as follows: under the pressure of 1-5torr, carries out at being 200-400 DEG C in the chamber temp 5-40s, the flow velocity of the plasma are 300-900sccm.
After carrying out prerinse to the reaction chamber, the remote plasma can be retained in the chamber Or it is extracted out by the extract system.
Then to prerinse is carried out, treated that chamber carries out adaptation deposition processes (season step), described in being formed Virtual epitaxial layer 101.
Specifically, the reaction chamber is discharged by extract system in the pre-cleaning gas first, is then adapted to Deposition processes, to form one layer of pre-deposition film on forming the substrate, thus wherein by the sealing of remaining pollutant, and drop Low contamination levels.
Optionally, deposition processes are adapted to generally include to be used for a pre-deposition thin film coated to define processing region in chamber Inner surface on.
In adapting to deposition processes, carried out used in epitaxial growth in chamber after can selecting and adapting to deposition processes Gaseous compound is handled, and pre-deposition film is deposited on to the surface of chamber, leads to reaction gas in adapting to deposition processes Enter in chamber, radio frequency provides RF energy to excite predecessor and carry out epitaxial growth, to form the void over the substrate Quasi- epitaxial layer 101.
In one embodiment of this invention, the virtual epitaxial layer 101 is Ge layers.
Specifically, in this embodiment in order to form Ge layers, Ge source gas is passed through in the adaptation deposition process, such as logical Enter Ge2H6Gas, to deposit the certain thickness virtual epitaxial layer 101.
Wherein, the thickness of the virtual epitaxial layer 101 is not limited to a certain numberical range, can be by remaining pollutant Sealing wherein, such as the virtual epitaxial layer 101 with a thickness of 1-100nm.
In addition, being adjusted in the adaptation deposition processes to the flow velocity of the reaction gas, to maintain to fit with conventional The identical deposition velocity of deposition processes is answered, so that can be formed within the time identical with conventional adaptation deposition processes desired outer Prolong growing film, thus the generation of particle can be further avoided, it can be to described in a specific embodiment of the invention The adaptation deposition processes of reaction chamber progress 15-45s.
Optionally, H is used in this step2As carrier gas by the Ge source gas, such as it is passed through Ge2H6Gas is passed through institute Deposition chambers are stated, to form the virtual epitaxial layer 101 over the substrate.
Step 2 is executed, cycle alternation impurity gas and epitaxial gas are passed through, to be epitaxially formed packet on the substrate Epitaxial layer containing Doped ions.
Wherein, it is alternately passed through impurity gas and epitaxial gas includes: first makes the reaction chamber in the reaction chamber The temperature of room remains epitaxial temperature, and impurity gas is passed through within first time, is formed on the virtual epitaxial layer 101 Then Doped ions layer is passed through epitaxial gas within the second time to replace the part Doped ions, and then is formed by adulterating The film layer of ion and epitaxial gas composition, repeatedly until forming target thickness and target doping concentration on the substrate Epitaxial layer.
Optionally, the temperature of the extension is 250 DEG C -450 DEG C.Such as the temperature of the extension be 280 DEG C, 300 DEG C, 320 DEG C, 350 DEG C, 380 DEG C, 400 DEG C, 420 DEG C or 450 DEG C etc..Lower epitaxial temperature is kept in this step.
The pressure for being epitaxially formed the epitaxial layer in the cavity in this step is less than 5Torr.Such as in the present invention One embodiment described in extension pressure be 0.03Torr, 0.1Torr, 0.3Torr, 0.5Torr, 1Torr, 1.2Torr, 1.5Torr, 2.0Torr, 2.3Torr, 2.8Torr, 3.5Torr, 3.9Torr, 4.2Torr, 4.5Torr, 4.8Torr or 5Torr etc..
Specifically, as shown in Figure 1a, described mix is passed first into after forming the virtual epitaxial layer 101 in this step Miscellaneous gas forms Doped ions 102 on the virtual epitaxial layer 101.
Optionally, the value range of the first time is that one layer of Doped ions are formed on the virtual epitaxial layer 101 Thickness, such as Doped ions be P when, the first time is the time to form one layer of P atom.
The first time is configured according to actual needs, such as the value range of the first time are as follows: 10-60s, It optionally, is at the first time 10s, 15s, 20s, 25s, 30s, 35s, 40s, 45s, 50s, 55s or 60s.
The impurity gas includes n-type doping gas in one embodiment of the invention.Such as the impurity gas packet Include P2H4.One layer of Doped ions are formed on the virtual epitaxial layer 101 in this embodiment, as shown in Figure 1a.
Specifically, control epitaxial temperature is 320 DEG C in this embodiment, and pressure 0.5Torr passes through the model between Ge-P De Huali forms first layer Doped ions on the virtual epitaxial layer of the Ge.Van der Waals between the Ge-P in this step Power is about 198kJ/mol.
Wherein, the value range of second time is that one layer of extension atomic layer is formed in the Doped ions 102 103, for example, epitaxial layer be Ge when, second time is the time to form one layer of Ge atom.
Second time is configured according to actual needs, such as the value range of second time are as follows: 10-60s, Optionally, the second time was 10s, 15s, 20s, 25s, 30s, 35s, 40s, 45s, 50s, 55s or 60s.
Wherein, the second thickness can be controlled according to the time for being passed through epitaxial gas, such as form one layer of Ge original The time of son is T1, then control is passed through the integral multiple that the time of epitaxial gas is T1, then can form multilayer Ge atom.
It is passed through epitaxial gas on the Doped ions 102 in one embodiment of the invention, to form one layer of extension Atomic layer, wherein in the Ge atom being passed through, it is described since the bonding between the Ge-Ge only needs 159kJ/mol Ge atom can't be bonded with P, but replace the part P, be formed on the virtual epitaxial layer by Doped ions and extension One film layer of atom mixing, i.e., the film layer mixed by Ge atom and P, as shown in Figure 1 b.
Then cycle alternation is passed through the impurity gas and epitaxial gas, again in which be passed through the impurity gas it Afterwards, the impurity gas can be attached on the extension atom, because the bond energy of the P-P is 201kJ/mol, and between Ge-P Van der Waals force be about 198kJ/mol, therefore the P in the impurity gas being passed through can be attached on the Ge atom, to be formed The P layer of Ge atom is surrounded, as illustrated in figure 1 c.
Then continue to be passed through epitaxial gas in subsequent steps, similarly epitaxial gas can replace part it is described adulterate from Son, and then form the film layer mixed by Doped ions and extension atom, i.e., the film layer mixed by Ge atom and P, such as Fig. 1 d It is shown.
Being passed through after the impurity gas and epitaxial gas of cycle alternation then can all be formed in each layer by adulterate from One film layer of son and the mixing of extension atom, i.e., the film layer mixed by Ge atom and P, and then while forming Ge epitaxial layer, Realize the doping of ion, and the maximum concentration of P doping at low temperature, such as 7 × 10 may be implemented in the method19/cm3, and this Temperature in current technique only at 850 DEG C or more is just able to achieve the doping concentration, and the present invention can not only realize Low-temperature-doped and realization maximum dopant concentration, and Doped ions are more uniform, have preferably activity.
Optionally, the epitaxial gas includes Ge source gas.For example, the epitaxial gas includes Ge2H6
Further, using H2As carrier gas cycle alternation the impurity gas and the epitaxial gas.
Wherein, the gas flow of the impurity gas is the 4%-6% of the gas of carrier gas flow;Such as the doping gas The gas flow of body is the 5% of the gas of carrier gas flow.
Wherein, the gas flow of the epitaxial gas is the 0.8%-1.2% of the gas of carrier gas flow;Such as it is described outer The gas flow for prolonging gas is the 1% of the gas of carrier gas flow.
Optionally, gas bleed step is executed after being passed through the impurity gas every time;And/or it is passed through every time described outer Prolong gas and execute gas bleed step later, to exclude the gas not reacted completely.
The time of the gas bleed is 10-30s, for example, 10s, 15s, 20s, 25s or 30s.
In one embodiment of the invention after being passed through gas every time, either impurity gas or epitaxial gas is equal Gas bleed step is executed, gas unreacted in reaction chamber is discharged, while each layer for accumulating extension is more equal It is even.
Wherein, select carrier gas carry out described in wash away, the time washed away be 1-35s, such as 1s, 5s, 10s, 15s, 20s, 25s, 30s or 35s etc..
In one embodiment of the invention, the method for being passed through the impurity gas include: under lower epitaxial temperature, Under conditions of the extension pressure of setting, it is filled with hydrogen into the reaction chamber and treated mixes through plasma generator Miscellaneous gas.Wherein, the range of flow of the hydrogen includes: 500sccm-5000sccm, and optionally, the flow of the hydrogen is 300sccm, 500sccm, 800sccm, 1000sccm, 1500sccm or 2000sccm;The impurity gas includes: phosphorus base gas Body, arsyl gas or boryl gas, the phosphorus base gas includes: P2H4, the boryl gas includes: B2H6, the arsyl gas It include: AsH3
The impurity gas includes P in this embodiment2H4
Wherein, the flow of the Doped ions gas is the 4%-6% of the carrier gas flow;Such as impurity gas Volume content is 5%.The range of flow of the Doped ions gas includes: 20sccm-300sccm.The plasma occurs The frequency of device is 12MHz-14MHz, power bracket 100-1500W.
Wherein, hydrogen, Ge base gas are each led into the reaction chamber.Wherein, the Ge base gas includes: Ge2H6
The range of flow of the hydrogen includes: 500sccm-5000sccm, and optionally, the flow of the hydrogen is 300sccm, 500sccm, 800sccm, 1000sccm, 1500sccm or 2000sccm
The range of flow of the Ge base gas includes: 50sccm-500sccm, and optionally, the flow of the Ge base gas is 50sccm, 100sccm, 200sccm or 300sccm.
Optionally, selective gas, the selective gas packet can also be passed through while being passed through the epitaxial gas Include: HCl, the range of flow of the selective gas include: 50sccm-300sccm.
In other embodiments of the invention, in order to preferably activate Doped ions, the epitaxial layer can also formed Afterwards, it is made annealing treatment, such as using spike annealing process at a slow speed.
So far the detailed description for completing the manufacturing method to semiconductor devices of the invention, for the system of complete device It it may also be desirable to other processing steps, this will not be repeated here.
Manufacturing method according to the invention, in order to solve the lower need without being able to satisfy Doped ions of epitaxial deposition temperature It wants, by cycle alternation is passed through impurity gas and epitaxial gas, to be epitaxially formed the epitaxial layer comprising Doped ions, pass through institute Stating method not only can make the depositing temperature of the epitaxial layer lower, but also can guarantee there is biggish mix in the epitaxial layer Miscellaneous concentration and activity, to further increase the Performance And Reliability of device.
Embodiment two
The present invention also provides a kind of semiconductor devices, the semiconductor devices is prepared by one the method for embodiment It arrives.
Wherein, being passed through after the impurity gas and epitaxial gas for cycle alternation then can be in the method for the invention The film layer mixed by Doped ions and extension atom is all formed in each layer, i.e., by the film layer of Ge atom and P mixing, in turn While forming Ge epitaxial layer, the doping of ion is realized.It may be implemented in the Ge layer being prepared by the method low The maximum concentration of the lower P doping of temperature, such as 7 × 1019/cm3, and this in current technique only 850 DEG C or more temperature Be able to achieve the doping concentration, the present invention can not only realize low-temperature-doped and realize maximum dopant concentration, and adulterate from Son is more uniform, has preferably activity.
Embodiment three
Another embodiment of the present invention provides a kind of electronic devices comprising semiconductor devices, the semiconductor devices are Semiconductor devices in previous embodiment two, or half obtained by the preparation method of the semiconductor devices according to embodiment one Conductor device.
The electronic device, can be mobile phone, tablet computer, laptop, net book, game machine, television set, VCD, Any electronic product such as DVD, navigator, camera, video camera, recording pen, MP3, MP4, PSP or equipment, are also possible to have The intermediate products of above-mentioned semiconductor, such as: the cell phone mainboard etc. with the integrated circuit.
Wherein, Fig. 3 shows the example of mobile phone handsets.Mobile phone handsets 300, which are equipped with, to be included in shell 301 Display portion 302, operation button 303, external connection port 304, loudspeaker 305, microphone 306 etc..
Wherein the mobile phone handsets include semiconductor devices above-mentioned, be may be implemented in the semiconductor devices low The maximum concentration that P is adulterated in Ge layers under temperature, such as 7 × 1019/cm3, and this in current technique only at 850 DEG C or more Temperature be just able to achieve the doping concentration, the present invention can not only realize low-temperature-doped and realize maximum dopant concentration, and And Doped ions are more uniform, have preferably activity.
The present invention has been explained by the above embodiments, but it is to be understood that, above-described embodiment is only intended to The purpose of citing and explanation, is not intended to limit the invention to the scope of the described embodiments.Furthermore those skilled in the art It is understood that the present invention is not limited to the above embodiments, introduction according to the present invention can also be made more kinds of member Variants and modifications, all fall within the scope of the claimed invention for these variants and modifications.Protection scope of the present invention by The appended claims and its equivalent scope are defined.

Claims (15)

1. a kind of manufacturing method of semiconductor devices, which is characterized in that the described method includes:
Substrate is provided;
It is passed through to cycle alternation impurity gas and epitaxial gas, to be epitaxially formed the extension comprising Doped ions on the substrate Layer.
2. the method according to claim 1, wherein the temperature for forming the epitaxial layer is 250 DEG C -450 DEG C.
3. the method according to claim 1, wherein the pressure for forming the epitaxial layer is less than 5Torr.
4. the method according to claim 1, wherein executing gas punching after being passed through the impurity gas every time Wash step;
And/or it is passed through execution gas bleed step after the epitaxial gas every time.
5. according to the method described in claim 4, it is characterized in that, the time of the rinsing step is 10s-30s.
6. the method according to claim 1, wherein the impurity gas includes n-type doping gas.
7. the method according to claim 1, wherein the impurity gas includes P2H4
8. the method according to claim 1, wherein the epitaxial gas includes Ge source gas.
9. the method according to claim 1, wherein the epitaxial gas includes Ge2H6
10. the method according to claim 1, wherein using H2The doping is passed through as carrier gas cycle alternation Gas and the epitaxial gas.
11. according to the method described in claim 10, it is characterized in that, the gas flow of the impurity gas is the carrier gas gas The 4%-6% of body flow;
The gas flow of the epitaxial gas is the 0.8%-1.2% of the gas of carrier gas flow.
12. the method according to claim 1, wherein being passed through the impurity gas and the epitaxial gas every time Time be 10s-60s.
13. the method according to claim 1, wherein the substrate includes semiconductor substrate and is located at described half The material of virtual epitaxial layer on conductor substrate, the virtual epitaxial layer is identical as the material of the epitaxial layer.
14. a kind of semiconductor devices, which is characterized in that the semiconductor devices passes through one of claim 1 to 13 the method Preparation.
15. a kind of electronic device, which is characterized in that the electronic device includes semiconductor devices described in claim 14.
CN201710534165.0A 2017-07-03 2017-07-03 A kind of semiconductor devices and its manufacturing method, electronic device Pending CN109216154A (en)

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