CN109194328A - Oscillator on high-precision sheet - Google Patents
Oscillator on high-precision sheet Download PDFInfo
- Publication number
- CN109194328A CN109194328A CN201811283014.3A CN201811283014A CN109194328A CN 109194328 A CN109194328 A CN 109194328A CN 201811283014 A CN201811283014 A CN 201811283014A CN 109194328 A CN109194328 A CN 109194328A
- Authority
- CN
- China
- Prior art keywords
- nmos tube
- tube
- grid
- clock
- drain electrode
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 36
- 239000003990 capacitor Substances 0.000 claims description 40
- 238000012545 processing Methods 0.000 claims description 15
- 238000006243 chemical reaction Methods 0.000 claims description 13
- 102100030933 CDK-activating kinase assembly factor MAT1 Human genes 0.000 claims description 12
- 101000583935 Homo sapiens CDK-activating kinase assembly factor MAT1 Proteins 0.000 claims description 12
- 230000005611 electricity Effects 0.000 claims description 9
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 10
- 238000005516 engineering process Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 241000208340 Araliaceae Species 0.000 description 1
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 1
- 235000003140 Panax quinquefolius Nutrition 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000001149 cognitive effect Effects 0.000 description 1
- 230000009514 concussion Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 235000008434 ginseng Nutrition 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000006641 stabilisation Effects 0.000 description 1
- 238000011105 stabilization Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
- H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/0802—Details of the phase-locked loop the loop being adapted for reducing power consumption
Landscapes
- Semiconductor Integrated Circuits (AREA)
Abstract
Present invention discloses oscillators on a kind of high-precision sheet, on high-precision sheet provided by the invention in oscillator, use switching capacity equivalent resistance module, on piece resistance (i.e. acquisition equivalent impedance) is realized using oscillator clock output, then realize that voltage and current converts using reference voltage, obtain the electric current proportional to clock frequency, abbreviation proportional current.By reference current, electric current is compared in proportion, using the frequency of oscillation of the initial clock signal of comparison result negative-feedback dynamic adjustment clock oscillation module, to realize high-precision on piece clock output.The present invention can reduce silicon area, while realizing that high accurate clock signal generates, reduce the cost and power consumption of chip.
Description
Technical field
The present invention relates to integrated circuit fields, more particularly to oscillator on a kind of high-precision sheet.
Background technique
On piece oscillator is ubiquitous just as the power supply in electronic system, it is believed that their importance is equal to
Power supply can find their application in the product of any required clock signal.Therefore, to the research of on piece oscillator also one
Directly never pause.
The prior art " Krishnakumar Sundaresan, Keith C.Brouse, Kongpop U-Yen, Farrokh
Ayazi,Phillip E.Allen.‘A 7-MHz Process,Temperature and Supply Compensated
0.25 μm of CMOS ' of Clock Oscillator in " has studied a kind of conventional relaxed oscillator, and the clock cycle is by capacitor
Charging time, comparator delay etc. are constituted.Wherein the capacitor charge and discharge time is the major part of clock cycle.In order to obtain stabilization
The charge and discharge time, need accurately to differentiate voltage and accurate charging current to guarantee the charging time not with supply voltage, temperature
It spends and changes, to obtain stable on piece clock signal.But there is no dynamically adjust traditional technology according to clock signal
The whole electric parameter for determining the clock cycle: differentiate voltage and charging current.
Feedback technique is used in Chinese patent CN102882471A, CN102882471B, and clock frequency is converted into electricity
Pressure is realized and is controlled the frequency of voltage controlled oscillator then by integrating circuit.If it is controlled oscillator, need that electricity will be integrated
Pressure output is converted to electric current, to control the frequency of oscillation of ICO (I-controlled oscillator, controlled oscillator).Due to
Output frequency is proportional to the absolute value of voltage-controlled voltage or current, so the Voltage-current conversion in the technology, and integral
Device reference input is needed using accurate reference voltage.Furthermore in ICO framework also the more primary voltages of meeting to electric current conversion,
Increase cost and circuit complexity.
Summary of the invention
The object of the present invention is to provide oscillators on a kind of high-precision sheet, realize high-precision on piece clock output, together
When, reduce the cost and power consumption of chip.
In order to solve the above technical problems, the present invention provides oscillator on a kind of high-precision sheet, comprising:
Voltage and current generation module, clock signal processing module, switching capacity equivalent resistance module, clock frequency-electric current
Conversion module, current comparing module and clock oscillation module;
The clock signal processing module generates two-phase non-overlap according to the initial clock signal of the clock oscillation module
Switching signal is transferred to the switching capacity equivalent resistance module and obtains equivalent impedance, and the equivalent impedance is in conjunction with the voltage
The reference voltage that current generating module generates obtains proportional current, the ratio electricity in the clock frequency-current conversion module
The reference current that stream is generated with the voltage and current generation module obtains comparison result, the comparison in the current comparing module
As a result negative-feedback dynamic controls the frequency of oscillation of the initial signal of the clock oscillation module.
Optionally, for oscillator on the high-precision sheet, voltage and current generation module includes: NMOS tube MNAT0,
The source electrode of NMOS tube MNAT1, NMOS tube MNAT0 are grounded, drain electrode connection grid, and drain electrode is additionally coupled to multiple concatenated resistance
One end, another termination supply voltage of the multiple concatenated resistance, a node in reference voltage self-resistance string are drawn,
The source electrode of NMOS tube MNAT1 is grounded, and grid connects the grid of NMOS tube MNAT0, the grid of PMOS tube MP0 and PMOS tube MP1's
Grid is connected to the drain electrode of NMOS tube MNAT1, and the source electrode of PMOS tube MP0 and the source electrode of PMOS tube MP1 connect supply voltage, PMOS tube
The drain electrode of MP0 connects the source electrode of PMOS tube MP2, and the drain electrode of PMOS tube MP1 connects the source electrode of PMOS tube MP3, the grid of PMOS tube MP2 and
The grid of PMOS tube MP3 connects the first bias voltage, and the drain electrode of PMOS tube MP2 connects the drain electrode of NMOS tube MNAT1, thus in PMOS tube
Reference current is drawn in the drain electrode of MP3.
Optionally, for oscillator on the high-precision sheet, the clock signal processing module generates duty ratio and is
50% output clock signal, and the two-phase non-overlapp-ing clock switching signal is generated according to the output clock signal.
Optionally, for oscillator on the high-precision sheet, the clock signal processing module includes clock duty cycle
Adjustment module and non-overlap switching signal generation module, the clock duty cycle adjustment module generate the output that duty ratio is 50%
Clock signal, the non-overlap switching signal generation module generate the two-phase non-overlapp-ing clock according to the output clock signal
Switching signal.
Optionally, for oscillator on the high-precision sheet, the switching capacity equivalent resistance module includes first whole
End, second terminal, NMOS tube MN0, NMOS tube MN1, NMOS tube MN2, NMOS tube MN3, first capacitor and the second capacitor;It is described
The drain electrode of NMOS tube MN0 and the drain electrode of the NMOS tube MN1 are connected to the first terminal, the source electrode of the NMOS tube MN0, institute
The drain electrode for stating NMOS tube MN2 is connected with one end of the first capacitor, the source electrode of the NMOS tube MN1, the NMOS tube MN3
Drain electrode be connected with one end of second capacitor, the source electrode, described of the source electrode of the NMOS tube MN2, the NMOS tube MN3
The other end of the other end of first capacitor and second capacitor is connected to the second terminal, the grid of the NMOS tube MN0
A phase clock switching signal, the grid of the NMOS tube MN1 and the NMOS tube MN2 are connected with the grid of the NMOS tube MN3
Grid connect another phase clock switching signal.
Optionally, for oscillator on the high-precision sheet, the frequency of oscillation is fclk, period Tclk, the first electricity
Hold and the capacitance of the second capacitor is Cs, the two-phase non-overlapp-ing clock switching signal turn-on time is Tclk/ 2, quantity of electric charge Q,
Electric current is I, reference voltage Vref, then equivalent impedance Z calculating is as follows between first terminal and second terminal:
Q=CS*Vref,
Optionally, for oscillator on the high-precision sheet, the clock frequency-current conversion module includes NMOS tube
MN4, PMOS tube MP4, PMOS tube MP5, amplifier and switching capacity equivalent resistance, the NMOS tube MN4 grid connection described in
The output end of amplifier, the source electrode of the NMOS tube MN4 connect the amplifier negative input end and the switching capacity it is equivalent
One end of resistance, the other end ground connection of the switching capacity equivalent resistance, the two-phase non-overlapp-ing clock switching signal, by institute
The negative input end that switching capacity equivalent resistance is applied to the amplifier is stated, the positive input terminal of the amplifier connects the voltage
The reference voltage V that current generating module generatesref, the drain electrode of the NMOS tube MN4 connects drain electrode and the grid of the PMOS tube MP4
The source electrode of pole, the PMOS tube MP4 connects supply voltage, and the grid of the PMOS tube MP4 is also connected with the grid of the PMOS tube MP5
Pole, the source electrode of the PMOS tube MP5 connect supply voltage, and the source electrode of the PMOS tube MP5 exports the proportional current;Then have
Wherein IclkFor the proportional current.
Optionally, for oscillator on the high-precision sheet, the current comparing module includes NMOS tube MN5, NMOS
Pipe MN6, NMOS tube MN7, NMOS tube MN8, NMOS tube MN9, PMOS tube MP6 and PMOS tube MP7, the drain electrode of the NMOS tube MN7
Bias current is accessed, the source electrode of the NMOS tube MN5 connects the drain electrode of the NMOS tube MN6, and the grid of the NMOS tube MN5 connects
It is connected to the grid of body drain electrode and the NMOS tube MN6, generates the second bias voltage of the NMOS tube MN6 grid, the NMOS
The source electrode of pipe MN6 is grounded, and the drain electrode of the NMOS tube MN7 accesses reference current, and the grid of the NMOS tube MN7 connects itself leakage
Pole, the source electrode ground connection of the NMOS tube MN7, the grid of the NMOS tube MN8 connects the grid of the NMOS tube MN7, described
The source electrode of NMOS tube MN8 is grounded, and the drain electrode of the NMOS tube MN8 connects the source electrode of the NMOS tube MN9, the NMOS tube MN9
Grid connect second bias voltage, the drain electrode of the drain electrode connection and the PMOS tube MP6 of the NMOS tube MN9 is described
The source electrode of PMOS tube MP6 connects supply voltage, and the grid of the PMOS tube MP6 connects the grid of the PMOS tube MP7, described
The source electrode of PMOS tube MP7 connects supply voltage, and the drain electrode of the PMOS tube MP7 connects itself grid and is grounded, the ratio electricity
Stream accesses the drain electrode of the PMOS tube MP7, hereby it is achieved that the comparison of reference current and proportional current, and in NMOS tube MN9 and
Third bias voltage is drawn between the PMOS tube MP6.
Optionally, for oscillator on the high-precision sheet, the clock oscillation module include it is N number of sequentially input end and
The connected inverting amplifier of output end, N number of third capacitor, the third capacitor and the inverting amplifier correspond, each
One end of third capacitor connects the output end of a corresponding inverting amplifier, the other end ground connection of each third capacitor, institute
An input terminal of the output end connection NAND gate of n-th inverting amplifier is stated, another input terminal of the NAND gate is enabled,
The output end of the NAND gate generates the initial signal, the offset side access third biasing of each inverting amplifier
Voltage, another biasing terminate the 4th bias voltage.
Optionally, for oscillator on the high-precision sheet,
Iclk=K0*Iref,Vref=K2*R*Iref,
Iclk=2Cs*fckl*Vref,
K0*Iref=2Cs*fclk*K2*R*Iref,
Wherein K0、K1、K2For constant, VDD is supply voltage, and R is resistance.
On high-precision sheet provided by the invention in oscillator, using switching capacity equivalent resistance module, when using oscillator
Clock output realizes on piece resistance (i.e. acquisition equivalent impedance), then realizes that voltage and current converts using reference voltage, obtain with
The proportional electric current of clock frequency, abbreviation proportional current, then by reference current, electric current is compared in proportion, utilizes comparison result
The frequency of oscillation of the initial clock signal of negative-feedback dynamic adjustment clock oscillation module, to realize high-precision on piece clock
Output.
This invention removes oscillators on traditional high-precision sheet to high-precision bandgap voltage reference, high precision reference electric current
Demand, therefore band gap reference can not be needed, so as to reduce silicon area, also eliminate the big static function of counter structure
Consumption reduces the cost and power consumption of chip while realizing that high accurate clock signal generates.
Detailed description of the invention
Fig. 1 is the schematic diagram of reference voltage, reference current generation module in the prior art;
Fig. 2 is the schematic diagram of oscillator on high-precision sheet in one embodiment of the invention;
Fig. 3 is the schematic diagram of voltage and current generation module in one embodiment of the invention;
Fig. 4 is the schematic diagram of clock signal processing module in one embodiment of the invention;
Fig. 5 is the schematic diagram of switching capacity equivalent resistance module in one embodiment of the invention;
Fig. 6 is clock frequency-current conversion module schematic diagram in one embodiment of the invention;
Fig. 7 is the schematic diagram of current comparing module in one embodiment of the invention;
Fig. 8 is the schematic diagram of clock oscillation module in one embodiment of the invention.
Specific embodiment
Oscillator on high-precision sheet of the invention is described in more detail below in conjunction with schematic diagram, which show
The preferred embodiment of the present invention, it should be appreciated that those skilled in the art can modify invention described herein, and still realize
Advantageous effects of the invention.Therefore, following description should be understood as the widely known of those skilled in the art, and not
As limitation of the present invention.
The present invention is more specifically described by way of example referring to attached drawing in the following passage.It is wanted according to following explanation and right
Book is sought, advantages and features of the invention will become apparent from.It should be noted that attached drawing is all made of very simplified form and using non-
Accurately ratio, only for the purpose of facilitating and clarifying the purpose of the embodiments of the invention.
The schematic diagram of reference voltage, reference current generation module in the prior art as shown in figure 1.Including two triodes
The emitter of Q0, Q1, the base stage and grounded collector of triode, triode Q0 pass through two concatenated resistance R0, R2 and PMOS
The drain electrode of pipe T0 connects, and the emitter of triode Q1 then passes through resistance R1 and connect with the source electrode of PMOS tube T1, further include it is multiple and
Other PMOS tube T2 ... T (n+2) of PMOS tube T0, T1 common gate, wherein among reference voltage VREF self-resistance R0 resistance string
It draws, reference current can then be drawn from the source electrode of PMOS tube MP2 ... MP (n+2) respectively.
But in order to obtain relatively stable reference voltage and reference current, need to be added clamped amplifier (clamp-
Amp), positive input terminal is arranged between resistance R0 and resistance R1, negative input end setting resistance R1 and triode Q1 emitter it
Between, the grid of PMOS tube is arranged in output end.
It is found after inventor's research, such too fat to move complexity of structure, power consumption is big, and footprint area is big.To improve this situation,
The invention proposes oscillators on a kind of high-precision sheet.
As shown in Fig. 2, oscillator on the high-precision sheet of the embodiment of the present invention, comprising:
Voltage and current generation module, clock signal processing module, switching capacity equivalent resistance module, clock frequency-electric current
Conversion module, current comparing module and clock oscillation module;
The clock signal processing module generates two-phase non-overlap switch according to the initial signal of the clock oscillation module
Signal is transferred to the switching capacity equivalent resistance module and obtains equivalent impedance, and the equivalent impedance is in conjunction with the voltage and current
The reference voltage that generation module generates obtains proportional current in the clock frequency-current conversion module, the proportional current with
The reference current that the voltage and current generation module generates obtains comparison result, the comparison result in the current comparing module
Negative-feedback dynamic adjusts the frequency of oscillation of the initial clock signal of the clock oscillation module.
The present invention mainly by the way that the output of the clock oscillation module to be converted into the proportional current of corresponding ratio, by with
Reference current compares, when providing error signal (i.e. comparison result) dynamic feedback control and adjusting the output of the clock oscillation module
Clock frequency.
It can be realized and be corrected by fine tuning device parameters in the deviation of process aspect, and the clock as caused by temperature and voltage
Deviation and shake are corrected by the dynamic monitoring to clock frequency with feedback in real time in the present invention, realize good clock
Precision.Specific implementation is as follows:
(1) the output clock signal that duty ratio is 50% is generated by clock signal processing module, and by the output clock
Signal generates two-phase non-overlapp-ing clock switching signal;
(2) the two-phase non-overlapp-ing clock switching signal control switch capacitor equivalent resistive module generated realizes one
The equivalent impedance of switching capacity relevant to clock frequency;
(3) equivalent impedance is applied in conjunction with the reference voltage that the voltage and current generation module generates in the clock frequency
In rate-current conversion module, a current signal relevant to clock frequency is generated, which is referred to as proportional current,
By proportional current compared with reference current, error signal (i.e. comparison result) dynamic feedback control of generation clock when adjusting
The output clock frequency of oscillation module.When frequency of oscillation increases, equivalent impedance is reduced, and corresponding proportional current increases, ratio electricity
Stream is greater than reference current, and output error signal level increases, if the P-type device of error signal control clock oscillation module,
So frequency of oscillation will reduce.Vice versa.
In short, the frequency of oscillation of the error signal always negative-feedback dynamic adjustment output clock signal, until output error
Signal is close to 0, at this point, frequency of oscillation is almost ideal close to target clock frequency.When disturbance factor influences clock frequency again
When rate balances, negative-feedback can work again, until clock frequency is stablized.
It is found through actual test, the stability of frequency of oscillation is below 0.5%.
It is practical to occupy also, by above description it is found that not needing clamped amplifier as shown in Figure 1 in the present invention
Area can reduce by 50%~75%, and power consumption also reduces by 50% or more.For example, if switching capacity equivalent resistance module uses
Perhaps MOM capacitor can be realized MIM capacitor by means of top-level metallic or secondary top-level metallic, not occupy chip cost additionally.
The specific structure of modules in the present invention, those skilled in the art basis described below is exemplified below
On, flexibly it can be adjusted and improve.
Below in figure, the label of each device can understand according to this field conventional cognitive, such as " MP* " can be indicated
PMOS transistor, " * " are serial number, such as R indicates resistance, etc..
As shown in figure 3, voltage and current generation module specifically includes that NMOS tube MNAT0 in one embodiment of the invention,
The source electrode ground connection of NMOS tube MNAT1, NMOS tube MNAT0, drain electrode connection grid, and drain electrode is additionally coupled to multiple (a for n in figure, n
=1,2,3 ...) one end of concatenated resistance, the multiple resistance can be consistent, the other end of the multiple concatenated resistance
Supply voltage is connect, realizes and divides from there through resistance, reference voltage VrefA node in self-resistance string is drawn, according to practical
Demand, the node are adjustable.The source electrode of NMOS tube MNAT1 is grounded, and grid connects the grid of NMOS tube MNAT0, is achieved in mirror
Picture.The grid of PMOS tube MP0 and the grid of PMOS tube MP1 are connected to the drain electrode of NMOS tube MNAT1, the source electrode of PMOS tube MP0 and
The source electrode of PMOS tube MP1 connects supply voltage, and the drain electrode of PMOS tube MP0 connects the source electrode of PMOS tube MP2, and the drain electrode of PMOS tube MP1 connects
The source electrode of PMOS tube MP3, the grid of PMOS tube MP2 and the grid of PMOS tube MP3 meet the first bias voltage VCSP, PMOS tube MP2
Drain electrode connect the drain electrode of NMOS tube MNAT1, thus draw reference current I in the drain electrode of PMOS tube MP3ref。
As it can be seen that the voltage and current generation module in the present invention does not need clamped amplifier, reference voltage, reference current
Divider resistance is only related with resistance ratio, unrelated with absolute value, and the resistance of smaller width can be used, as long as the resistance gross area is full
Foot matching requires.
In the present invention, the clock signal processing module generates the output clock signal that duty ratio is 50%, and foundation
The output clock signal generates the two-phase non-overlapp-ing clock switching signal.
Specifically, referring to FIG. 4, the clock signal processing module includes that clock duty cycle adjustment module and non-overlap are opened
OFF signal generation module, the clock duty cycle adjustment module generates the output clock signal that duty ratio is 50%, described non-heavy
Folded switching signal generation module generates two-phase non-overlapp-ing clock switching signal Sw0, Sw1 according to the output clock signal.
The clock signal processing module includes clock duty cycle adjustment module and non-overlap switching signal generation module
For specific structure herein without citing, those skilled in the art can be easily provided out specific design knot under the demand
Structure.
Referring to FIG. 5, in an embodiment of the invention, the switching capacity equivalent resistance module includes first terminal A,
Second terminal B, NMOS tube MN0, NMOS tube MN1, NMOS tube MN2, NMOS tube MN3, first capacitor C0 and the second capacitor C1;It is described
The drain electrode of NMOS tube MN0 and the drain electrode of the NMOS tube MN1 are connected to the first terminal A, the source electrode of the NMOS tube MN1,
The drain electrode of the NMOS tube MN2 is connected with one end of the first capacitor C0, source electrode, the NMOS of the NMOS tube MN1
The drain electrode of pipe MN3 is connected with one end of the second capacitor C1, the source of the source electrode of the NMOS tube MN2, the NMOS tube MN3
The other end of pole, the other end of the first capacitor C0 and the second capacitor C1 is connected to the second terminal B, the NMOS
The grid of pipe MN0 connects a phase clock switching signal Sw0 with the grid of the NMOS tube MN3, the grid of the NMOS tube MN1 and
The grid of the NMOS tube MN2 connects another phase clock switching signal Sw1.
Therefore, if remembering, the frequency of oscillation is fclk, period Tclk, the capacitance of first capacitor and the second capacitor is Cs,
The two-phase non-overlapp-ing clock switching signal turn-on time is Tclk/ 2, quantity of electric charge Q, electric current I, reference voltage Vref, that
Equivalent impedance Z is calculated as follows between first terminal and second terminal:
Q=CS*Vref,
Then, referring to FIG. 6, in an embodiment of the invention, the clock frequency-current conversion module includes NMOS
Pipe MN4, PMOS tube MP4, PMOS tube MP5, amplifier AMP0 and switching capacity equivalent resistance R0, the switching capacity equivalent resistance
R0 is the equivalent impedance of switching capacity equivalent resistance module for example shown in fig. 5, and value is above-mentioned Z, the NMOS tube MN4
Grid connect the output end of the amplifier, the source electrode of the NMOS tube MN4 connects the negative input end of the amplifier AMP0
It is grounded with the other end of one end of the switching capacity equivalent resistance R0, the switching capacity equivalent resistance R0, the two-phase is non-
Overlapping clocks switching signal Sw0, Sw1 are applied to the negative input of the amplifier AMP0 by the switching capacity equivalent resistance R0
End, the positive input terminal of the amplifier AMP0 connect the reference voltage V that the voltage and current generation module generatesref, the NMOS
The drain electrode of pipe MN4 connects the drain and gate of the PMOS tube MP4, and the source electrode of the PMOS tube MP4 connects supply voltage, described
The grid of PMOS tube MP4 is also connected with the grid of the PMOS tube MP5, and the source electrode of the PMOS tube MP5 connects supply voltage, described
The drain electrode of PMOS tube MP5 exports the proportional current Iclk;Then have
Then, referring to FIG. 7, in an embodiment of the invention, the current comparing module include NMOS tube MN5,
NMOS tube MN6, NMOS tube MN7, NMOS tube MN8, NMOS tube MN9, PMOS tube MP6 and PMOS tube MP7, the NMOS tube MN7's
Drain electrode access bias current Ibias, the source electrode of the NMOS tube MN5 connects the drain electrode of the NMOS tube MN6, the NMOS tube MN5
Grid connect itself drain electrode and the NMOS tube MN6 grid, generate the second bias voltage of the NMOS tube MN6 grid
The source electrode of VSCN (by taking N-type Cascode device as an example), the NMOS tube MN6 are grounded, and the drain electrode of the NMOS tube MN7 accesses ginseng
Examine electric current Iref, the grid of the NMOS tube MN7 connect itself drain electrode, the NMOS tube MN7 source electrode ground connection, the NMOS tube
The grid of MN8 connects the grid of the NMOS tube MN7, the source electrode ground connection of the NMOS tube MN8, the drain electrode of the NMOS tube MN8
The source electrode of the NMOS tube MN9 is connected, the grid of the NMOS tube MN9 connects second bias voltage, the NMOS tube MN9
Drain electrode connection and the PMOS tube MP6 drain electrode, the source electrode of the PMOS tube MP6 connects supply voltage, the PMOS tube MP6
Grid connect the grid of the PMOS tube MP7, the source electrode of the PMOS tube MP7 connects supply voltage, the PMOS tube MP7's
Drain electrode connects itself grid, the proportional current IclkAccess the drain electrode of the PMOS tube MP7.Hereby it is achieved that reference current Iref
With proportional current IclkComparison, and third bias voltage VBP can be drawn between NMOS tube MN9 and the PMOS tube MP6
(by taking p-type structure as an example, i.e. the bias voltage of p-type current source).
Referring to FIG. 8, third bias voltage VBP can be applied on ring oscillator, i.e., after obtaining comparison result
In an embodiment of the invention, the clock oscillation module includes N number of paraphase amplification for sequentially inputting end and being connected with output end
Device A1, N number of third capacitor C3, the third capacitor C3 and the inverting amplifier A1 are corresponded, each third capacitor C3's
One end connects the output end of a corresponding inverting amplifier A1, and the other end ground connection of each third capacitor C3 is each described
An offset side of inverting amplifier A1 accesses third bias voltage VBP, and another biasing terminates the 4th bias voltage VBN, described
N-th inverting amplifier A1 output end connection NAND gate G1 an input terminal, each inverting amplifier it is described with
Another input terminal of NOT gate enables EN, and the output end of the NAND gate generates the initial signal CLK.
As it can be seen that the generation of concussion clock signal may be implemented in this way, current control or voltage can be used according to demand
The case where control.
Specifically, clock oscillation frequency can be expressed as follows:
Iclk=K0*Iref,Vref=K2*R*Iref,
Iclk=2Cs*fckl*Vref,
K0*Iref=2Cs*fclk*K2*R*Iref,
Wherein K0、K1、K2It is only related to the current mirror ratio of route design and device ratio for constant, with device parameters
Absolute value is unrelated.VDD is supply voltage, and R is resistance value.
In conclusion, using switching capacity equivalent resistance module, being utilized on high-precision sheet provided by the invention in oscillator
Oscillator clock output realizes on piece resistance (i.e. acquisition equivalent impedance), then realizes that voltage and current turns using reference voltage
Change, obtains the electric current proportional to clock frequency, abbreviation proportional current, then electric current is compared in proportion by reference current, benefit
The frequency of oscillation that the initial signal of clock oscillation module is controlled with comparison result negative-feedback dynamic, to realize high-precision
Upper clock output.
This invention removes oscillators on traditional high-precision sheet to high-precision bandgap voltage reference, high precision reference electric current
Demand, therefore band gap reference can not be needed, so as to reduce silicon area, also eliminate the big quiet of traditional counter structure
State power consumption reduces the cost and power consumption of chip while realizing that high accurate clock signal generates.Specifically, of the invention
Design structure saves two comparators compared with prior art, also saves the power consumption of two comparators, while saving complexity
The power consumption of baseline system.
In addition, the clock signal of wide frequency ranges can be achieved in the present invention.The oscillator clock period that the present invention realizes does not take
Only related with the delay of ring oscillator certainly in the charging time of capacitor, the delay is very small, thus very broadband may be implemented
Clock signal.
The present invention can carry out the correction of clock accuracy with various ways: can for example pass through correction divider resistance, switch electricity
The size of appearance, the ratio of image current realize that clock frequency is corrected.
The present invention realizes that the dynamic of clock frequency adjusts by real-time dynamical feedback technology, the anti-supply voltage of raising clock,
The interference performance of the extraneous factors such as temperature.
Obviously, various changes and modifications can be made to the invention without departing from essence of the invention by those skilled in the art
Mind and range.In this way, if these modifications and changes of the present invention belongs to the range of the claims in the present invention and its equivalent technologies
Within, then the present invention is also intended to include these modifications and variations.
Claims (10)
1. oscillator on a kind of high-precision sheet characterized by comprising
Voltage and current generation module, clock signal processing module, switching capacity equivalent resistance module, clock frequency-electric current conversion
Module, current comparing module and clock oscillation module;
The clock signal processing module generates two-phase non-overlap switch according to the initial clock signal of the clock oscillation module
Signal is transferred to the switching capacity equivalent resistance module and obtains equivalent impedance, and the equivalent impedance is in conjunction with the voltage and current
The reference voltage that generation module generates obtains proportional current in the clock frequency-current conversion module, the proportional current with
The reference current that the voltage and current generation module generates obtains comparison result, the comparison result in the current comparing module
Negative-feedback dynamic controls the frequency of oscillation of the initial signal of the clock oscillation module.
2. oscillator on high-precision sheet as described in claim 1, which is characterized in that voltage and current generation module includes: NMOS
The source electrode of pipe MNAT0, NMOS tube MNAT1, NMOS tube MNAT0 are grounded, drain electrode connection grid, and drain electrode is additionally coupled to multiple series connection
Resistance one end, another termination supply voltage of the multiple concatenated resistance, a section in reference voltage self-resistance string
Point is drawn, and the source electrode ground connection of NMOS tube MNAT1, grid connects the grid of NMOS tube MNAT0, the grid and PMOS of PMOS tube MP0
The grid of pipe MP1 is connected to the drain electrode of NMOS tube MNAT1, and the source electrode of PMOS tube MP0 and the source electrode of PMOS tube MP1 connect power supply electricity
Pressure, the drain electrode of PMOS tube MP0 connect the source electrode of PMOS tube MP2, and the drain electrode of PMOS tube MP1 connects the source electrode of PMOS tube MP3, PMOS tube
The grid of MP2 and the grid of PMOS tube MP3 connect the first bias voltage, and the drain electrode of PMOS tube MP2 connects the drain electrode of NMOS tube MNAT1,
Thus reference current is drawn in the drain electrode of PMOS tube MP3.
3. oscillator on high-precision sheet as claimed in claim 1 or 2, which is characterized in that the clock signal processing module produces
The output clock signal that raw duty ratio is 50%, and the two-phase non-overlapp-ing clock switch is generated according to the output clock signal
Signal.
4. oscillator on high-precision sheet as claimed in claim 3, which is characterized in that when the clock signal processing module includes
Clock duty cycle adjustment module and non-overlap switching signal generation module, the clock duty cycle adjustment module generate duty ratio and are
50% output clock signal, the non-overlap switching signal generation module generate the two-phase according to the output clock signal
Non-overlapping clock switching signal.
5. oscillator on high-precision sheet as described in claim 1, which is characterized in that the switching capacity equivalent resistance module packet
Include first terminal, second terminal, NMOS tube MN0, NMOS tube MN1, NMOS tube MN2, NMOS tube MN3, first capacitor and the second electricity
Hold;The drain electrode of the NMOS tube MN0 and the drain electrode of the NMOS tube MN1 are connected to the first terminal, the NMOS tube MN0's
The drain electrode of source electrode, the NMOS tube MN2 is connected with one end of the first capacitor, the source electrode of the NMOS tube MN1, described
The drain electrode of NMOS tube MN3 is connected with one end of second capacitor, the source electrode of the NMOS tube MN2, the NMOS tube MN3
The other end of source electrode, the other end of the first capacitor and second capacitor is connected to the second terminal, the NMOS tube
The grid of MN0 connects a phase clock switching signal with the grid of the NMOS tube MN3, the grid of the NMOS tube MN1 and described
The grid of NMOS tube MN2 connects another phase clock switching signal.
6. oscillator on high-precision sheet as claimed in claim 5, which is characterized in that the frequency of oscillation is fclk, the period is
Tclk, the capacitance of first capacitor and the second capacitor is Cs, the two-phase non-overlapp-ing clock switching signal turn-on time is Tclk/ 2,
The quantity of electric charge is Q, electric current I, reference voltage Vref, then equivalent impedance Z calculating is as follows between first terminal and second terminal:
Q=CS*Vref,
7. oscillator on high-precision sheet as claimed in claim 6, which is characterized in that the clock frequency-current conversion module
Including NMOS tube MN4, PMOS tube MP4, PMOS tube MP5, amplifier and switching capacity equivalent resistance, the grid of the NMOS tube MN4
Pole connects the output end of the amplifier, and the source electrode of the NMOS tube MN4 connects the negative input end of the amplifier and described opens
Powered-down one end for holding equivalent resistance, the other end ground connection of the switching capacity equivalent resistance, the two-phase non-overlapp-ing clock switch
Signal is applied to the negative input end of the amplifier, the positive input terminal of the amplifier by the switching capacity equivalent resistance
Connect the reference voltage V that the voltage and current generation module generatesref, the drain electrode connection PMOS tube of the NMOS tube MN4
The drain and gate of MP4, the source electrode of the PMOS tube MP4 connect supply voltage, and the grid of the PMOS tube MP4 is also connected with described
The grid of PMOS tube MP5, the source electrode of the PMOS tube MP5 connect supply voltage, and the source electrode of the PMOS tube MP5 exports the ratio
Example electric current;Then have
Wherein IclkFor the proportional current.
8. oscillator on high-precision sheet as claimed in claim 7, which is characterized in that the current comparing module includes NMOS tube
MN5, NMOS tube MN6, NMOS tube MN7, NMOS tube MN8, NMOS tube MN9, PMOS tube MP6 and PMOS tube MP7, the NMOS tube
The drain electrode of MN7 accesses bias current, and the source electrode of the NMOS tube MN5 connects the drain electrode of the NMOS tube MN6, the NMOS tube
The grid of MN5 connects the grid of itself drain electrode and the NMOS tube MN6, generates the second biased electrical of the NMOS tube MN6 grid
Pressure, the source electrode ground connection of the NMOS tube MN6, the drain electrode of the NMOS tube MN7 access reference current, the grid of the NMOS tube MN7
Pole connects itself drain electrode, the source electrode ground connection of the NMOS tube MN7, and the grid of the NMOS tube MN8 connects the NMOS tube MN7's
Grid, the source electrode ground connection of the NMOS tube MN8, the drain electrode of the NMOS tube MN8 connects the source electrode of the NMOS tube MN9, described
The grid of NMOS tube MN9 connects second bias voltage, and the drain electrode connection of the NMOS tube MN9 is with the PMOS tube MP6's
The source electrode of drain electrode, the PMOS tube MP6 connects supply voltage, and the grid of the PMOS tube MP6 connects the grid of the PMOS tube MP7
The source electrode of pole, the PMOS tube MP7 connects supply voltage, and the drain electrode of the PMOS tube MP7 connects itself grid and is grounded, described
Proportional current accesses the drain electrode of the PMOS tube MP7, hereby it is achieved that the comparison of reference current and proportional current, and in NMOS
Third bias voltage is drawn between pipe MN9 and the PMOS tube MP6.
9. oscillator on high-precision sheet as claimed in claim 8, which is characterized in that the clock oscillation module include it is N number of according to
The inverting amplifier that secondary input end is connected with output end, N number of third capacitor, the third capacitor and the inverting amplifier are one by one
Corresponding, one end of each third capacitor connects the output end of a corresponding inverting amplifier, each third capacitor it is another
End ground connection, an input terminal of the output end connection NAND gate of the n-th inverting amplifier, another of the NAND gate are defeated
Enter end to enable, the output end of the NAND gate generates the initial signal, the biasing termination of each inverting amplifier
Enter third bias voltage, another biasing terminates the 4th bias voltage.
10. oscillator on high-precision sheet as claimed in claim 9, which is characterized in that
Iclk=K0*Iref,Vref=K2*R*Iref,
Iclk=2Cs*fckl*Vref,
K0*Iref=2Cs*fclk*K2*R*Iref,
Wherein K0、K1、K2For constant, VDD is supply voltage, and R is resistance.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811283014.3A CN109194328A (en) | 2018-10-31 | 2018-10-31 | Oscillator on high-precision sheet |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811283014.3A CN109194328A (en) | 2018-10-31 | 2018-10-31 | Oscillator on high-precision sheet |
Publications (1)
Publication Number | Publication Date |
---|---|
CN109194328A true CN109194328A (en) | 2019-01-11 |
Family
ID=64940775
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811283014.3A Pending CN109194328A (en) | 2018-10-31 | 2018-10-31 | Oscillator on high-precision sheet |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109194328A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111917293A (en) * | 2020-06-22 | 2020-11-10 | 东南大学 | Switched capacitor DC-DC converter in multi-voltage domain composite feedback mode |
CN112671401A (en) * | 2020-12-31 | 2021-04-16 | 西安拓尔微电子有限责任公司 | Adjustable high-frequency oscillator CMOS circuit with adjustable precision and adjusting method |
WO2022100754A1 (en) * | 2020-11-16 | 2022-05-19 | 唯捷创芯(天津)电子技术股份有限公司 | On-chip rc oscillator, chip, and communication terminal |
CN115529024A (en) * | 2022-11-30 | 2022-12-27 | 上海海栎创科技股份有限公司 | On-chip clock oscillator circuit and oscillation frequency control method |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103078635A (en) * | 2012-12-28 | 2013-05-01 | 杭州士兰微电子股份有限公司 | Embedded oscillation circuit |
CN103873054A (en) * | 2014-03-31 | 2014-06-18 | 杭州士兰微电子股份有限公司 | Clock generator |
CN105743493A (en) * | 2014-12-31 | 2016-07-06 | 德克萨斯仪器股份有限公司 | Oscillator with frequency control loop |
CN106788410A (en) * | 2016-12-26 | 2017-05-31 | 上海迦美信芯通讯技术有限公司 | The circuit of orthogonal local oscillation signal is produced using injection locking ring oscillator |
CN107659268A (en) * | 2017-10-23 | 2018-02-02 | 广州启途科技有限公司 | The wide scope temperature compensation of voltage controlled oscillator in chip |
CN208369560U (en) * | 2018-10-31 | 2019-01-11 | 上海海栎创微电子有限公司 | Oscillator on high-precision sheet |
-
2018
- 2018-10-31 CN CN201811283014.3A patent/CN109194328A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103078635A (en) * | 2012-12-28 | 2013-05-01 | 杭州士兰微电子股份有限公司 | Embedded oscillation circuit |
CN103873054A (en) * | 2014-03-31 | 2014-06-18 | 杭州士兰微电子股份有限公司 | Clock generator |
CN105743493A (en) * | 2014-12-31 | 2016-07-06 | 德克萨斯仪器股份有限公司 | Oscillator with frequency control loop |
CN106788410A (en) * | 2016-12-26 | 2017-05-31 | 上海迦美信芯通讯技术有限公司 | The circuit of orthogonal local oscillation signal is produced using injection locking ring oscillator |
CN107659268A (en) * | 2017-10-23 | 2018-02-02 | 广州启途科技有限公司 | The wide scope temperature compensation of voltage controlled oscillator in chip |
CN208369560U (en) * | 2018-10-31 | 2019-01-11 | 上海海栎创微电子有限公司 | Oscillator on high-precision sheet |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111917293A (en) * | 2020-06-22 | 2020-11-10 | 东南大学 | Switched capacitor DC-DC converter in multi-voltage domain composite feedback mode |
CN111917293B (en) * | 2020-06-22 | 2021-06-22 | 东南大学 | Switched capacitor DC-DC converter in multi-voltage domain composite feedback mode |
WO2022100754A1 (en) * | 2020-11-16 | 2022-05-19 | 唯捷创芯(天津)电子技术股份有限公司 | On-chip rc oscillator, chip, and communication terminal |
CN112671401A (en) * | 2020-12-31 | 2021-04-16 | 西安拓尔微电子有限责任公司 | Adjustable high-frequency oscillator CMOS circuit with adjustable precision and adjusting method |
CN112671401B (en) * | 2020-12-31 | 2024-05-24 | 拓尔微电子股份有限公司 | Adjustable high-frequency oscillator CMOS circuit with adjusting precision and adjusting method |
CN115529024A (en) * | 2022-11-30 | 2022-12-27 | 上海海栎创科技股份有限公司 | On-chip clock oscillator circuit and oscillation frequency control method |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109194328A (en) | Oscillator on high-precision sheet | |
CN106059538B (en) | A kind of relaxor of included process deviation calibration function | |
CN105388953B (en) | A kind of bandgap voltage reference with high PSRR | |
CN112290889B (en) | On-chip RC oscillator, chip and communication terminal | |
KR0185406B1 (en) | Electrically controllable oscillator circuit and electrically controllable filter arrangement comprising said circuit | |
US20020041217A1 (en) | Precision oscillator circuits and methods with switched capacitor frequency control and frequency-setting resistor | |
CN105932976B (en) | A kind of temperature-compensation circuit for crystal oscillator | |
CN105628243B (en) | A kind of resistor-type temperature sensing chip | |
CN102710124B (en) | Charge pump circuit | |
CN113489460B (en) | RC oscillating circuit and RC oscillator | |
TW202008714A (en) | Voltage-controlled oscillator, pll circuit, and cdr device | |
CN109164867A (en) | Full MOS reference current generating circuit | |
CN115395888A (en) | Low-power-consumption high-precision RC oscillator based on cycle detection | |
CN110011644B (en) | Ring oscillator | |
CN104811189A (en) | Charge pump circuit in charge pump phase-locked loop | |
CN208369560U (en) | Oscillator on high-precision sheet | |
WO2020105182A1 (en) | Voltage-controlled oscillator and pll circuit in which same is used | |
TWI384761B (en) | Low jitter, wide operating frequency band and frequency synthesis system suitable for low voltage operation | |
CN102545779A (en) | Crystal-oscillation-free clock circuit | |
CN115529024B (en) | On-chip clock oscillator circuit and oscillation frequency control method | |
CN101820282B (en) | Low-jitter and wide-bandwidth frequency synthesizer system suitable for low-voltage operation | |
CN107959476B (en) | Low-power consumption current starvation type oscillator circuit | |
CN105227179A (en) | Oscillating circuit | |
CN211352179U (en) | Delay locked loop circuit | |
CN114421928A (en) | Oscillator circuit and phase-locked loop circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
CB02 | Change of applicant information | ||
CB02 | Change of applicant information |
Address after: Room 411, 4th floor, main building, No. 835 and 937, Dangui Road, China (Shanghai) pilot Free Trade Zone, Pudong New Area, Shanghai, 200131 Applicant after: Shanghai hailichuang Technology Co.,Ltd. Address before: 201203 Room 411, 4th Floor, Main Building (1 Building) of Zhangjiang Guochuang Center, 899 Dangui Road, Pudong New Area, Shanghai Applicant before: SHANGHAI HYNITRON MICROELECTRONIC Co.,Ltd. |