CN109194171A - A kind of MMC optimization method substantially reducing submodule capacitor's capacity - Google Patents

A kind of MMC optimization method substantially reducing submodule capacitor's capacity Download PDF

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Publication number
CN109194171A
CN109194171A CN201811155856.0A CN201811155856A CN109194171A CN 109194171 A CN109194171 A CN 109194171A CN 201811155856 A CN201811155856 A CN 201811155856A CN 109194171 A CN109194171 A CN 109194171A
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CN
China
Prior art keywords
mmc
capacity
submodule
submodule capacitor
substantially reducing
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CN201811155856.0A
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Chinese (zh)
Inventor
蔡旭
董鹏
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Shanghai Jiaotong University
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Shanghai Jiaotong University
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Priority to CN201811155856.0A priority Critical patent/CN109194171A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/5388Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with asymmetrical configuration of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • H02M7/4835Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

The invention discloses a kind of MMC optimization methods for substantially reducing submodule capacitor's capacity comprising: 2 frequency multiplication circulation being calculated in real time are injected into inverter;It is fundamental frequency 1/6, phase 3 frequency multiplication common-mode voltage identical with fundamental frequency that amplitude is injected in modulating wave.The MMC optimization method for substantially reducing submodule capacitor's capacity of the invention, can significantly reduce submodule capacitor's capacity, and then reduce the cost of multilevel converter, improve the power density of multilevel converter.

Description

A kind of MMC optimization method substantially reducing submodule capacitor's capacity
Technical field
The present invention relates to power electronics field, in particular to a kind of MMC for substantially reducing submodule capacitor's capacity is excellent Change method.
Background technique
Modularization multi-level converter (modular multilevel converter, MMC) is easy to linear expansion and superfluous Remaining design, is lost low, and harmonic characterisitic is good, and flexible DC transmission, DC distribution, offshore wind farm be grid-connected etc., fields have a high potential. Solution by mainstream suppliers such as Siemens, ABB as flexible DC transmission.
Currently, the flexible DC transmission engineering based on MMC to have put into operation is all made of cable as direct current transmission route, with Being continuously increased for voltage, capacity and distance is transmitted, using the overhead line with obvious economic and technical advantage as direct current transmission Route is inevitable choice.Since overhead transmission line is easy to appear transient fault, to cope with the problem, there are two kinds of technology roads Line, one is half-bridge MMC to install dc circuit breaker additional, and another kind is using the MMC with DC Line Fault processing capacity.Therefore, half Bridge MMC, full-bridge MMC and mixing MMC become the topological structure of mainstream.
However due to submodule capacitor account for submodule volume and weight 1/2 or more, cost 1/3 or so, either half Bridge MMC, full-bridge MMC still mix MMC, and submodule capacitor is all an important factor for influencing inverter cost and volume.
Therefore, it seeks effective repressor module capacitance voltage fluctuation and then reduces the method for submodule capacitor's capacity, have Important engineering significance.
Summary of the invention
The present invention is directed to above-mentioned problems of the prior art, proposes that a kind of MMC of substantially submodule capacitor's capacity is excellent Change method can significantly reduce submodule capacitor's capacity, and then reduce the cost of inverter, improve the function of multilevel converter Rate density.
In order to solve the above technical problems, the present invention is achieved through the following technical solutions:
The present invention provides a kind of MMC optimization method of substantially submodule capacitor's capacity comprising:
S11: 2 frequency multiplication circulation being calculated in real time are injected into inverter;
S12: it is fundamental frequency 1/6, phase 3 frequency multiplication common mode electricity identical with fundamental frequency that amplitude is injected in modulating wave Pressure;
The process S11 and process S12 in no particular order sequence.
The MMC optimization method of substantially submodule capacitor's capacity of the invention is injected using 2 frequency multiplication circulation substantially to reduce 2 Frequency multiplication voltage fluctuation of capacitor is injected using 3 frequency multiplication common-mode voltages to reduce fundamental frequency voltage fluctuation of capacitor, can reduce on-state damage In the case where consumption, substantially reduces submodule capacitance demand, submodule capacitor's capacity can be reduced to conventional about 1/3, reduction is changed The cost for flowing device, improves the power density of inverter.
Preferably, further including following below scheme after the process S11 and process S12:
S13: the relationship of when power factor is fluctuated and modulated by analysis submodule capacitor voltage, is obtained in certain power Make modulation ratio corresponding to submodule capacitor voltage fluctuation minimum in the case where factor.
Preferably, after the process S13 further include:
S14: divided by the constraint condition being pressed into inverter AC DC electric and submodule capacitor voltage balances Analysis, the submodule quantity optimized.
Preferably, further including following below scheme after the process S11 and process S12:
S15: half-bridge submodule is modulated using third-harmonic zero-sequence voltage;And/or sine wave tune is used to full-bridge submodule System.
Preferably, the triple-frequency harmonics and/or the sine wave are allocated according to calculated value.
Compared to the prior art, the invention has the following advantages that
(1) the MMC optimization method for substantially reducing submodule capacitor's capacity of the invention, is injected using 2 frequency multiplication circulation come big 2 double-frequency fluctuations of width reduction submodule capacitor voltage;It is injected using 3 frequency multiplication common-mode voltages substantially to reduce submodule capacitor voltage Fundamental frequency fluctuation, can in the case where reducing on-state loss, substantially reduction submodule capacitance demand, submodule capacitor can be held Value is reduced to conventional about 1/3, reduces the cost of inverter, improves the power density of inverter, is particularly suitable for offshore platform Deng to the higher occasion of floor area requirement, there is important engineering significance;
(2) the MMC optimization method for substantially reducing submodule capacitor's capacity of the invention, is injected using 3 frequency multiplication common-mode voltages It preferably can substantially reduce the fundamental frequency fluctuation of submodule capacitor voltage, better effect in conjunction with optimization modulation ratio;
(3) the MMC optimization method for substantially reducing submodule capacitor's capacity of the invention, has versatility, can be adapted for Half-bridge multilevel converter, full-bridge multilevel converter and mixed multi-level inverter.
Certainly, it implements any of the products of the present invention and does not necessarily require achieving all the advantages described above at the same time.
Detailed description of the invention
Embodiments of the present invention are described further with reference to the accompanying drawing:
Fig. 1 is the circuit diagram of the modularization multi-level converter of the embodiment of the present invention;
Fig. 2 is the submodule capacitor voltage fluction analysis figure of the embodiment of the present invention;
Fig. 3 (a) is that the HBSM of presently preferred embodiments of the present invention normalizes modulating wave generation schematic diagram;
Fig. 3 (b) is that the FBSM of presently preferred embodiments of the present invention normalizes modulating wave generation schematic diagram;
Fig. 4 is the emulation schematic diagram of conventional MMC;
Fig. 5 is the emulation schematic diagram of the MMC of presently preferred embodiments of the present invention.
Specific embodiment
Elaborate below to the embodiment of the present invention, following embodiment under the premise of the technical scheme of the present invention into Row is implemented, and the detailed implementation method and specific operation process are given, but protection scope of the present invention is not limited to following realities Apply example.
In the embodiment of MMC optimization method for substantially reducing submodule capacitor's capacity of the invention comprising to flow down Journey:
S11: 2 frequency multiplication circulation being calculated in real time are injected into inverter;
S12: it is fundamental frequency 1/6, phase 3 frequency multiplication common mode electricity identical with fundamental frequency that amplitude is injected in modulating wave Pressure;
Process S11 and process S12 sequentially, can also be carried out simultaneously in no particular order.
The present embodiment can substantially reduce submodule capacitance demand by 2 frequency multiplication circulation of injection and 3 frequency multiplication common-mode voltages, can Submodule capacitor's capacity is reduced to conventional about 1/3.
It is former for the circuit of the modularization multi-level converter using above-mentioned MMC optimization method of an embodiment as shown in Figure 1 Reason figure, each phase element includes upper and lower two bridge arms, and each bridge arm is by N number of submodule (including Nh HBSM and Nf FBSM) It is connected in series with bridge arm inductance L.The capacitor's capacity of HBSM is Ch, and the capacitor's capacity of FBSM is Cf.It is half-bridge MMC when Nf=0, It is full-bridge MMC, N when Nh=0h≠ 0 and NfWhen ≠ 0, to mix MMC.
In preferred embodiment, in conjunction with inverter run constraint condition, to modulation ratio, submodule quantity, control strategy and The selection of submodule capacitance optimizes, and is described in greater detail below.In preferred embodiment, process S11 and process Further include following below scheme after S12:
S13: the relationship of when power factor is fluctuated and modulated by analysis submodule capacitor voltage, is obtained in certain power Make modulation ratio corresponding to submodule capacitor voltage fluctuation minimum in the case where factor.
Submodule capacitor voltage fluctuation is shown below, and Fig. 2 show submodule capacitor voltage fluctuation peak-to-peak value and power The relationship at factor angle and modulation ratio, it can be seen that converter unity power factor operation and when modulation ratio m=1.15, submodule Voltage fluctuation of capacitor peak-to-peak value is minimum.When power-factor angle is in the π of -0.1 π≤φ≤0.1 (φ≤1 0.95≤cos) range, electricity Hold voltage fluctuation peak-to-peak value to increase afterwards as the increase of modulation ratio first reduces, obtains minimum value in the range of 0.9 1.2 < < m.
In formula: m is modulation ratio,For power-factor angle, S is inverter apparent energy, and Vc is that submodule capacitor voltage is straight Flow component,The friendship of bridge arm half-bridge submodule (HBSM) and full-bridge submodule (FBSM) capacitance voltage respectively in a phase Flow wave component.
In preferred embodiment, after process S13 further include:
S14: divided by the constraint condition being pressed into inverter AC DC electric and submodule capacitor voltage balances Analysis, the submodule quantity optimized.
In one embodiment, under DC voltage and the identical situation of transimission power, the modular multilevel of conventional design The design parameter of inverter is as follows:
DC voltage is 640kV, and exchange side line voltage effective value is 333kV, rated power 1000MW, in each bridge arm There are 10 half-bridge submodules and 10 full-bridge submodules, bridge arm inductance 50mH, submodule capacitor is 0.41mF, and converter is according to list Position power factor operation.
The modularization multi-level converter design parameter of optimization design is as follows:
DC voltage is 640kV, and exchange side line voltage effective value is 333kV, rated power 1000MW, in each bridge arm There are 11 half-bridge submodules and 10 full-bridge submodules, bridge arm inductance 50mH, half-bridge submodule capacitor is 0.14mF, full-bridge submodule Block capacitor is 0.123mF, and converter is run according to unity power factor.
In the present embodiment, MMC exchange flanks power grid, DC side connecting resistance, using the control strategy for determining DC voltage, as Rectifier operation.
Further include following below scheme after process S11 and process S12 in preferred embodiment:
S15: half-bridge submodule is modulated using third-harmonic zero-sequence voltage;And/or sine wave tune is used to full-bridge submodule System.Triple-frequency harmonics and/or sine wave are allocated according to calculated value.
Fig. 3 a, 3b show half-bridge submodule and the modulating wave of full-bridge submodule generates schematic diagram, wherein half-bridge submodule It is modulated using third-harmonic zero-sequence voltage, full-bridge submodule uses sine wave modulation.
It in the present embodiment, is emulated in MATLAB emulation platform, the mixing MMC submodule of conventional design under rated condition Shown in block voltage fluctuation of capacitor Fig. 4, shown in the mixing MMC submodule capacitor voltage wave pattern 5 of optimization design.It is sub in the case of two kinds The peak-to-peak value of module capacitance voltage fluctuation is the 20% of DC quantity, but the mixing MMC submodule capacitance demand of optimization design It is reduced to original about 1/3.
In other embodiments, each bridge arm is by NhA half-bridge submodule and NfA full-bridge submodule and corresponding bridge arm Impedance is connected in series.
In identical DC voltage and the identical power of transmission, the modularization multi-level converter of the present embodiment can substantially subtract Small submodule capacitance, about 1/3 before the capacitance demand of inverter can be reduced to optimization, while can reduce on-state loss.
The modularization multi-level converter of above-described embodiment has versatility, can be used for half-bridge multilevel converter, complete Bridge multilevel converter and mixed multi-level inverter.
Disclosed herein is merely a preferred embodiment of the present invention, these embodiments are chosen and specifically described to this specification, is Principle and practical application in order to better explain the present invention is not limitation of the invention.Anyone skilled in the art The modifications and variations done within the scope of specification should all be fallen in the range of of the invention protect.

Claims (5)

1. a kind of MMC optimization method for substantially reducing submodule capacitor's capacity characterized by comprising
S11: 2 frequency multiplication circulation being calculated in real time are injected into inverter;
S12: it is fundamental frequency 1/6, phase 3 frequency multiplication common-mode voltage identical with fundamental frequency that amplitude is injected in modulating wave;
The process S11 and process S12 in no particular order sequence.
2. the MMC optimization method according to claim 1 for substantially reducing submodule capacitor's capacity, which is characterized in that described Further include following below scheme after the process S11 and process S12:
S13: the relationship of when power factor is fluctuated and modulated by analysis submodule capacitor voltage, is obtained in certain power factor In the case where make submodule capacitor voltage fluctuation minimum corresponding to modulation ratio.
3. the MMC optimization method according to claim 2 for substantially reducing submodule capacitor's capacity, which is characterized in that described After process S13 further include:
S14: it is analyzed, is obtained by the constraint condition being pressed into inverter AC DC electric and submodule capacitor voltage balances To the submodule quantity of optimization.
4. the MMC optimization method according to claim 1 for substantially reducing submodule capacitor's capacity, which is characterized in that described Further include following below scheme after the process S11 and process S12:
S15: half-bridge submodule is modulated using third-harmonic zero-sequence voltage;And/or sine wave modulation is used to full-bridge submodule.
5. the MMC optimization method according to claim 4 for substantially reducing submodule capacitor's capacity, which is characterized in that described Triple-frequency harmonics and/or the sine wave are allocated according to calculated value.
CN201811155856.0A 2018-09-30 2018-09-30 A kind of MMC optimization method substantially reducing submodule capacitor's capacity Pending CN109194171A (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109861569A (en) * 2019-03-12 2019-06-07 东南大学 A kind of novel modularized multilevel converter and its control method inhibiting voltage fluctuation of capacitor
CN111697853A (en) * 2020-06-03 2020-09-22 上海交通大学 Hybrid modulation method of modular multilevel converter
CN111900888A (en) * 2020-07-08 2020-11-06 中国南方电网有限责任公司超高压输电公司天生桥局 Converter modulation wave optimization method and system and converter control method based on same
CN115528927A (en) * 2022-11-25 2022-12-27 东南大学 Method, system and equipment for reducing capacitance value of MMC capacitor

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
董鹏等: "大幅减小子模块电容容值的MMC优化方法", 《中国电机工程学报》 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109861569A (en) * 2019-03-12 2019-06-07 东南大学 A kind of novel modularized multilevel converter and its control method inhibiting voltage fluctuation of capacitor
CN111697853A (en) * 2020-06-03 2020-09-22 上海交通大学 Hybrid modulation method of modular multilevel converter
CN111697853B (en) * 2020-06-03 2022-03-25 上海交通大学 Hybrid modulation method of modular multilevel converter
CN111900888A (en) * 2020-07-08 2020-11-06 中国南方电网有限责任公司超高压输电公司天生桥局 Converter modulation wave optimization method and system and converter control method based on same
CN115528927A (en) * 2022-11-25 2022-12-27 东南大学 Method, system and equipment for reducing capacitance value of MMC capacitor

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