CN109189722A - A kind of instrumented data acquisition system based on FF fieldbus - Google Patents
A kind of instrumented data acquisition system based on FF fieldbus Download PDFInfo
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- G06F15/76—Architectures of general purpose stored program computers
- G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
- G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
- G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
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Abstract
The invention discloses a kind of, and the instrumented data based on FF fieldbus obtains system, and including fpga chip and the CPU connecting with main website, fpga chip is not only connect with CPU, but also is connect by FF bus with multiple instrument；CPU, which can control fpga chip and convert the CPU signal sent to after echo signal, is sent to each instrument by FF bus, to obtain the target data of each instrument, and then realizes the data interaction between CPU and each instrument.Fpga chip comes with hardware interface corresponding with CPU, and maintenance and replacement process are simple, compared with obtaining the data of each instrument by the way of " CPU+FF special chip " in the prior art, and then the communications difficulties between dcs and intelligence instrument can be reduced.
Description
Technical field
The present invention relates to electric system application field, in particular to a kind of instrumented data based on FF fieldbus obtains system
System.
Background technique
FF foundation fieldbus is a kind of automation bus standard, by low speed (FF-H1) and high speed (FF-HSE) two
It is grouped as, the communication being mainly used between the intelligence instrument in process automation system, forms FCS field bus control system.?
That is needing to be communicated based on FF bus protocol between DCS dcs and intelligence instrument.
But since FF bus protocol is extremely complex, the FF bus product development process period is very long, required cost compared with
Height, product design are difficult.Currently, FF bus core technology is all rested in substantially in external some major companies, China pair
The research institution of this FF bus is very few.FF bus product currently on the market is mainly FF-H1 slave station equipment, the reality of main website
Existing technology is concentrated mainly in a small number of manufacturers, and cost of implementation is higher.And in existing product, FF-H1 bottom (part physical
Layer and data link layer) also generally integrated FF special chip (the FB3050 chip of such as SMAR company) is realized, that is, use " CPU+FF
The implementation of special chip ", original this implementation will lead to FF bottom Function Extension and be restricted, CPU software journey
The realization of sequence is also restricted because of the regulation of Chip Interface Based, and the maintenance and replacement complex procedures of special chip.
It can be seen that the problem of how reducing the communications difficulties between dcs and intelligence instrument is this field
Technical staff's urgent problem to be solved.
Summary of the invention
The embodiment of the present application provides a kind of instrumented data acquisition system based on FF fieldbus, to solve the prior art
In the problem of how reducing the communications difficulties between dcs and intelligence instrument.
In order to solve the above technical problems, the present invention provides a kind of, the instrumented data based on FF fieldbus obtains system,
Include:
The CPU being connect with main website, the fpga chip being connect with the CPU, the fpga chip by FF bus with it is multiple
Instrument connection；The CPU passes through institute for controlling the fpga chip and converting the CPU signal sent to after echo signal
It states FF bus and is sent to each instrument to obtain the target data of each instrument.
Preferably, the CPU is specially ZYNQ chip, and the ZYNQ chip includes two arm processors and PL of the side PS
One fpga chip of side.
Preferably, further includes:
The communication module connecting with the CPU, the communication module are used to the target data being transmitted to mobile terminal.
Preferably, the communication module specifically includes WIFI module or bluetooth module or GPRS module.
Preferably, the fpga chip includes Manchester encoder and the manchester decoder, the Man Chesi
For special encoder for being sent to each instrument after being encoded the signal, the manchester decoder is used for will be described
Target data is sent to the CPU after being decoded.
Preferably, further includes:
The alarm module connecting with the CPU, the alarm module are used to work as the target data that the CPU is obtained and are
When fault data, warning note.
Preferably, further includes:
The display device connecting with the CPU, the display device is for showing the target data and warning message.
Preferably, the alarm module is specially buzzer and/or indicator light.
Preferably, the target data includes the electric signal of each instrument, temperature data and fault data.
Preferably, the CPU is also integrated with memory module, and the memory module is for storing the electric signal, the temperature
Degree is accordingly and the fault data.
Compared with the prior art, a kind of instrumented data based on FF fieldbus provided by the present invention obtains system, packet
The CPU for including fpga chip and connecting with main website, fpga chip are not only connect with CPU, but also pass through FF bus and multiple instrument
Connection；CPU, which can control fpga chip and convert the CPU signal sent to after echo signal, is sent to each instrument by FF bus
Table to obtain the target data of each instrument, and then realizes the data interaction between CPU and each instrument.Fpga chip is certainly
It with hardware interface corresponding with CPU, and repairs and replacement process is simple, and uses " CPU+FF special chip " in the prior art
Mode obtain the data of each instrument and compare, and then the hardly possible of the communication between dcs and intelligence instrument can be reduced
Degree.
Detailed description of the invention
Fig. 1 is a kind of instrumented data acquisition system structure signal based on FF fieldbus provided by the embodiment of the present invention
Figure；
Fig. 2 is that another kind provided by the embodiment of the present invention is shown based on the instrumented data acquisition system structure of FF fieldbus
It is intended to.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, those of ordinary skill in the art without making creative work it is obtained it is all its
Its embodiment, shall fall within the protection scope of the present invention.
The core of the invention instrumented data that there is provided a kind of based on FF fieldbus obtains system, can solve existing
The problem of communications difficulties between dcs and intelligence instrument how are reduced in technology.
Scheme in order to enable those skilled in the art to better understand the present invention, with reference to the accompanying drawing and specific embodiment party
The present invention is described in further detail for formula.
Fig. 1 is a kind of instrumented data acquisition system structure signal based on FF fieldbus provided by the embodiment of the present invention
Figure, as shown in Figure 1, the acquisition system includes:
The CPU 10 connecting with main website, the fpga chip 11 connecting with CPU 10, fpga chip 11 pass through FF bus and more
A instrument 13 connects；CPU 10 is converted into after echo signal that pass through FF total for controlling fpga chip 11 for the CPU signal sent
Line is sent to each instrument 13 to obtain the target data of each instrument 13.
In the prior art, it is desirable to obtain the related data of instrument 13, it usually needs pass through special chip, such as SMAR company
FB3050 chip realize, FF bottom Function Extension will lead to using special chip and be restricted, and phase in the process of implementation
The realization for closing software program can be also restricted because of the regulation of Chip Interface Based, while if special chip breaks down
When, repair and replace complex procedures.And instrumented data provided by the embodiments of the present application obtains system, replaces original with fpga chip 11
Some special chips, fpga chip 11 are not only connect with CPU 10, but also are connect by FF bus with multiple instrument 13, FPGA core
The signal that CPU 10 is sent can be carried out conversion and obtain echo signal by piece 11, then pass through FF bus again for the target after conversion
Signal is sent to each instrument 13 to obtain the target data of each instrument 13, because instrument 13 does not identify what CPU 10 was directly transmitted
Signal, CPU 10 cannot send coherent signal directly to the instrument 13 of user terminal, can only be sent out CPU 10 by fpga chip 11
The signal sent is converted to the target data that instrument 13 could be obtained after the echo signal that instrument 13 can identify.Preferably implement
Mode, target data include the electric signal of each instrument, temperature data and fault data.In order to be stored to related data,
It is checked convenient for the later period, preferably embodiment, CPU 10 is also integrated with memory module, and memory module is for storing telecommunications
Number, temperature data and fault data.Interface driver on fpga chip 11 can be between CPU 10 and fpga chip 11
Data interaction provides access and the data interaction between each instrument 13 on CPU 10 and FF bus may be implemented by the access,
And the various diagnostic messages of link and each instrument 13 can be got in real time.It can be grasped using VxWorks in the embodiment of the present application
Make system or (SuSE) Linux OS or QNX operating system etc..
FF bus protocol in the embodiment of the present application includes shared drive access process, fieldbus message specification layer, FF
Fieldbus access sub-layer, system administration, network management and data link layer.
Shared drive access process is responsible for carrying out the communication of FF bus and shared drive.Shared drive in program access into
Journey obtains data and is judged from shared drive, sends it to corresponding process (such as fieldbus using message queue
Message specification layer).Associated process (such as fieldbus message specification layer) is accessed by shared drive by data using message queue
It is filled into shared drive.
Fieldbus message specification layer defines user using required communication service, information format and behavior state etc..
It to by way of data carry out encoding and decoding, while for user apply necessary service is provided, these services are set including virtual field
Standby, object dictionary, communication relationship management, Event Service, variables access, domain and routine call etc..Fieldbus in program
Message specification layer process chooses different treatment processes according to the source of data, another one is the data that processing carrys out self-application
Kind is to handle the data from FF fieldbus access sub-layer.After fieldbus message specification layer receives the data of application,
The legitimacy of data is checked first, for legal application data, fieldbus message specification layer encodes it
Send FF fieldbus access sub-layer to.Fieldbus message specification layer to the data from FF fieldbus access sub-layer first
It is decoded, then analyzes the service, and decide whether to be sent to user or at local based on the analysis results
Reason.
FF fieldbus access sub-layer is between fieldbus message specification layer and data link layer.Program is according to agreement
The protocol of FF fieldbus access sub-layer is divided into three layers: FF fieldbus access sub-layer service agreement mechanism by standard
FSPM, using association protocol mechanism ARPM, data link layer shadowing agreement mechanism DMPM.FSPM is interface corresponding with upper layer,
DMPM is interface corresponding with lower layer.ARPM is the center of FF fieldbus access sub-layer, it be responsible for receiving from FSPM or
The internal information of DMPM generates other FF fieldbus access sub-layer protocol information according to application relationship endpoint type and parameter
And send it to DMPM or FSPM.
System administration completes the address distribution of field device (instrument 13), finds using position number, realizes the same of applied clock
Step, functional block list, equipment identify and to functions such as the access of system management messages library SMIB.
Network management is responsible for safeguarding the network operation.In program this partial code mainly realize downloading virtual communication relationships table,
To functions such as protocol stack configuration, download link activity scheduling table, runnability monitoring and mistake judgement monitoring.
Data link layer is located between physical layer and FF bus access sublayer, is system administration kernel and FF bus access
Layer access bus media provides service.This partial code mainly realizes the link active in FF bus communication in program, packet
The Link Time in the reception transmission, the probe response of active state, FF bus of data between each equipment (instrument 13) is included to synchronize.
FF communication uses token bus working method, has a media access control center, referred to as link active in each bus
Device LAS.The LAS is used as bus arbiter in data link layer, and LAS is to be managed by sending token to bus.LAS
Two kinds of tokens can be distributed to equipment.The first is scheduling token, forces specified ground by sending pressure data at the time of predetermined
The node of location sends data；Second is non-scheduling token, by sending transmitting token by FF except predetermined schedule time list
Equipment in bus has an opportunity to send the information except scheduling, and information just can be transmitted in the equipment for obtaining this token.
In practical applications, for the ease of being managed to each instrument 13 in FF bus, which may be used also
To include the upper computer equipment being connect with CPU 10, upper computer equipment can by the instrument 13 on shared drive and FF bus into
Row communication, user can complete the mesh of dress under FF bus engineering, each instrument 13 in read-write scene by the software in upper computer equipment
Mark data etc..
The software implementing course of the embodiment of the present application are as follows: board powers on, whole system starting.First, master device carries out
Initialization, specifically include Memory Allocation, interrupt initialization, driving installation etc..Then the initialization of FF bus protocol stack, starting are carried out
Timer, creation thread etc.；Second, after initialization is correctly completed, system administration, network management and link layer of activation system etc.
Program.Third carries out group to each instrument 13 on this protocol stack and FF bus according to the configuration info filled under upper computer equipment
State.4th, each instrument 13 in management and running FF bus, FF bus enters normal communication state, realizes CPU 10 and each instrument
Data interaction between 13.
Instrumented data provided by the embodiments of the present application obtains system, does not use protocol stack special chip, but uses " CPU
The mode of 10+FPGA chip 11 " is realized, can grasp the realization of host device protocol stack, client layer and data link layer completely, and
The realization of protocol stack is not limited etc. by Chip Interface Based to be influenced, and can better ensure that the integrality and flexibility of code, is dropped
The use cost of low row FF bus in the industry.The physical layer and data link layer of FF bus protocol in existing fpga chip 11
It is realized with hardware description language, the device cost of special chip and peripheral circuit can be saved, reduce the failure that hardware goes wrong
Point, and efficiently avoid the problems such as replacing special chip and its peripheral circuit complex procedures.Designed in fpga chip 11 with
The interface circuit of 10 data interaction of CPU can allow the FF bus data of bottom to pass through this plain mode of interface circuit easily
Data interaction is carried out with CPU 10, can better ensure that the integrality and flexibility of 10 code of CPU.Distribution can be allowed simultaneously
Formula management system preferably supports FF bus.Allow the interoperability of each instrument 13 of controller and scene in distributed management system
It is stronger, it allows field bus control system to become the important composition of distributed management system structure, allows distributed management system function
Structure is more dispersed, and adaptive capacity to environment is stronger.The use cost of FF bus in industry can be reduced, distributed management system is accelerated
The ability for having " digital networked to scene " and " control management to scene ".
A kind of instrumented data based on FF fieldbus provided by the present invention obtains system, including fpga chip and with master
Stand the CPU connected, and fpga chip is not only connect with CPU, but also is connect by FF bus with multiple instrument；CPU can control
Fpga chip converts the CPU signal sent to after echo signal and is sent to each instrument by FF bus, each described to obtain
The target data of instrument, and then realize the data interaction between CPU and each instrument.Fpga chip comes with corresponding with CPU hard
Part interface, and repair and replacement process is simple, and each instrument is obtained by the way of " CPU+FF special chip " in the prior art
Data compare, and then the communications difficulties between dcs and intelligence instrument can be reduced.
On the basis of the above embodiments, preferably embodiment, fpga chip 11 include Manchester encoder
And manchester decoder, Manchester encoder for being sent to each instrument 13 after being encoded signal, translate by Manchester
Code device is for being sent to CPU 10 after being decoded target data.
On the basis of the above embodiments, preferably embodiment, CPU 10 are specially ZYNQ chip, ZYNQ chip
One fpga chip 11 of two arm processors and the side PL including the side PS.
CPU 10 in the embodiment of the present application uses the ZYNQ chip of xilinx company, and ZYNQ chip is by the side PS and the side PL
Composition.Wherein the side PS includes two arm processors, and an arm processor is realized FF protocol stack and client layer software, used
VxWorks real time operating system；Another arm processor realizes any protocol stack and application layer software to be converted；Two
Arm processor passes through shared drive interaction data.The side chip PL ZYNQ is corresponding with fpga chip 11, for realizing fpga chip 11
Logical design.In practical applications, two arm processors of the side ZYNQ chip PS 2 can also be replaced with to meet the requirements
Other processing modules, realize the identical function of arm processor.Because the side PS of ZYNQ chip includes two arm processors, institute
For more other types of CPU, data processing speed is fast, and the acquisition efficiency of 13 data of instrument can be improved.
Specially this special signal codec of the graceful side of FF bus physical layer and data link layer section function are in CPU 10
The side PL (programmable logic side, i.e. fpga chip) realize, detailed process is as follows:
First, data transmission flow is in fpga chip 11, and the arm processor interface circuit of the side PS is by downlink data or order
11 internal dual port arm processor of fpga chip is written in board data, after writing FF bus data, sets " sending enabled " mark.
Fpga chip 11 sends control instruction and generates lead code and starting delimiter and set " sending arm processor write-protect " mark simultaneously
Will.After starting delimiter is sent completely, the data for sending arm processor are successively moved to transmission Message processing and patrolled by fpga chip 11
Volume.It is converted into Manchester's code through Manchester encoder from the data removed in processing logic are sent, and is drawn by sending
Human hair combing waste, which is sent, sets peripheral media interface circuit MAU.One packet FF bus data frame is sent completely, and waits the transmission of next bag data frame.
To avoid leading to send data in FF bus for a long time due to breaking down in sending composition, fpga chip 11 " is being sent
It is enabled " after flag set, starting " sends to chat and forbids timer ", and timer count can automatically cut off transmission when overflowing, until
" send to chat and forbids timer " is again started up after " transmission is enabled " flag set next time and opens simultaneously sendaisle.
Second, data receiver process is that fpga chip 11 persistently listens to the data in FF bus in fpga chip 11, when detecing
When the data heard are lead code, starting receives " starting delimiter reception enable bit " mark of control logic.Fpga chip 11
Received data are entered after Manchester decoder decodes and receive Message processing logic.Fpga chip 11 is by the verification of calculating
Code and received check code compare, and set " check code mistake " flag bit if mistake.Then receiving terminates delimiter, judges to tie
Whether beam delimiter is correct, and " terminating delimiter mistake " mark is set if mistake." receive arm processor has new number to most postposition
According to " indicate and close enabled lead code reception flag.CPU 10 can inquire correlating markings to decide whether to read and receive ARM processing
The data of device.
In order to promote user experience, and keep the acquisition system more intelligent, on the basis of the above embodiments, as
It is preferably carried out mode, further includes:
The communication module connecting with CPU 10, communication module are used to target data being transmitted to mobile terminal.Particularly as being
After the target data for getting instrument 13, target data is uploaded to eventually by movement by the communication module connecting with CPU 10
End, mobile terminal can be mobile phone or tablet computer, because mobile phone or tablet computer are easy to carry about with one；In practical applications, may be used also
The associated control modules in dcs are uploaded to the target data for the instrument 13 that will acquire by communication module, are had
It is where proper that body needs the target data for the instrument 13 that will acquire to be uploaded to, and can be determined according to the actual situation, this hair
It is bright and be not construed as limiting.Preferably, communication module can select WIFI module or bluetooth module or GPRS module.
Fig. 2 is that another kind provided by the embodiment of the present invention is shown based on the instrumented data acquisition system structure of FF fieldbus
It is intended to, as shown in Fig. 2, when occurring 13 failure of instrument in order to prevent, the case where Nobody Knows, on the basis of the above embodiments,
Preferably embodiment, further includes:
The alarm module 20 connecting with CPU 10, the target data that alarm module 20 is used to obtain as CPU 10 are number of faults
According to when, warning note.
Particularly as be when CPU 10 determine obtain instrument 13 target data be fault data when, just control alarm mould
20 warning note of block, so that related personnel goes to handle in time.Preferably embodiment, alarm module 20 are specially buzzer
And/or indicator light.
For the ease of checking and more further being promoted user experience to related data, on the basis of above-described embodiment
On, preferably embodiment, further includes:
The display device 21 connecting with CPU 10, display device 21 are used for displaying target data and warning message.
It is shown particularly as the target data and alert data for being the instrument 13 that will acquire by display device 21, when
So, other than can be with displaying target data and warning message, other relevant data can also be shown, it is specific to need that shows
Kind data, can be determined, the present invention is simultaneously not construed as limiting according to the actual situation.In practical applications, it is contemplated that the convenience of installation
Property, display device 21 and CPU 10 can be separately separately configured to two modules, as long as guaranteeing to be counted between the two
According to transmission.
System is obtained to a kind of instrumented data based on FF fieldbus provided by the present invention above and has carried out detailed Jie
It continues.With several examples, principle and implementation of the present invention are described herein, the explanation of above embodiments, only
It is used to help understand method and its core concept of the invention；At the same time, for those skilled in the art, according to the present invention
Thought, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be understood
For limitation of the present invention, those skilled in the art are repaired under the premise of no creative work to what the present invention was made
Change, equivalent replacement, improvement etc., should be included in the application.
It should also be noted that, in the present specification, relational terms such as first and second and the like be used merely to by
One operation is distinguished with another operation, without necessarily requiring or implying there are any between these entities or operation
This actual relationship or sequence.Moreover, the similar word such as term " includes ", so that including the unit of a series of elements, equipment
Or system not only includes those elements, but also including other elements that are not explicitly listed, or further includes for this list
Member, equipment or the intrinsic element of system.
Claims (10)
1. a kind of instrumented data based on FF fieldbus obtains system characterized by comprising
The CPU connecting with main website, the fpga chip connecting with the CPU, the fpga chip pass through FF bus and multiple instrument
Connection；The CPU converts the CPU signal sent to after echo signal through the FF for controlling the fpga chip
Bus is sent to each instrument to obtain the target data of each instrument.
2. the instrumented data according to claim 1 based on FF fieldbus obtains system, which is characterized in that the CPU
Specially ZYNQ chip, the ZYNQ chip include two arm processors of the side PS and a fpga chip of the side PL.
3. the instrumented data according to claim 1 based on FF fieldbus obtains system, which is characterized in that further include:
The communication module connecting with the CPU, the communication module are used to the target data being transmitted to mobile terminal.
4. the instrumented data according to claim 3 based on FF fieldbus obtains system, which is characterized in that the communication
Module specifically includes WIFI module or bluetooth module or GPRS module.
5. the instrumented data according to claim 1 based on FF fieldbus obtains system, which is characterized in that the FPGA
Chip includes Manchester encoder and the manchester decoder, the Manchester encoder be used for by the signal into
Each instrument is sent to after row coding, the manchester decoder after being decoded the target data for being sent to
The CPU.
6. the instrumented data according to claim 1 based on FF fieldbus obtains system, which is characterized in that further include:
The alarm module connecting with the CPU, the target data that the alarm module is used to obtain as the CPU are failure
When data, warning note.
7. the instrumented data according to claim 6 based on FF fieldbus obtains system, which is characterized in that further include:
The display device connecting with the CPU, the display device is for showing the target data and warning message.
8. the instrumented data according to claim 6 based on FF fieldbus obtains system, which is characterized in that the alarm
Module is specially buzzer and/or indicator light.
9. the instrumented data according to claim 1 based on FF fieldbus obtains system, which is characterized in that the target
Data include the electric signal of each instrument, temperature data and fault data.
10. the instrumented data according to claim 9 based on FF fieldbus obtains system, which is characterized in that the CPU
It is also integrated with memory module, the memory module is for storing the electric signal, the temperature data and the fault data.
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| CN201811025371.XA CN109189722A (en) | 2018-09-04 | 2018-09-04 | A kind of instrumented data acquisition system based on FF fieldbus |
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| CN201811025371.XA CN109189722A (en) | 2018-09-04 | 2018-09-04 | A kind of instrumented data acquisition system based on FF fieldbus |
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| CN106571847A (en) * | 2016-10-26 | 2017-04-19 | 深圳市极致汇仪科技有限公司 | Test instrument communication device and method based on ZYNQ |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102789210A (en) * | 2011-05-16 | 2012-11-21 | 上海华建电力设备股份有限公司 | Configurable industrial bus interface supporting protocol |
| CN104049579A (en) * | 2013-03-11 | 2014-09-17 | 费希尔-罗斯蒙特***公司 | Background collection of diagnostic data from field instrumentation devices |
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Application publication date: 20190111 |
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