CN109165721B - Data processing method, data processing device and electronic equipment - Google Patents

Data processing method, data processing device and electronic equipment Download PDF

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CN109165721B
CN109165721B CN201810708160.XA CN201810708160A CN109165721B CN 109165721 B CN109165721 B CN 109165721B CN 201810708160 A CN201810708160 A CN 201810708160A CN 109165721 B CN109165721 B CN 109165721B
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CN109165721A (en
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刘洪�
王俊
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Beijing suneng Technology Co.,Ltd.
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Suanfeng Technology Beijing Co ltd
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Abstract

The application provides a data processing method, a data processing device and an electronic device; the data processing method comprises the following steps: acquiring N input data in an input sequence set; respectively sending N input data in the input sequence set into a first LSTM system and a second LSTM system, and obtaining 2N intermediate data; allocating the 2N intermediate data to N storage spaces; 2N intermediate data are operated in N storage spaces to obtain N output data; where N is the number of input data in the input sequence set.

Description

Data processing method, data processing device and electronic equipment
Technical Field
The present application relates to the field of data processing, and in particular, to a data processing method, a data processing apparatus, and an electronic device.
Background
The LSTM (Long Short-Term Memory), a network structure of learning sequence features in deep learning, is suitable for processing and predicting important events with relatively Long interval and delay in time sequences. LSTM has found many applications in the scientific field. LSTM based systems may learn tasks of translating languages, controlling robots, image analysis, document summarization, speech recognition, image recognition, handwriting recognition, controlling chat robots, and the like.
However, when data is input into the bidirectional LSTM network, reverse-order operation is often required to be performed on an input sequence, and a storage space is also required to store the reverse-order sequence; on the other hand, two output results in each input data are stored separately, which greatly wastes storage space and reduces operation speed.
Disclosure of Invention
In order to solve the above problems, according to an aspect of the present application, a data processing method, a data processing apparatus, and an electronic device are provided. The data processing method is applied to an embedded neural network system and comprises the following steps: acquiring N input data in an input sequence set; respectively sending N input data in the input sequence set into a first LSTM system and a second LSTM system, and obtaining 2N intermediate data; allocating the 2N intermediate data to N storage spaces; 2N intermediate data are operated in N storage spaces to obtain N output data; where N is the number of input data in the input sequence set.
In some embodiments, feeding N input data in a set of input sequences into a first LSTM system and a second LSTM system, respectively, comprises: and sending N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse sequence of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
In some embodiments, allocating the 2N intermediate data to N storage spaces comprises: alternately distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein, two intermediate data are stored in each storage space.
In some embodiments, the operating the 2N intermediate data in the N storage spaces to obtain N output data includes: and (3) sending each input data in the N input data in the input sequence set into the first LSTM system and the second LSTM system to obtain two intermediate results, and calculating in corresponding storage space to obtain N output data.
According to another aspect of the present application, a data processing apparatus is presented; wherein, the data processing device includes: a data acquisition unit configured to acquire N input data in an input sequence set; the data processing unit is configured to send N input data in the input sequence set into the first LSTM system and the second LSTM system respectively and obtain 2N intermediate data; a data allocation unit configured to allocate the 2N intermediate data to N storage spaces; the data calculation unit is configured to calculate the 2N intermediate data in N storage spaces to obtain N output data; where N is the number of input data in the input sequence set.
In some embodiments, feeding N input data in a set of input sequences into a first LSTM system and a second LSTM system, respectively, comprises: and sending N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse sequence of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
In some embodiments, allocating the 2N intermediate data to N storage spaces comprises: alternately distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein, two intermediate data are stored in each storage space.
In some embodiments, the operating the 2N intermediate data in the N storage spaces to obtain N output data includes: and (3) sending each input data in the N input data in the input sequence set into the first LSTM system and the second LSTM system to obtain two intermediate results, and calculating in corresponding storage space to obtain N output data.
According to another aspect of the present application, an electronic device is provided; wherein, the electronic equipment includes: at least one embedded neural network processor; and a memory communicatively coupled to the at least one embedded neural network processor; wherein the memory stores instructions executable by the at least one embedded neural network processor, the instructions, when executed by the at least one embedded neural network processor, causing the at least one embedded neural network processor to perform the data processing method as described above.
By the data processing method, the data processing device and the electronic equipment, the storage space in the calculation process can be reduced, and the reverse operation of the input sequence is saved, so that the calculation space and time are saved, and the calculation is accelerated.
Reference is made in detail to the following description and accompanying drawings that form a part hereof, and in which is shown by way of illustration specific embodiments in which the principles of the subject application may be employed. It should be understood that the embodiments of the present application are not so limited in scope. The embodiments of the application include many variations, modifications and equivalents within the spirit and scope of the appended claims.
Features that are described and/or illustrated with respect to one embodiment may be used in the same way or in a similar way in one or more other embodiments, in combination with or instead of the features of the other embodiments.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps or components.
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In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without inventive exercise.
One or more embodiments are illustrated by way of example in the accompanying drawings, which correspond to the accompanying drawings and not in limitation thereof, in which elements having the same reference numeral designations represent like elements and in which:
FIG. 1 is a diagram of an exemplary network structure of an LSTM learning sequence feature;
FIG. 2 is a schematic diagram of the overall structure of the input sequence into an LSTM system;
FIG. 3 is an operational diagram illustrating reverse order processing of an input sequence;
FIG. 4 is a schematic diagram of the overall structure of inputting an input sequence processed in reverse order into another LSTM system;
FIG. 5 is a schematic diagram of a data structure of a storage space for storing data in a conventional LSTM method;
FIG. 6 is an overall flow chart of a data processing method provided according to an embodiment of the present application;
FIG. 7 is a schematic diagram of a specific structure of a data processing method according to an embodiment of the present application;
FIG. 8 is a schematic diagram of a data structure of a data storage space of a data processing method according to an embodiment of the present application;
fig. 9 is a schematic diagram of an overall structure of a data processing apparatus provided according to an embodiment of the present application; and
fig. 10 is a schematic overall structure diagram of an electronic device provided according to an embodiment of the present application.
Detailed Description
So that the manner in which the features and elements of the disclosed embodiments can be understood in detail, a more particular description of the disclosed embodiments, briefly summarized above, may be had by reference to the embodiments, some of which are illustrated in the appended drawings. In the following description of the technology, for purposes of explanation, numerous details are set forth in order to provide a thorough understanding of the disclosed embodiments. However, one or more embodiments may be practiced without these details. In other instances, well-known structures and devices may be shown in simplified form in order to simplify the drawing.
The principles and spirit of the present application are explained in detail below with reference to several representative embodiments of the present application.
Fig. 1 is a diagram of a typical network structure of LSTM learning sequence features. As shown in FIG. 1, input node Xt-1,Xt,Xt+1Form an input sequence Xt-1XtXt+1Inputting the data into an LSTM network system, and obtaining a corresponding output node h after a series of calculationst-1,ht,ht+1Form an output sequence ht-1htht+1
Fig. 2 to 4 are schematic diagrams of a conventional bidirectional LSTM implementation method.
In practical application of the conventional bidirectional LSTM implementation method, as shown in fig. 2 to 4, the same data input sequence is often input into the LSTM1 system from the forward direction to obtain an intermediate result sequence, then the input sequence is subjected to reverse order operation to obtain a reverse order sequence of the input sequence, the reverse order sequence is input into the LSTM2 system to obtain another intermediate result sequence, and then each data in the two intermediate result sequences is added correspondinglyThereby obtaining an output sequence to achieve better sequence characteristics. As shown in FIG. 2, it is not assumed that the input sequence is X0X1X2X3X4X5X6(each letter represents a feature vector) and X will be positive0X1X2X3X4X5X6Directly inputting the intermediate result sequence into an LSTM1 system network to obtain an intermediate result sequence h0h1h2h3h4h5h6(ii) a When the input sequence is inverted, the input sequence needs to be inverted first, and as shown in fig. 3, an inverted sequence X of the input sequence is obtained6X5X4X3X2X1X0Inputting the reverse sequence into LSTM2 system network, and obtaining another intermediate result sequence as g as shown in FIG. 40g1g2g3g4g5g6. Finally, adding the two intermediate result sequence results to obtain an output sequence h0+g6][h1+g5][h2+g4][h3+g3][h4+g2][h5+g1][h6+g0]。
However, in the above calculation process, the input sequence needs to be inverted, and an additional storage space is also needed to store the inverted sequence X6X5X4X3X2X1X0That is, the input sequence needs to be stored twice in both forward and reverse directions, as shown in FIG. 5, even if the forward input sequence X is stored0X1X2X3X4X5X6Also, the reverse sequence X after reverse-ordering the forward input sequence is stored6X5X4X3X2X1X0(ii) a On the other hand, two corresponding midamble results h are to be stored separately0h1h2h3h4h5h6And g0g1g2g3g4g5g6This isTherefore, the storage space is greatly wasted and the operation speed is reduced.
In order to solve the above problem, an embodiment of the present application provides a data processing method applied to an embedded neural network system, including: acquiring N input data in an input sequence set; respectively sending N input data in the input sequence set into a first LSTM system and a second LSTM system, and obtaining 2N intermediate data; allocating the 2N intermediate data to N storage spaces; 2N intermediate data are operated in N storage spaces to obtain N output data; where N is the number of input data in the input sequence set.
In some embodiments, feeding N input data in a set of input sequences into a first LSTM system and a second LSTM system, respectively, comprises: and sending N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse sequence of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
In some embodiments, allocating the 2N intermediate data to N storage spaces comprises: alternately distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein, two intermediate data are stored in each storage space.
In some embodiments, the operating the 2N intermediate data in the N storage spaces to obtain N output data includes: and sending each of the N input data in the input sequence set into the first LSTM system and the second LSTM system to obtain two intermediate results, and calculating in corresponding storage space to obtain N output data.
By the data processing method, the storage space in the calculation process can be reduced, and the reverse operation of the input sequence is saved, so that the calculation space and time are saved, and the calculation is accelerated.
The data processing method according to the embodiment of the present application will be described in detail below with reference to fig. 6 to 8.
FIG. 6 is an overall flow chart of a data processing method provided according to an embodiment of the present application; as shown in the flowchart of fig. 6, step S61 is first executed to obtain N input data in the input sequence set, where N is the number of input data in the input sequence set, and N is an integer greater than or equal to 1.
After acquiring N input data in the input set sequence set, as shown in fig. 6, step S62 is executed, that is, the N input data in the input set sequence set are respectively sent to the first LSTM system and the second LSTM system, and 2N intermediate data are obtained. The method for respectively sending N input data in an input sequence set to a first LSTM system and a second LSTM system comprises the following steps: and sending N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse sequence of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
FIG. 7 is a schematic diagram of a specific structure of a data processing method according to an embodiment of the present application; as shown in FIG. 7, the input data in the input sequence set is X0X1X2X3X4X5X6Thus, in this embodiment, N is 7; the value of the number N of input data in the input sequence set in this embodiment is only illustrative, and those skilled in the art can take different values for N according to actual situations. After obtaining the input data X0X1X2X3X4X5X6Then, they are sent to the first LSTM system LSTM1 and the second LSTM system LSTM2, respectively. Wherein, the feeding mode is as follows: first, X is put in a first order0Sending into LSTM1 to obtain corresponding output h0(ii) a Then, X is sequentially added in a second order6Sending into LSTM2 to obtain corresponding output g0(ii) a Then X is put in the first order1Sending into LSTM1 to obtain corresponding output h1(ii) a Then, X is sequentially added in a second order5Sending into LSTM2 to obtain corresponding output g1(ii) a Then X is put in the first order2Sending into LSTM1 to obtain corresponding output h2(ii) a Then, X is sequentially added in a second order4Sending into LSTM2 to obtain corresponding output g2(ii) a Then X is put in the first order3Sending into LSTM1 to obtain corresponding output h3(ii) a Then, X is sequentially added in a second order3Sending into LSTM2 to obtain corresponding output g3(ii) a Then X is put in the first order4Sending into LSTM1 to obtain corresponding output h4(ii) a Then, X is sequentially added in a second order2Sending into LSTM2 to obtain corresponding output g4(ii) a Then X is put in the first order5Sending into LSTM1 to obtain corresponding output h5(ii) a Then, X is sequentially added in a second order1Sending into LSTM2 to obtain corresponding output g5(ii) a Then X is put in the first order6Sending into LSTM1 to obtain corresponding output h6(ii) a Finally, X is0In a second order into LSTM2 to obtain corresponding outputs g6. In this embodiment, the first order is to input data X in the input sequence set from left to right0X1X2X3X4X5X6The second order is to input data X in the input set sequence from right to left6X5X4X3X2X1X0The second order is the reverse of the first order. However, the definition of the first order and the second order in the present application is not limited thereto, and those skilled in the art may define the first order and the second order differently according to different situations, for example, the first order is defined as an order of inputting into the input sequence set from right to left, and the second order is defined as an order of inputting into the input sequence set from left to right.
The above input data sending method in the input sequence set is to send N input data in the input sequence set to the first LSTM system according to the first order and to send the N input data to the second LSTM system according to the second order, where the second order is the reverse of the first order, and after sending one bit of data of the first LSTM system according to the first order, sending one bit of data of the second LSTM system according to the second order, and sending the one bit of data of the second LSTM system in turn and alternately in turn until the N input data are sent in the first order and the second order, respectively; in the embodiment of the present application, the above-mentioned input data sending method omits a reverse order operation on the input data in the input set sequence, that is, a reverse order processing step in fig. 3 is omitted, so that the operation time is reduced, and the operation efficiency is improved.
As shown in fig. 7, 7 (in this case, N is 7) pieces of input data X in the input sequence set are input0X1X2X3X4X5X6After being fed into the LSTM1 and LSTM2, respectively, in the manner described in the above embodiments, 2N intermediate data, 14 intermediate data h in this embodiment, are obtained0h1h2h3h4h5h6And g0g1g2g3g4g5g6
Then, step S63 is executed, that is, 2N intermediate data are allocated to N storage spaces; wherein allocating the 2N data to N storage spaces comprises: alternately distributing the 2N intermediate data to corresponding N storage spaces according to the generation sequence of the intermediate data; wherein, two intermediate data are stored in each storage space.
The manner of data storage in the data processing method in the embodiment of the present application will be described in detail below with reference to fig. 8. FIG. 8 is a schematic diagram of a data structure of a data storage space of a data processing method according to an embodiment of the present application; as shown in fig. 8, the data processing method in this embodiment only needs to store the input data in the input set sequence once, that is, only needs to store the forward input sequence X in the storage spaces 1 to 70X1X2X3X4X5X6. Since the input data does not need to be subjected to reverse order operation, the reverse order sequence X of the input data after the reverse order operation is saved6X5X4X3X2X1X0The storage space for storage is made while the first intermediate data h is generated in the first order according to the above-described data method of the present embodiment0Then, data h0Will go directly into its corresponding storage space 8 and generate a second intermediate data g in a second order0After that, data g0Will go directly into its corresponding storage space 14 as shown in fig. 8, and so on, 14 intermediate data h0h1h2h3h4h5h6And g0g1g2g3g4g5g6The data are alternately allocated to the corresponding 7 storage spaces according to the generation order, that is, as shown in fig. 8, in the embodiment of the present application, 14 intermediate data are allocated to the storage spaces 8 to 14, wherein each storage space stores two intermediate data.
Finally, step S64 is executed, 2N intermediate data are operated in N storage spaces to obtain N output data; the method for calculating the 2N intermediate data in the N storage spaces to obtain N output data includes: and (3) sending each input data in the N input data in the input sequence set into the first LSTM system and the second LSTM system to obtain two intermediate results, and calculating in corresponding storage space to obtain N output data.
As shown in FIG. 8, in the embodiment of the present application, 14 intermediate data h0h1h2h3h4h5h6And g0g1g2g3g4g5g6After sequentially entering 7 storage spaces according to the generation sequence, 7 input data X in the input sequence set are input0X1X2X3X4X5X6The two intermediate results obtained after each of the two intermediate results is sent into the LSTM1 system and the LSTM2 system are added in the corresponding storage space to obtain N output data, and as shown in FIG. 8, the intermediate data obtained by sending X0 into the LSTM1 system from the first sequence is h0From the first toThe intermediate data obtained by two sequential inputs to the LSTM2 system is g6H is to be0And g6Adding in the storage space 8 to obtain the first output data h0+g6];X1The intermediate data from the first sequence feed to the LSTM1 system is h1The intermediate data from the second sequence fed into the LSTM2 system is g5H is to be1And g5Adding in the storage space 9 to obtain a second output data h1+g5];X2The intermediate data from the first sequence feed to the LSTM1 system is h2The intermediate data from the second sequence fed into the LSTM2 system is g4H is to be2And g4Adding up in the storage space 10 to obtain a third output data h2+ g4];X3The intermediate data from the first sequence feed to the LSTM1 system is h3The intermediate data from the second sequence fed into the LSTM2 system is g3H is to be3And g3Adding up in the storage space 11 to obtain the fourth output data h3+g3];X4The intermediate data from the first sequence feed to the LSTM1 system is h4The intermediate data from the second sequence fed into the LSTM2 system is g2H is to be4And g2Adds up in the storage space 12 to obtain the fifth output data h4+g2];X5The intermediate data from the first sequence feed to the LSTM1 system is h5The intermediate data from the second sequence fed into the LSTM2 system is g1H is to be5And g1Adds up in the storage space 13 to obtain the sixth output data h5+g1];X6The intermediate data from the first sequence feed to the LSTM1 system is h6The intermediate data from the second sequence fed into the LSTM2 system is g0H is to be6And g0Adding in the storage space 14 to obtain the seventh output data h6+g0](ii) a However, the operation in the storage space in the present application is not limited to this, and those skilled in the art may also perform other operations besides addition on the intermediate data in the storage space according to the actual situation; by passingIn the embodiment of the present application, the storage method of the intermediate data and the direct operation of the intermediate data in the storage space do not need to pass the input sequence through two intermediate result sequences h obtained by two different LSTM systems LSTM1 and LSTM2, as shown in fig. 50h1h2h3h4h5h6And g0g1g2g3g4g5g6And the data is stored into the memory, so that the storage space is further saved.
According to the data processing method disclosed by the application, the storage space in the calculation process can be reduced, and the reverse operation on the input sequence is saved, so that the calculation space and time are saved, and the calculation is accelerated.
It should be noted that while the operations of the method of the present invention are depicted in the drawings in a particular order, this does not require or imply that the operations must be performed in this particular order, or that all of the illustrated operations must be performed, to achieve desirable results. Additionally or alternatively, certain steps may be omitted, multiple steps combined into one step execution, and/or one step broken down into multiple step executions.
Having described the data processing method according to the embodiment of the present application, a data processing apparatus according to an exemplary embodiment of the present invention will be described with reference to fig. 9. The implementation of the device can be referred to the implementation of the method, and repeated details are not repeated. The terms "module" and "unit", as used below, may be software and/or hardware that implements a predetermined function. While the modules described in the following embodiments are preferably implemented in software, implementations in hardware, or a combination of software and hardware are also possible and contemplated.
Fig. 9 is a schematic diagram of an overall structure of a data processing apparatus provided according to an embodiment of the present application; as shown in fig. 9, the data processing apparatus 900 in the embodiment of the present application includes: a data acquisition unit 901 configured to acquire N input data in the input sequence set; a data processing unit 902 configured to send N input data in the input sequence set to the first LSTM system and the second LSTM system, respectively, and obtain 2N intermediate data; a data allocation unit 903 configured to allocate 2N intermediate data to N storage spaces; a data calculation unit 904 configured to calculate 2N intermediate data in N storage spaces to obtain N output data; where N is the number of input data in the input sequence set.
In some embodiments, the data processing unit 902 is configured to feed N input data in the input sequence set into the first LSTM system and the second LSTM system, respectively, including: and sending N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse sequence of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
In some embodiments, the data allocation unit 903 is configured to allocate 2N intermediate data to N storage spaces, including: alternately distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein, two intermediate data are stored in each storage space.
In some embodiments, the data calculation unit 904 is configured to operate the 2N intermediate data in N storage spaces to obtain N output data, including: and (3) sending each input data in the N input data in the input sequence set into the first LSTM system and the second LSTM system to obtain two intermediate results, and calculating in corresponding storage space to obtain N output data.
According to the data processing device disclosed by the application, the storage space in the calculation process can be reduced, and the reverse operation on the input sequence is saved, so that the calculation space and time are saved, and the calculation is accelerated.
An embodiment of the present disclosure further provides an electronic device, a structure of which is shown in fig. 10, where the electronic device includes: at least one embedded network Neural Processor (NPU)300, one NPU300 being exemplified in FIG. 10; and a memory (memory)301, and may further include a Communication Interface (Communication Interface)302 and a bus 303. The NPU300, the communication interface 302, and the memory 301 may communicate with each other via a bus 303. The communication interface 302 may be used for information transfer. The NPU300 may call logical instructions in the memory 301 to perform the data processing method of the above-described embodiment.
In addition, the logic instructions in the memory 301 may be implemented in the form of software functional units and stored in a computer readable storage medium when the logic instructions are sold or used as independent products.
The memory 301 is a computer-readable storage medium, and can be used for storing software programs, computer-executable programs, such as program instructions/modules corresponding to the methods in the embodiments of the present disclosure. The NPU300 executes the functional application and data processing by executing the software program, instructions and modules stored in the memory 301, that is, implements the data processing method in the above-described method embodiment.
The memory 301 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal device, and the like. Further, the memory 301 may include a high-speed random access memory, and may also include a nonvolatile memory.
The technical solution of the embodiments of the present disclosure may be embodied in the form of a software product, where the computer software product is stored in a storage medium and includes one or more instructions to enable a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method of the embodiments of the present disclosure. And the aforementioned storage medium may be a non-transitory storage medium comprising: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes, and may also be a transient storage medium. As used in this application, although the terms "first," "second," etc. may be used in this application to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, unless the meaning of the description changes, so long as all occurrences of the "first element" are renamed consistently and all occurrences of the "second element" are renamed consistently. The first and second elements are both elements, but may not be the same element.
The words used in this application are words of description only and not of limitation of the claims. As used in the description of the embodiments and the claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this application is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, the terms "comprises" and/or "comprising," when used in this application, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The various aspects, implementations, or features of the described embodiments can be used alone or in any combination. Aspects of the described embodiments may be implemented by software, hardware, or a combination of software and hardware. The described embodiments may also be embodied by a computer-readable medium having computer-readable code stored thereon, the computer-readable code comprising instructions executable by at least one computing device. The computer readable medium can be associated with any data storage device that can store data which can be read by a computer system. Exemplary computer readable media can include read-only memory, random-access memory, CD-ROMs, HDDs, DVDs, magnetic tape, and optical data storage devices, among others. The computer readable medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.
The above description of the technology may refer to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration embodiments in which the described embodiments may be practiced. While these embodiments are described in sufficient detail to enable those skilled in the art to practice them, they are not limiting; other embodiments may be utilized and changes may be made without departing from the scope of the described embodiments. For example, the order of operations described in a flowchart is non-limiting, and thus the order of two or more operations illustrated in and described in accordance with the flowchart may be altered in accordance with several embodiments. As another example, in several embodiments, one or more operations illustrated in and described with respect to the flowcharts are optional or may be eliminated. Additionally, certain steps or functions may be added to the disclosed embodiments, or two or more steps may be permuted in order. All such variations are considered to be encompassed by the disclosed embodiments and the claims.
Additionally, terminology is used in the foregoing description of the technology to provide a thorough understanding of the described embodiments. However, no unnecessary detail is required to implement the described embodiments. Accordingly, the foregoing description of the embodiments has been presented for purposes of illustration and description. The embodiments presented in the foregoing description and the examples disclosed in accordance with these embodiments are provided solely to add context and aid in the understanding of the described embodiments. The above description is not intended to be exhaustive or to limit the described embodiments to the precise form disclosed. Many modifications, alternative uses, and variations are possible in light of the above teaching. In some instances, well known process steps have not been described in detail in order to avoid unnecessarily obscuring the described embodiments.

Claims (7)

1. A data processing method is applied to an embedded neural network system and is characterized in that,
the data processing method comprises the following steps:
acquiring N input data in an input sequence set;
respectively sending the N input data in the input sequence set into a first LSTM system and a second LSTM system, and obtaining 2N intermediate data;
allocating the 2N intermediate data to N storage spaces;
calculating the 2N intermediate data in the N storage spaces to obtain N output data; wherein
N is the number of the input data in the input sequence set;
wherein, the sending the N input data in the input sequence set into a first LSTM system and a second LSTM system respectively includes:
and sending the N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse order of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
2. The data processing method of claim 1, wherein allocating the 2N intermediate data to N storage spaces comprises:
distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein the content of the first and second substances,
and each storage space stores two intermediate data.
3. The data processing method according to claim 1, wherein the operating the 2N intermediate data in the N storage spaces to obtain N output data comprises:
and calculating two intermediate results obtained after each input data in the N input data in the input sequence set is sent to the first LSTM system and the second LSTM system in a corresponding storage space to obtain N output data.
4. A data processing apparatus, characterized in that the data processing apparatus comprises:
a data acquisition unit configured to acquire N input data in an input sequence set;
the data processing unit is configured to send the N input data in the input sequence set into a first LSTM system and a second LSTM system respectively, and obtain 2N intermediate data;
a data allocation unit configured to allocate the 2N intermediate data to N storage spaces;
the data calculation unit is configured to calculate the 2N intermediate data in the N storage spaces to obtain N output data; wherein
N is the number of the input data in the input sequence set;
wherein, the sending the N input data in the input sequence set into a first LSTM system and a second LSTM system respectively includes:
and sending the N input data in the input sequence set into a first LSTM system according to a first sequence and sending the N input data into a second LSTM system according to a second sequence, wherein the second sequence is the reverse order of the first sequence, and after each time one bit of data of the first LSTM system is sent in the first sequence, the one bit of data of the second LSTM system is sent in the second sequence, and the N input data are sent in sequence and alternately until the N input data are respectively sent in the first sequence and the second sequence.
5. The data processing apparatus of claim 4, wherein allocating the 2N intermediate data to N storage spaces comprises:
distributing the 2N intermediate data to the corresponding N storage spaces according to the generation sequence of the intermediate data; wherein the content of the first and second substances,
and each storage space stores two intermediate data.
6. The data processing apparatus according to claim 4, wherein the operating the 2N intermediate data in the N storage spaces to obtain N output data comprises:
and calculating two intermediate results obtained after each input data in the N input data in the input sequence set is sent to the first LSTM system and the second LSTM system in a corresponding storage space to obtain N output data.
7. An electronic device, comprising:
at least one embedded neural network processor; and
a memory communicatively coupled to the at least one embedded neural network processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one embedded neural network processor, which when executed by the at least one embedded neural network processor, causes the at least one embedded neural network processor to perform the data processing method of any of claims 1-3.
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107832476A (en) * 2017-12-01 2018-03-23 北京百度网讯科技有限公司 A kind of understanding method of search sequence, device, equipment and storage medium

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9620108B2 (en) * 2013-12-10 2017-04-11 Google Inc. Processing acoustic sequences using long short-term memory (LSTM) neural networks that include recurrent projection layers
US10275704B2 (en) * 2014-06-06 2019-04-30 Google Llc Generating representations of input sequences using neural networks
US20180174576A1 (en) * 2016-12-21 2018-06-21 Google Llc Acoustic-to-word neural network speech recognizer

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107832476A (en) * 2017-12-01 2018-03-23 北京百度网讯科技有限公司 A kind of understanding method of search sequence, device, equipment and storage medium

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
"Bidirectional Recurrent Neural Networks";Mike Schuster .etc;《IEEE TRANSACTIONS ON SIGNAL PROCESSING》;19971130;第45卷(第11期);全文 *

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