CN109148682A - Resistive random access memory and its manufacturing method - Google Patents
Resistive random access memory and its manufacturing method Download PDFInfo
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- CN109148682A CN109148682A CN201710463763.3A CN201710463763A CN109148682A CN 109148682 A CN109148682 A CN 109148682A CN 201710463763 A CN201710463763 A CN 201710463763A CN 109148682 A CN109148682 A CN 109148682A
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/30—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having three or more electrodes, e.g. transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
Abstract
The invention discloses a kind of resistive random access memories, including a hearth electrode, a resistance conversion layer, a top electrode, a metal layer and a barrier layer.Resistance conversion layer is configured on hearth electrode.Top electrode is configured on resistance conversion layer.Metal layer is configured on top electrode.Barrier layer covers metal layer.Wherein, barrier layer is around metal layer and top electrode.
Description
Technical field
The invention belongs to random access memory fields, are related to a kind of resistive random access memory including barrier layer
And its manufacturing method.
Background technique
Resistive random access memory (Resistive random-access memory, ReRAM) is that one kind has
The referred to as memory of the element of " memristor (memristor) " (abbreviation of memistor).Resistive random access memory
Resistance change as the voltage that is applied is different.Resistive random access memory then by change memristor resistance come
Effect, to store data.
During manufacturing resistive random access memory, backend process (back-end process), example can be carried out
Inter-metal dielectric layer (inter-metal dielectric layer, IMDlayer), metal layer and protective layer are formed in this way
(passivation) technique.However, these backend process may generate some gases (e.g. hydrogen (H), ammonia
(NH3), silane (SiH4) and cause loss of the resistive random access memory in data preservation.Therefore, it must still develop at present
A method of the preservation data degradation of resistive random access memory is prevented, and is produced with excellent structural reliability
Resistive random access memory.
Summary of the invention
The present invention is about a kind of resistive random access memory and its manufacturing method.The storage of this resistive random access
Device has a barrier layer, and barrier layer covers and surround metal layer, so that resistive random access memory is carrying out backend process
There can be lower data to save damage after (e.g. forming the technique of inter-metal dielectric layer, metal layer and protective layer)
It loses, and improves the reliability of resistive random access memory.
According to some embodiments, the present invention provides a kind of resistive random access memory.This resistive random access is deposited
Reservoir includes a hearth electrode, a resistance conversion layer, a top electrode, a metal layer and a barrier layer.Resistance conversion layer is configured at
On hearth electrode.Top electrode is configured on resistance conversion layer.Metal layer is configured on top electrode.Barrier layer covers metal layer.Wherein,
Barrier layer is around metal layer and top electrode.
According to some embodiments, the present invention also provides a kind of manufacturing methods of resistive random access memory.This manufacture
Method includes: to form one to be opened in an insulating layer；A conductive material is deposited in the opening；It removes and is located at the upper of the opening
The conductive material is to form a hearth electrode；A resistance conversion layer is formed on hearth electrode；A top electrode is formed in resistance conversion layer
On；A metal layer is formed on top electrode；And form a barrier layer and cover metal layer, wherein barrier layer is around metal layer and top
Electrode.
More preferably understand to have to above-mentioned and other aspect of the invention, special embodiment below, and cooperate attached drawing, makees
Detailed description are as follows.However, protection scope of the present invention is when being subject to the claim that claim defined.
Detailed description of the invention
Fig. 1 is the sectional view according to the resistive random access memory of one embodiment of the invention.
Fig. 2A to Fig. 2 J is the sectional view according to the manufacture resistive random access memory of one embodiment of the invention.
Fig. 3 is the sectional view according to the resistive random access memory of another embodiment of the present invention.
Fig. 4 is the sectional view according to the resistive random access memory of further embodiment of this invention.
[symbol description]
10,20,30: resistive random access memory；
100: substrate；
101: preliminary structure；
110: trap；
112: slightly doped drain；
120: gate oxide structure；
122: oxide skin(coating)；
124: gate material layers；
210: dielectric layer；
210a: top surface；
220,320: conduction connecting structure；
230: insulating layer；
240: rising mouth；
250,350,450: resistor random access memory cell；
252,352,452: hearth electrode；
254,354,454: resistance conversion layer；
256,356,456: top electrode；
260: barrier layer；
2521: the first bottom electrode layers；
2522: the second bottom electrode layers；
2561: the first top electrode layers；
2562: the second top electrode layers；
M1: metal layer；
M1a: side wall.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with specific embodiment, and reference
Attached drawing, the present invention is described in more detail.
The embodiment of the present invention is for illustrating a kind of resistive random access formula memory and its manufacturing method.Such resistance
Formula arbitrary access formula memory and its manufacturing method provide a kind of resistive random access memory with barrier layer, barrier layer
Metal is covered and surround, with protective resistance formula random access memory unit, so that resistive random access memory is in rear end
There can be lower data to protect after technique (e.g. forming the technique of inter-metal dielectric layer, metal layer and protective layer)
Loss is deposited, and improves the reliability of resistive random access memory.
Plurality of embodiment proposed by the present invention is described, referring to the drawings to describe relative configuration and manufacturing method.
Relevant CONSTRUCTED SPECIFICATION such as relevant layers are not and the contents such as space configuration are as described in following example content.However, the present invention is simultaneously
Non- to be only limitted to the embodiment, the present invention not shows all possible embodiment.Same or similar label in embodiment
To indicate same or similar part.Furthermore it may not also can be applied in other embodiments proposed by the present invention.Correlation neck
Domain person can be changed and be modified to the structure of embodiment without departing from the spirit and scope of the present invention, to meet practical application
It is required.And attached drawing has simplified the content clearly to illustrate embodiment, the dimension scale on attached drawing is not according to actual product etc.
Ratio is drawn.Therefore, the description and the appended drawings content is only used for narration embodiment, not for limiting protection scope of the present invention.
Furthermore ordinal number used in specification and claim is for example " the first ", " the second ", " third " and etc. word,
To modify the element of claim, itself and unexpectedly contain and represent the request element have it is any before ordinal number, also not generation
The sequence or the sequence in manufacturing method of a certain request element of table and another request element, the use of those ordinal numbers are only used to
The request element with certain name is set to be able to make clear differentiation with another request element with identical name.
Fig. 1 is the sectional view according to the resistive random access memory of one embodiment of the invention.
Fig. 1 is please referred to, resistive random access memory 10 includes a substrate 100,210 (e.g. interlayer of a dielectric layer
Dielectric medium (inter-layer dielectric (ILD)), a conduction connecting structure 220, an insulating layer 230, a hearth electrode
252, a resistance conversion layer 254, a top electrode 256, a metal layer M1 and a barrier layer 260.Conduction connecting structure 220 configures
In on substrate 100 and across dielectric layer 210.Insulating layer 230 is configured on dielectric layer 210 and conduction connecting structure 220.Hearth electrode
252 are configured on substrate 100 and on conduction connecting structure 220.Resistance conversion layer 254 is configured on hearth electrode 252.Top electrode
256 are configured on resistance conversion layer 254.Metal layer M1 is configured on top electrode 256.Barrier layer 260 covers metal layer M1.Bottom electricity
Pole 252, resistance conversion layer 254 and top electrode 256 form a resistor random access memory cell 250.
In the present embodiment, barrier layer 260 is around insulating layer 230, hearth electrode 252, resistance conversion layer 254, top electrode 256
And metal layer M1, and barrier layer 260 is contacted with the one side wall of insulating layer 230, the one side wall of top electrode 256 and metal layer M1
One side wall M1a.Dielectric layer 210 have a top surface 210a, and 260 continuity of barrier layer cover top surface 210a, insulating layer
230, top electrode 256 and metal layer M1.Hearth electrode 252 and 254 system of resistance conversion layer are configured in the opening 240 of insulating layer 230
(as shown in 2C figure).
In some embodiments, substrate 100 can be formed by oxide containing silicon or other materials for being suitable for substrate.Trap
110 can be formed in substrate 100 with slightly doped drain (lightly doped drainimplant, LDD) 112.Trap 110 can
To be a p-type dopant well or a n-type doping trap, and it can be a source electrode or a drain electrode.Gate oxide structure 120 can be formed in
On substrate 100.Gate oxide structure 120 may include monoxide layer 122 and a gate material layers 124.Gate material layers 124
It can be formed by polysilicon.Separation material (spacer) (not being painted) can be formed on the side wall of gate oxide structure 120.Field oxygen
Compound layer (not being painted) can be formed on substrate 100.
In some embodiments, dielectric layer 210 can be multilayer, e.g. by undoped silica glass (Undoped
Silicate Glass, USG), silica glass (the phosphosilicate glass (PSG), silicon nitride layer (SiN of phosphorus doping
Layer) and tetraethoxysilane (tetraethoxysilane, TEOS) is formed by multilayer.Insulating layer 230 can be by dielectric material
Material is formed, and the range of thickness at 200 angstroms (angstrom) between 2000 angstroms.In the present embodiment, insulating layer 230 be by
Oxide is formed, and with a thickness of 1000 angstroms.
In some embodiments, conduction connecting structure 220 can be single layer structure or double-layer structure.Conduction connecting structure
220 can be formed by metal, e.g. tungsten (W), titanium nitride (TiN) or its combination.
In some embodiments, hearth electrode 252 may include (but being not limited to) tungsten (W), copper (Cu), iron (Fe), titanium (Ti),
Nickel (Ni), hafnium (Hf), titanium nitride (TiN), tantalum nitride (TaN) and other applicable materials.Hearth electrode 252 can be single layer
Structure or double-layer structure are e.g. formed by double-layer structure by tungsten (W) and titanium nitride (TiN).The thickness of hearth electrode 252 can be with
It is in 200 angstroms to 2000 angstroms of range.In the present embodiment, hearth electrode 252 with a thickness of 1000 angstroms.In the present embodiment,
Hearth electrode 252 is formed on the top surface 210a of dielectric layer 210, and is contacted with conduction connecting structure 220.
Resistance conversion layer 254 may include selected from titanium nitride (TiN), tungsten oxide (WOX), tantalum oxide (Ta2O5), hafnium oxide
(HfO2), silica (SiO2) material.It's not limited to that for the material of resistance conversion layer 254, and it is suitable to can be any other
In the material of the resistance conversion layer as resistive random access memory.Hearth electrode 252 and conduction connecting structure 220 may include
Identical material.
In some embodiments, top electrode 256 can be single layer structure or multilayered structure.For example, top electrode 256 can be
Double-layer structure is formed by by titanium nitride (TiN) and titanium (Ti).
In some embodiments, the material of metal layer M1 can be any metal material, e.g. aluminium (Al), copper
(Cu)。
In some embodiments, barrier layer 260 may include an oxymtride material, e.g. silicon oxynitride (SiON), nitrogen
Titanium oxide (TiON) or titanium oxynitrides silicon (TiSiON).The thickness on barrier layer 260 can be in 50 angstroms to 1000 angstroms of range.
In the present embodiment, barrier layer 260 is formed by silicon oxynitride (SiON), and with a thickness of 500 angstroms.
In some embodiments, resistive random access memory 10 may include be configured at 1 on dielectric layer 210 or
Dielectric layer (e.g. inter-metal dielectric layer (IMD layer), and protective layer can be formed in dielectric layer 210 and gold greater than 1
Belong to and (not being painted) on interlayer dielectric layer.Metal interlevel dielectric substance layer can covering barrier layer 260, and interlayer tie point (via)
It can be formed on metal layer M1 and penetrate the barrier layer 260 (not being painted) of a part.
In some embodiments, resistor random access memory cell 250, which can be formed in, is configured on metal layer M1
It on interlayer tie point, rather than is configured on conduction connecting structure 220, barrier layer 260 can cover and be contacted with other configurations in layer
Between on metal layer on tie point, and it is non-covered and be contacted with dielectric layer 210 (not being painted).Also that is, barrier layer 260 can be surround
Metal layer and resistor random access memory cell (not being painted) on interlayer tie point.
The top surface 210a and metal layer M1 of dielectric layer 210 are covered due to 260 continuity of barrier layer, also around top electrode
256 and metal layer M1, resistor random access memory cell 250 can be protected from backend process by perfect protection
Gas caused by (e.g. forming the technique of inter-metal dielectric layer, metal layer and protective layer) (e.g. hydrogen (H), ammonia
Gas (NH3), silane (SiH4) influence.Since barrier layer 260 of the invention is directly formed on metal layer M1 and around top electricity
Pole 256 and metal layer M1, barrier layer 260 is not formed between metal layer M1 and top electrode 256, therefore is not needed in metal layer
Other conductive structure is formed between M1 and top electrode 256.Therefore, process of the invention is formed in compared to by barrier layer
For comparative example between metal layer and top electrode, it appears more simple and quick.
Fig. 2A to Fig. 2 J is the sectional view according to the manufacture resistive random access memory 10 of one embodiment of the invention.
A referring to figure 2. provides a preliminary structure 101.The preliminary structure 101 can pass through existing complementary metal oxide
Front-end process (front-end process) in semiconductor technology (CMOS process) is formed.Preliminary structure 101 can wrap
It includes a substrate 100, the trap 110 that is formed in substrate 100, the slightly doped drain 112 being formed in substrate 100, formed
In the gate oxide structure 120 on substrate 100,210 (the e.g. interlayer dielectric of a dielectric layer that is formed on substrate 100
Layer) and a conduction connecting structure 220.Conduction connecting structure 220 is formed on substrate 100 and passes through dielectric layer 210.Grid oxygen
Compound structure 120 may include monoxide layer 122 and a gate material layers 124.Gate material layers 124 can be by polysilicon shape
At.Separation material (spacer) (not being painted) can be formed on the side wall of gate oxide structure 120.Field oxide layer (is not painted)
It can be formed on substrate 100.Conduction connecting structure 220 corresponds to the trap 110 being formed in substrate 100.It can be changed by carrying out one
Learn mechanical polishing (Chemical Mechanical Polishing, CMP) technique exposed dielectric layer 210 top surface 210a and
Conduction connecting structure 220.
B referring to figure 2., insulating layer 230 can pass through a depositing operation (e.g. plasma enhanced chemical vapor deposition
(Plasma-EnhancedChemical Vapor Deposition, PECVD), chemical vapor deposition (Chemical Vapor
Deposition, CVD)) it is formed on dielectric layer 210 and conduction connecting structure 220.The material of insulating layer 230 can be by being situated between
Electric material is formed, and the range of thickness can be at 200 angstroms to 2000 angstroms.In the present invention, insulating layer 230 is by oxide
It is formed, and with a thickness of 1000 angstroms.
C referring to figure 2. forms opening 240 in insulating layer 230 by an etching technics (an e.g. deep dry etch process)
In.The conduction connecting structure 220 of 240 exposure a part of opening, and define the region for being used to form hearth electrode 252.Opening 240
Width is less than the width of conduction connecting structure 220.
D referring to figure 2., formed one first bottom electrode layer 2521 and one second bottom electrode layer 2522 on insulating layer 230 and
In opening 240.First bottom electrode layer 2521 and one second bottom electrode layer 2522 can be by one conductive materials of deposition in insulating layer 230
Formed in upper and opening 240.In one embodiment, the material of the first bottom electrode layer 2521 can be titanium (Ti) or titanium nitride
(TiN), the material of the second bottom electrode layer 2522 may include (but non-limiting in) tungsten (W), copper (Cu), iron (Fe), titanium (Ti), nickel
(Ni), hafnium (Hf), titanium nitride (TiN), tantalum nitride (TaN) and other applicable materials.The thickness of first bottom electrode layer 2521
It can be in 10 angstroms to 200 angstroms of range.The thickness of second bottom electrode layer 2522 can be the range at 1000 to 3000 angstroms
In.In the present embodiment, the first bottom electrode layer 2521 with a thickness of 25 angstroms, and the second bottom electrode layer 2522 with a thickness of 2500
Angstrom.
E referring to figure 2. removes first bottom electrode layer 2521 and the second bottom electrode layer of a part by mechanical polishing method
2522, the conductive material on opening 240 will be located at and removed.That is, being located at the first bottom electrode layer on opening 240
2521 and second bottom electrode layer 2522 be to be completely removed.Then, it is formed across insulating layer 230 and is contacted in opening 240
The hearth electrode 252 including the first bottom electrode layer 2521 and the second bottom electrode layer 2522 of conduction connecting structure 220.
F referring to figure 2. then forms a resistance conversion layer 254 and carrying out oxidation technology to hearth electrode 252.One
In a little embodiments, oxidation technology is carried out by a plasma oxidation process.Resistance conversion layer 254 may include selected from nitrogen
Change titanium (TiN), tungsten oxide (WOX), tantalum oxide (Ta2O5), hafnium oxide (HfO2), silica (SiO2) material.In this implementation
In example, resistance conversion layer 254 is formed by tungsten oxide (WOX).
G referring to figure 2., by a depositing operation sequentially form the first top electrode layer 2561 and the second top electrode layer 2562 in
On insulating layer 230.First top electrode layer 2561 can be formed by titanium (Ti), and thickness is in 10 angstroms to 100 angstroms of range.The
Two top electrode layers 2562 can be formed by titanium nitride (TiN), and thickness is in 100 angstroms to 1000 angstroms of range.
H referring to figure 2., by an etching technics (an e.g. deep dry etch process) remove a part insulating layer 230, the
One top electrode layer 2561 and the second top electrode layer 2562, to be formed including the first top electrode layer 2561 and the second top electrode layer
2562 top electrode 256.First top electrode layer 2561 can be used as slow between resistance conversion layer 254 and the second top electrode layer 2562
Rush layer (buffer layer).After the etching process, the remainder of insulating layer 230 can cover the dielectric layer 210 of a part
Top surface 210a and conduction connecting structure 220, and the side wall of insulating layer 230 can be aligned in the side wall of top electrode 256.So
One, that is, form the resistor random access memory cell including hearth electrode 252, resistance conversion layer 254 and top electrode 256
250.Top electrode 256 is exemplarily schematically shown as double-layer structure, however the structure of top electrode 256 is not limited to this.
I referring to figure 2. forms metal layer M1 on conduction connecting structure 220 and top electrode 256.Then, pass through an etching
Technique forms the metal layer M1 for corresponding to conduction connecting structure 220.The one side wall M1a of metal layer M1 is aligned in top electrode 256
The side wall of side wall and insulating layer 230.The material of metal layer M1 can be any metal material, e.g. aluminium (A1), copper (Cu).
J referring to figure 2. forms barrier layer 260 by a depositing operation, and barrier layer 260 covers the top surface of dielectric layer 210
210a, insulating layer 230, resistor random access memory cell 250 and metal layer M1.In some embodiments, barrier layer 260
It may include an oxymtride material, e.g. silicon oxynitride (SiON), titanium oxynitrides (TiON) or titanium oxynitrides silicon (TiSiON).
The thickness on barrier layer 260 can be in 50 angstroms to 1000 angstroms of range.In the present embodiment, barrier layer 260 is by nitrogen oxidation
Silicon (SiON) is formed, and with a thickness of 500 angstroms.It is deposited in this way, form resistor type random access according to an embodiment of the invention
Access to memory 10.
Fig. 3 is the sectional view according to the resistive random access memory 20 of another embodiment of the present invention.Referring to
Fig. 1.Furthermore identical in Fig. 3 and Fig. 1 and/or similar components continue to use identical and/or similar label, and similar elements/layer structure
Details are not described herein for type, preparation method and each layer function.
Referring to figure 3., the hearth electrode 352 with identical material and width and conduction can be formed by different depositing operations
Connection structure 320.Alternatively, substantially the same hearth electrode 352 and conduction connecting structure of structure can be formed by identical technique
320.Hearth electrode 352 can be formed in an opening of dielectric material 210, and can be by carrying out an oxidation work for hearth electrode 352
Skill forms resistance conversion layer 354.Hearth electrode 352 and resistance conversion layer 354 can be formed under top surface 210a.Top electrode 356
It can be formed on the top surface 210a and resistance conversion layer 354 of a part.In this way, can on conduction connecting structure 320 shape
At the resistor random access memory cell 350 including hearth electrode 352, resistance conversion layer 354 and top electrode 356.Metal layer
M1 is configured on top electrode 356.Top surface 210a and metal layer M1 is covered to 260 continuity of barrier layer, and around metal layer M1
And top electrode 356.Barrier layer 260 also contacts the side wall of top electrode 356 and the side wall M1a of metal layer M1.
Fig. 4 is the sectional view according to the resistive random access memory 30 of further embodiment of this invention.Referring to
Fig. 1.Furthermore identical in Fig. 4 and Fig. 1 and/or similar components continue to use identical and/or similar label, and similar elements/layer structure
Details are not described herein for type, preparation method and each layer function.
Referring to figure 4., it in the opening for the insulating layer that hearth electrode 452 is not formed on dielectric layer, and is directly formed
In on top surface 210a and conduction connecting structure 220.May there is no remaining insulating layer on the top surface 210a of dielectric layer 210,
And hearth electrode 452 covers and is contacted with the top surface 210a and conduction connecting structure 220 of a part.The width of hearth electrode 452 is big
In the width of conduction connecting structure 220.Resistance conversion layer 454 is configured on hearth electrode 452, and top electrode 456 is configured at resistance
Conversion layer 454.In this way, which being formed on conduction connecting structure 220 includes hearth electrode 452, resistance conversion layer 454 and top electricity
The resistor random access memory cell 450 of pole 456.Metal layer M1 is configured on top electrode 456.Barrier layer 260 is continuous
Property cover top surface 210a and metal layer M1, and around metal layer M1 and resistor random access memory cell 450.And
And barrier layer 260 is contacted with the side wall and metal layer of the side wall of hearth electrode 452, the side wall of resistance conversion layer 454, top electrode 456
The side wall M1a of M1.
According to mentioned above, barrier layer covering metal layer, and around top electrode and metal layer, so that resistor type random access is deposited
Access to memory unit can be protected from backend process and (e.g. form inter-metal dielectric layer, metal by perfect protection
Layer and protective layer technique) caused by gas (e.g. hydrogen (H), ammonia (NH3), silane (SiH4) influence.By
It forms metal layer and just forms barrier layer later, barrier layer is formed directly on metal layer.That is, metal layer and top electrode
Between electric connection can not be by the interruption on barrier layer, without forming other conduction between metal layer and top electrode
Structure, therefore for process of the invention is compared to the comparative example between metal layer and top electrode is formed in by barrier layer, it shows
It obtains more simple and quick.Therefore, resistive random access memory of the invention can have lower data to save loss, and
Have preferable resistive random access memory reliability, and the manufacturing method of resistive random access memory of the invention
Lower cost and time can be spent.
Other embodiments, such as the known members of element have different setting and arrangement etc., it is also possible to it can apply, according to
Using when actual demand and condition and adjustment or variation appropriate can be made.Therefore, specification and structure shown in the drawings be only
For illustrating, it is not intended to limit the invention the range to be protected.In addition, those skilled in the art are it will be appreciated that in embodiment
The shape of component parts and position are also not limited to the embodiment of attached drawing expression, and demand when according to practical application and/or
Manufacturing step can be adjusted accordingly in the case where without departing from the spirit.
Although however, it is not to limit the invention in conclusion the present invention is disclosed as above with embodiment.Institute of the present invention
Belonging to has general knowledge known in this field person in technical field, without departing from the spirit and scope of the present invention, when can make various change
Dynamic and retouching.Therefore, protection scope of the present invention is when being subject to the claim that claim defined.
Particular embodiments described above has carried out further in detail the purpose of the present invention, technical scheme and beneficial effects
It describes in detail bright, it should be understood that the above is only a specific embodiment of the present invention, is not intended to restrict the invention, it is all
Within the spirit and principles in the present invention, any modification, equivalent substitution, improvement and etc. done should be included in guarantor of the invention
Within the scope of shield.
Claims (10)
1. a kind of resistive random access memory, comprising:
One hearth electrode；
One resistance conversion layer, is configured on the hearth electrode；
One top electrode is configured on the resistance conversion layer；
One metal layer is configured on the top electrode；And
One barrier layer covers the metal layer, and wherein the barrier layer is around the metal layer and the top electrode.
2. resistive random access memory according to claim 1, wherein the barrier layer includes a nitrogen oxides material
Material.
3. resistive random access memory according to claim 2, wherein the oxymtride material is silicon oxynitride
(SiON), titanium oxynitrides (TiON) or titanium oxynitrides silicon (TiSiON).
4. resistive random access memory according to claim 1, wherein the thickness on the barrier layer is at 50 angstroms
In the range of (angstrom) to 1000 angstroms.
5. resistive random access memory according to claim 1, further includes:
One substrate, wherein the hearth electrode is configured on the substrate；
One dielectric layer is configured on the substrate；And
One conduction connecting structure is configured on the substrate and passes through the dielectric layer, and wherein the dielectric layer has a top surface, the resistance
Cover to barrier continuity the top surface and the metal layer.
6. a kind of manufacturing method of resistive random access memory, comprising:
One is formed to be opened in an insulating layer；
A conductive material is deposited in the opening；
The conductive material being located on the opening is removed to form a hearth electrode；
A resistance conversion layer is formed on the hearth electrode；
A top electrode is formed on the resistance conversion layer；
A metal layer is formed on the top electrode；And
It forms a barrier layer and covers the metal layer, wherein the barrier layer is around the metal layer and the top electrode.
7. the manufacturing method of resistive random access memory according to claim 6, wherein the barrier layer includes a nitrogen
Oxide material.
8. the manufacturing method of resistive random access memory according to claim 7, wherein the oxymtride material is
Silicon oxynitride (SiON), titanium oxynitrides (TiON) or titanium oxynitrides silicon (TiSiON).
9. the manufacturing method of resistive random access memory according to claim 6, wherein the thickness on the barrier layer is
In the range of 50 angstroms (angstrom) to 1000 angstroms.
10. the manufacturing method of resistive random access memory according to claim 6, further includes:
A substrate is formed before forming the hearth electrode, wherein the hearth electrode is formed on the substrate；
A dielectric layer is formed on the substrate；And
A conduction connecting structure is formed on the substrate and across the dielectric layer, wherein the dielectric layer has a top surface, the resistance
Cover to barrier continuity the top surface and the metal layer.
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| CN112086556A (en) * | 2019-06-13 | 2020-12-15 | 联华电子股份有限公司 | Memory cell and forming method thereof |
| CN116075212A (en) * | 2023-03-06 | 2023-05-05 | 昕原半导体(上海)有限公司 | Resistive random access memory and preparation method thereof |
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