CN109117406B - PCIE hot plug test method, device, terminal and storage medium - Google Patents

PCIE hot plug test method, device, terminal and storage medium Download PDF

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CN109117406B
CN109117406B CN201810967274.6A CN201810967274A CN109117406B CN 109117406 B CN109117406 B CN 109117406B CN 201810967274 A CN201810967274 A CN 201810967274A CN 109117406 B CN109117406 B CN 109117406B
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power
simulation state
state
test
simulation
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CN109117406A (en
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刘胜
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4063Device-to-bus coupling
    • G06F13/4068Electrical coupling
    • G06F13/4081Live connection to bus, e.g. hot-plugging

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  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The embodiment of the application provides a PCIE hot plug test method, a device, a terminal and a storage medium, wherein the method comprises the following steps: connecting a PCIE interface and a test card by using an intermediate interface; setting a test period comprising a power-on simulation state and a power-off simulation state; controlling the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state; and acquiring the state information of the test card. The PCIE interface and the test card are connected by the intermediate interface, and the hot plug is simulated by controlling the loading and unloading of the intermediate interface, so that the automatic hot plug test of the PCIE is realized. The invention does not need to execute the complicated operations of turning off all the applications and test programs, better testing the card, powering on again and the like, only needs to control the driving state of the intermediate interface, has simple operation, improves the test efficiency and saves a large amount of test time.

Description

PCIE hot plug test method, device, terminal and storage medium
Technical Field
The invention belongs to the technical field of server testing, and particularly relates to a PCIE hot plug testing method, a PCIE hot plug testing device, a PCIE hot plug testing terminal and a storage medium.
Background
Currently, PCIE devices are the most mainstream devices, but PCIE interfaces cannot be hot-plugged, and in actual testing, situations that different cards need to be tested are often encountered. The current operation can only be power-off, all applications and test programs are shut down, the test card is replaced, the power is supplied again, and the test application runs, so that the time is wasted.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a PCIE hot plug test method, a device, a terminal and a storage medium, so as to solve the technical problems.
In a first aspect, an embodiment of the present application provides a PCIE hot plug test method, where the method includes:
connecting a PCIE interface and a test card by using an intermediate interface;
setting a test period comprising a power-on simulation state and a power-off simulation state;
controlling the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state;
and acquiring the state information of the test card.
With reference to the first aspect, in a first implementation manner of the first aspect, the controlling the intermediate interface to load the driver in the power-on simulation state and unload the driver in the power-off simulation state includes:
setting the duration of a power-on simulation state and the duration of a power-off simulation state;
controlling the intermediate interface to load a driver in a power-on simulation state, and ending the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
and controlling the intermediate interface to unload the drive in the power-off simulation state and ending the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state.
With reference to the first aspect, in a second implementation manner of the first aspect, the method further includes:
setting the test cycle times;
and circularly executing the test period according to the cycle times.
In a second aspect, an embodiment of the present application provides a PCIE hot plug test apparatus, where the apparatus includes:
the connection unit is configured to connect the PCIE interface and the test card by using the intermediate interface;
a setting unit configured to set a test period including a power-on simulation state and a power-off simulation state;
the execution unit is configured to control the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state;
and the acquisition unit is configured to acquire the state information of the test card.
With reference to the second aspect, in a first implementation manner of the second aspect, the execution unit includes:
the time setting module is configured for setting the duration time of the power-on simulation state and the duration time of the power-off simulation state;
the power-on simulation module is configured to control the intermediate interface to load the driver in a power-on simulation state, and end the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
and the power-off simulation module is configured to control the intermediate interface to unload the drive in the power-off simulation state and end the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state.
With reference to the second aspect, in a second implementation manner of the second aspect, the apparatus further includes:
a number setting unit configured to set a number of test cycles;
and the cycle execution unit is configured to execute the test cycle in a cycle according to the cycle times.
In a third aspect, a terminal is provided, including:
a processor, a memory, wherein,
the memory is used for storing a computer program which,
the processor is configured to call and run the computer program from the memory, so that the terminal performs the above-mentioned method of the terminal.
In a fourth aspect, a computer storage medium is provided having stored therein instructions that, when executed on a computer, cause the computer to perform the method of the above aspects.
In a fifth aspect, there is provided a computer program product comprising instructions which, when run on a computer, cause the computer to perform the method of the above aspects.
The beneficial effect of the invention is that,
according to the PCIE hot plug test method, the device, the terminal and the storage medium, the PCIE interface and the test card are connected through the intermediate interface, and the hot plug is simulated by controlling the loading and unloading of the intermediate interface, so that the automatic hot plug test of the PCIE is realized. The invention does not need to execute the complicated operations of turning off all the applications and test programs, better testing the card, powering on again and the like, only needs to control the driving state of the intermediate interface, has simple operation, improves the test efficiency and saves a large amount of test time.
In addition, the invention has reliable design principle, simple structure and very wide application prospect.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a schematic flow chart diagram of a method of one embodiment of the present application.
FIG. 2 is a schematic block diagram of an apparatus of one embodiment of the present application.
Fig. 3 is a schematic structural diagram of a terminal according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The following explains key terms appearing in the present application.
FIG. 1 is a schematic flow chart diagram of a method of one embodiment of the present application. The execution main body in fig. 1 may be a PCIE hot-plug test apparatus.
As shown in fig. 1, the method 100 includes:
step 110, connecting a PCIE interface and a test card by using an intermediate interface;
step 120, setting a test period including a power-on simulation state and a power-off simulation state;
step 130, controlling the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state;
step 140, obtaining the state information of the test card.
In order to facilitate understanding of the present invention, the PCIE hot plug test method provided in the present invention is further described below by using the principle of the PCIE hot plug test of the present invention and combining the process of performing a hot plug test on PCIE in the embodiment.
Optionally, as an embodiment of the present application, the controlling the intermediate interface to load the driver in the power-on analog state and unload the driver in the power-off analog state includes:
setting the duration of a power-on simulation state and the duration of a power-off simulation state;
controlling the intermediate interface to load a driver in a power-on simulation state, and ending the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
and controlling the intermediate interface to unload the drive in the power-off simulation state and ending the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state.
Optionally, as an embodiment of the present application, the method further includes:
setting the test cycle times;
and circularly executing the test period according to the cycle times.
Specifically, the PCIE hot plug test method includes:
and S1, connecting the PCIE interface and the test card by using the intermediate interface.
The intermediate interface comprises a first interface, a second interface and a microprocessor, and the first interface and the second interface are electrically connected with the microprocessor. And connecting the first interface of the intermediate interface with the PCIE interface, and connecting the second interface with the test card, thereby realizing the electrical connection between the PCIE interface and the test card.
And S2, setting a test period comprising a power-on simulation state and a power-off simulation state.
And S3, controlling the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state.
The duration time of the power-on simulation state and the duration time of the power-off simulation state are set, in this embodiment, the duration time of the power-on simulation state is set to be 15min, the duration time of the power-off simulation state is set to be 5min, the duration time of the power-on simulation state is set to be 15min, and the duration time of the power-off simulation state is set to be 5min to form a test period. Controlling a microprocessor loading or unloading drive of an intermediate interface, controlling the intermediate interface loading drive in a power-on simulation state, powering on a test card to realize hot plug, and ending the power-on simulation state after the drive available state duration of the intermediate interface reaches 15 min; and controlling the intermediate interface to unload the drive in the power-off simulation state, powering off the test card to realize hot plug, and ending the power-off simulation state after the drive unavailable state duration of the intermediate interface reaches 5 min.
And S4, acquiring the state information of the test card.
The state information of the test card is obtained, and the test card can be a clip of any PCIE interface, such as a RAID card, a video card, a network card, an SAS card, and the like. And after the test period is executed once, the information of the test card in the power-on state is acquired and stored, and whether the test card is available in the power-on state is judged.
And S5, testing in a circulating mode.
The number of test cycles is set, and this embodiment is set to 60. Cycle number the cycle is performed for 60 test cycles.
As shown in fig. 2, the apparatus 200 includes:
the connection unit 210 is configured to connect the PCIE interface and the test card by using an intermediate interface;
a setting unit 220, the setting unit 220 being configured to set a test period including a power-on simulation state and a power-off simulation state;
an execution unit 230, wherein the execution unit 230 is configured to control the intermediate interface to load a driver in a power-on simulation state and unload the driver in a power-off simulation state;
an obtaining unit 240, where the obtaining unit 240 is configured to obtain status information of the test card.
Optionally, as an embodiment of the present application, the execution unit includes:
the time setting module is configured for setting the duration time of the power-on simulation state and the duration time of the power-off simulation state;
the power-on simulation module is configured to control the intermediate interface to load the driver in a power-on simulation state, and end the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
and the power-off simulation module is configured to control the intermediate interface to unload the drive in the power-off simulation state and end the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state.
Optionally, as an embodiment of the present application, the apparatus further includes:
a number setting unit configured to set a number of test cycles;
and the cycle execution unit is configured to execute the test cycle in a cycle according to the cycle times.
Fig. 3 is a schematic structural diagram of a terminal device 300 according to an embodiment of the present invention, where the terminal device 300 may be used to execute the method for updating the heat dissipation policy parameter according to the embodiment of the present application.
Among them, the terminal apparatus 300 may include: a processor 310, a memory 320, and a communication unit 330. The components communicate via one or more buses, and those skilled in the art will appreciate that the architecture of the servers shown in the figures is not limiting of the application, and may be a bus architecture, a star architecture, a combination of more or fewer components than those shown, or a different arrangement of components.
The memory 320 may be used for storing instructions executed by the processor 310, and the memory 320 may be implemented by any type of volatile or non-volatile storage terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The executable instructions in memory 320, when executed by processor 310, enable terminal 300 to perform some or all of the steps in the method embodiments described below.
The processor 310 is a control center of the storage terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and performs various functions of the electronic terminal and/or processes data by operating or executing software programs and/or units stored in the memory 320 and calling data stored in the memory. The processor may be composed of an Integrated Circuit (IC), for example, a single packaged IC, or a plurality of packaged ICs connected with the same or different functions. For example, the processor 310 may include only a Central Processing Unit (CPU). In the embodiments of the present application, the CPU may be a single arithmetic core or may include multiple arithmetic cores.
A communication unit 330, configured to establish a communication channel so that the storage terminal can communicate with other terminals. And receiving user data sent by other terminals or sending the user data to other terminals.
The present application also provides a computer storage medium, wherein the computer storage medium may store a program, and the program may include some or all of the steps in the embodiments provided in the present application when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM) or a Random Access Memory (RAM).
Therefore, the PCIE interface and the test card are connected through the intermediate interface, and the hot plug is simulated by controlling the loading and unloading of the intermediate interface, so that the automatic hot plug test of the PCIE is realized. According to the invention, the complicated operations of turning off all applications and test programs, better testing cards, powering on again and the like are not required to be executed, only the driving state of the intermediate interface is required to be controlled, the operation is simple, the testing efficiency is improved, and a large amount of testing time is saved.
Those skilled in the art will clearly understand that the techniques in the embodiments of the present application may be implemented by way of software plus a required general hardware platform. Based on such understanding, the technical solutions in the embodiments of the present application may be embodied in the form of a software product, where the computer software product is stored in a storage medium, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, and includes several instructions to enable a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, and the like) to perform all or part of the steps of the method according to the embodiments of the present invention.
The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims (4)

1. A PCIE hot plug test method is characterized in that the method comprises the following steps:
connecting a PCIE interface and a test card by using an intermediate interface;
setting a test period comprising a power-on simulation state and a power-off simulation state;
controlling the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state;
acquiring state information of the test card;
the control intermediate interface loading the driver in the power-on simulation state and unloading the driver in the power-off simulation state comprises:
setting the duration of a power-on simulation state and the duration of a power-off simulation state;
controlling the intermediate interface to load a driver in a power-on simulation state, and ending the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
controlling the intermediate interface to unload the drive in a power-off simulation state and ending the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state;
the method further comprises the following steps:
setting the test cycle times;
and circularly executing the test period according to the cycle times.
2. A PCIE hot plug test device is characterized in that the device comprises:
the connection unit is configured to connect the PCIE interface and the test card by using the intermediate interface;
a setting unit configured to set a test period including a power-on simulation state and a power-off simulation state;
the execution unit is configured to control the intermediate interface to load the driver in a power-on simulation state and unload the driver in a power-off simulation state;
the acquisition unit is configured to acquire the state information of the test card;
the execution unit includes:
the time setting module is configured for setting the duration time of the power-on simulation state and the duration time of the power-off simulation state;
the power-on simulation module is configured to control the intermediate interface to load the driver in a power-on simulation state, and end the power-on simulation state after the driver available state of the intermediate interface reaches the duration of the power-on simulation state;
the power-off simulation module is configured to control the intermediate interface to unload the drive in a power-off simulation state and end the power-off simulation state after the drive unavailable state of the intermediate interface reaches the duration of the power-off simulation state;
the device further comprises:
a number setting unit configured to set a number of test cycles;
and the cycle execution unit is configured to execute the test cycle in a cycle according to the cycle times.
3. A terminal, comprising:
a processor;
a memory for storing instructions for execution by the processor;
wherein the processor is configured to perform the method of claim 1.
4. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method of claim 1.
CN201810967274.6A 2018-08-23 2018-08-23 PCIE hot plug test method, device, terminal and storage medium Active CN109117406B (en)

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CN110489287B (en) * 2019-07-12 2023-01-10 苏州浪潮智能科技有限公司 Method, system and storage medium for testing hot plug through Ipomitool
CN111447121B (en) * 2020-03-31 2022-05-03 龙芯中科(北京)信息技术有限公司 Test method, device, equipment and storage medium of PCIE controller

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CN102053939A (en) * 2009-10-30 2011-05-11 英业达股份有限公司 Hot-plug control method of Peripheral Component Interconnect Express (PCIE) tab

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US6067506A (en) * 1997-12-31 2000-05-23 Intel Corporation Small computer system interface (SCSI) bus backplane interface
US10114658B2 (en) * 2016-05-23 2018-10-30 Baida USA LLC Concurrent testing of PCI express devices on a server platform

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CN102053939A (en) * 2009-10-30 2011-05-11 英业达股份有限公司 Hot-plug control method of Peripheral Component Interconnect Express (PCIE) tab

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