CN109104818A - A kind of pcb board processing method - Google Patents

A kind of pcb board processing method Download PDF

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Publication number
CN109104818A
CN109104818A CN201811145806.4A CN201811145806A CN109104818A CN 109104818 A CN109104818 A CN 109104818A CN 201811145806 A CN201811145806 A CN 201811145806A CN 109104818 A CN109104818 A CN 109104818A
Authority
CN
China
Prior art keywords
layer
pcb board
aperture
micro
chip according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201811145806.4A
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Chinese (zh)
Inventor
张文杰
谢亮
金湘亮
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jiangsu Core Z-Tek Electronic Science And Technology Co Ltd
Original Assignee
Jiangsu Core Z-Tek Electronic Science And Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Core Z-Tek Electronic Science And Technology Co Ltd filed Critical Jiangsu Core Z-Tek Electronic Science And Technology Co Ltd
Priority to CN201811145806.4A priority Critical patent/CN109104818A/en
Publication of CN109104818A publication Critical patent/CN109104818A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0055After-treatment, e.g. cleaning or desmearing of holes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/022Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/227Drying of printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107Using laser light
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1105Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14Related to the order of processing steps

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Laser Beam Processing (AREA)

Abstract

The invention discloses a kind of pcb board processing method, laser cutting and baking procedure make pcb board be not easy to be layered;High-temperature laminating step is carried out before surface coating step, and the surface coating layer of coating needs not move through high-temperature laminating process without being destroyed, to will not influence the solderability of pcb board finished product;The figure of insulating regions is processed by etching mode, is not influenced by area, shape, precision is controllable;Existing PI film is replaced using the PP insulation flake products of low discharge glue, it is at low cost, it is advantageous to promote and apply.

Description

A kind of pcb board processing method
Technical field
The invention belongs to printed circuit board technology fields, and in particular to a kind of pcb board processing method.
Background technique
PCB(Printed Circuit Board), Chinese is printed circuit board, is the support of electronic component Body provides electrical connection for electronic component.In the process of PCB plate, outer layer process flow is generally: pattern transfer → graphic plating → etching → welding resistance character → surface treatment → processing and forming.In the common processing of surface treatment procedure, Xi Chu is sprayed The PNL plate of PCB is directly protruding into high temperature tin furnace wicking by reason, due to the powerful thermal shock that spray tin processing is moment, leads to pcb board Edge is easy to appear lamination.
In existing pcb board process, generally require to implement insulation processing to some regions.Existing insulating method is deposited In following problems: in addition to change layer gold can be with high temperature resistant, other such as change tin layers, change silver layer and have the surface coating layer of surface coating Machine protects the weldering equal non-refractory of film layer, and therefore, the high-temperature laminating step finally implemented can destroy surface coating layer, and then directly affect The solderability of pcb board finished product;PI film insulating trip is processed using conventional milling side technique, since PI membrane material is thin, soft, to exhausted The size in edge region requires, so that the precision of the insulating regions after PI film insulating trip pressing and forming is not easy to control;PI film Insulating trip higher cost causes such pcb board manufacturing cost higher, is unfavorable for its popularization.
Summary of the invention
The present invention provides a kind of pcb board processing methods, solve the above problem, provide processing and are not easy to be layered, keep Good solderability, the dimensional accuracy for improving insulating regions, the pcb board method for reducing manufacturing cost.
In order to solve the above-mentioned technical problem, the technical scheme adopted by the invention is that: a kind of pcb board processing method, including Following steps:
S1, plate to be processed is provided, plate to be processed is provided is machined with crimping device and uses and the first device aperture for needing one end to insulate and the One outer-layer circuit layer, the first outer-layer circuit layer include the pad positioned at the first device aperture aperture, the first device aperture hole wall and pad Connection;
S2, high-temperature laminating carry out high-temperature laminating after plate both side surface to be processed stacks gradually insulating layer and copper foil layer respectively again Circuit board body is made;
The shape of cutting region on S3, default PCB plate;
S4, PCB plate is placed on equipped on vacuum absorption device processing platform, is adsorbed PCB plate with vacuum absorption device On processing platform;
S5, it is cut on the boundary of cutting region along pcb board using laser beam, and using layering and front and back sides processing, laser The power of beam is 6~10W, and the rate travel of the relatively described pcb board of laser beam is 120~250mm/s, the pulse frequency of laser beam For 30~60KHz, the burst length is 1~4um;
S6, the layers of copper that pcb board edge is removed using edging mode, pcb board side substrate is exposed, and pcb board is carried out 105 DEG C~170 DEG C/the r baking removal pcb board edge substrate of 0.5hr~for 24 hours in moisture;
S7, etch process ablation copper foil layer is used to form the second outer-layer circuit layer, and first device aperture need to crimp device One end and the end pad expose;
S8, welding resistance technique is used to form solder mask in surface of insulating layer to cover the area that the second outer-layer circuit floor is not necessarily to interface unit Domain;
S9, surface coating, in the region that the first outer-layer circuit layer of exposing and the second outer-layer circuit layer are not covered by solder mask Make the surface coating layer for avoiding figure copper from aoxidizing.
Preferably, in the step S1, the first device that supply and demand mutually crimps one end with external devices is also provided on insulating layer The window that the pad at part hole and its end exposes.
Preferably, the second outer-layer circuit layer and second device in the step S7, positioned at the second device aperture aperture The hole wall in hole connects.
Preferably, in the step S7, it need to crimp and expose with external devices after producing the second outer-layer circuit layer The first device aperture end surface copper foil mechanical removal to expose the stomidium mouth and pad.
Preferably, in the step S2, insulating layer is resin flow≤70mil insulating layer.
Preferably, in the step S2, insulating layer is PP insulating trip.
Preferably, in the step S9, surface coating layer is to change gold, change tin, change silver or organic guarantor to weld film.
Preferably, laser beam uses ultraviolet laser in the step S5,;The processing times of laser beam are 5 ~ 25 times.
Advantageous effects of the invention: laser cutting and baking procedure make pcb board be not easy to be layered;High-temperature laminating step It suddenly is carried out before surface coating step, the surface coating layer of coating needs not move through high-temperature laminating process without being destroyed, To will not influence the solderability of pcb board finished product;The figures of insulating regions is processed by etching mode, not by area, shape It influences, precision is controllable;Existing PI film is replaced using the PP insulation flake products of low discharge glue, it is at low cost, it is advantageous to promote and apply.
Specific embodiment
The invention will be further described below.Following embodiment is only used for clearly illustrating technical side of the invention Case, and not intended to limit the protection scope of the present invention.
Embodiment one:
S1, plate to be processed is provided, plate to be processed is provided is machined with crimping device and uses and the first device aperture for needing one end to insulate and the One outer-layer circuit layer, the first outer-layer circuit layer include the pad positioned at the first device aperture aperture, the first device aperture hole wall and pad Connection;Be also provided on insulating layer supply and demand mutually crimped with external devices one end the first device aperture and its end pad expose Window.
S2, high-temperature laminating carry out high temperature after plate both side surface to be processed stacks gradually insulating layer and copper foil layer respectively again Pressing is to be made circuit board body;Insulating layer is resin flow≤70mil PP insulating trip.
The shape of cutting region on S3, default PCB plate.
S4, PCB plate is placed on equipped on vacuum absorption device processing platform, with vacuum absorption device by PCB plate It is adsorbed on processing platform.
S5, using ultraviolet laser, the boundary of beam cutting region along pcb board carry out cutting 25 times, and using layering and just Reverse side processing, the power of laser beam are 8W, and the rate travel of the relatively described pcb board of laser beam is 100mm/s, the pulse of laser beam Frequency is 25KHz, burst length 3um.
S6, the layers of copper that pcb board edge is removed using edging mode, pcb board side substrate is exposed, and pcb board is carried out 130 DEG C of bakings Moisture in roasting removal pcb board edge substrate.
S7, etch process ablation copper foil layer is used to form the second outer-layer circuit layer, need to crimp and reveal with external devices The copper foil mechanical removal of the first device aperture end surface out is to expose the stomidium mouth and pad, and first device aperture needs to press The pad of one end and the end for connecing device exposes;The second outer-layer circuit layer and second device positioned at the second device aperture aperture The hole wall in part hole connects.
S8, welding resistance technique is used to form solder mask in surface of insulating layer to cover the second outer-layer circuit layer without interface unit Region;
S9, surface coating, in the region that the first outer-layer circuit layer of exposing and the second outer-layer circuit layer are not covered by solder mask Make the change tin film for avoiding figure copper from aoxidizing.
Embodiment two:
S1, plate to be processed is provided, plate to be processed is provided is machined with crimping device and uses and the first device aperture for needing one end to insulate and the One outer-layer circuit layer, the first outer-layer circuit layer include the pad positioned at the first device aperture aperture, the first device aperture hole wall and pad Connection;Be also provided on insulating layer supply and demand mutually crimped with external devices one end the first device aperture and its end pad expose Window.
S2, high-temperature laminating carry out high temperature after plate both side surface to be processed stacks gradually insulating layer and copper foil layer respectively again Pressing is to be made circuit board body;Insulating layer is resin flow≤70mil PP insulating trip.
The shape of cutting region on S3, default PCB plate.
S4, PCB plate is placed on equipped on vacuum absorption device processing platform, is inhaled PCB plate with vacuum absorption device It is attached on processing platform.
S5, using ultraviolet laser, the boundary of beam cutting region along pcb board carry out cutting 20 times, and using layering and just Reverse side processing, the power of laser beam are 7W, and the rate travel of the relatively described pcb board of laser beam is 200mm/s, the pulse of laser beam Frequency is 55KHz, burst length 2um.
S6, the layers of copper that pcb board edge is removed using edging mode, pcb board side substrate is exposed, and pcb board is carried out 160 DEG C of bakings Moisture in roasting removal pcb board edge substrate.
S7, etch process ablation copper foil layer is used to form the second outer-layer circuit layer, need to crimp and reveal with external devices The copper foil mechanical removal of the first device aperture end surface out is to expose the stomidium mouth and pad, and first device aperture needs to press The pad of one end and the end for connecing device exposes;The second outer-layer circuit layer and second device positioned at the second device aperture aperture The hole wall in part hole connects.
S8, welding resistance technique is used to form solder mask in surface of insulating layer to cover the second outer-layer circuit layer without interface unit Region;
S9, surface coating, in the region that the first outer-layer circuit layer of exposing and the second outer-layer circuit layer are not covered by solder mask It makes organic guarantor for avoiding figure copper from aoxidizing and welds film.
The above is only a preferred embodiment of the present invention, it is noted that for the ordinary skill people of the art For member, without departing from the technical principles of the invention, several improvement and deformations can also be made, these improvement and deformations Also it should be regarded as protection scope of the present invention.

Claims (8)

1. a kind of pcb board processing method, which comprises the following steps:
S1, plate to be processed is provided, plate to be processed is provided is machined with crimping device and uses and the first device aperture for needing one end to insulate and the One outer-layer circuit layer, the first outer-layer circuit layer include the pad positioned at the first device aperture aperture, the first device aperture hole wall and pad Connection;
S2, high-temperature laminating carry out high-temperature laminating after plate both side surface to be processed stacks gradually insulating layer and copper foil layer respectively again Circuit board body is made;
The shape of cutting region on S3, default PCB plate;
S4, PCB plate is placed on equipped on vacuum absorption device processing platform, is adsorbed PCB plate with vacuum absorption device On processing platform;
S5, it is cut on the boundary of cutting region along pcb board using laser beam, and using layering and front and back sides processing, laser The power of beam is 6~10W, and the rate travel of the relatively described pcb board of laser beam is 120~250mm/s, the pulse frequency of laser beam Rate is 30~60KHz, and the burst length is 1~4um;
S6, the layers of copper that pcb board edge is removed using edging mode, pcb board side substrate is exposed, and pcb board is carried out 105 DEG C~170 DEG C/the r baking removal pcb board edge substrate of 0.5hr~for 24 hours in moisture;
S7, etch process ablation copper foil layer is used to form the second outer-layer circuit layer, and first device aperture need to crimp device One end and the end pad expose;
S8, welding resistance technique is used to form solder mask in surface of insulating layer to cover the area that the second outer-layer circuit floor is not necessarily to interface unit Domain;
S9, surface coating, in the region that the first outer-layer circuit layer of exposing and the second outer-layer circuit layer are not covered by solder mask Make the surface coating layer for avoiding figure copper from aoxidizing.
2. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S1, absolutely The window that supply and demand mutually crimps first device aperture of one end with external devices and its pad at the end exposes is also provided in edge layer.
3. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S7, position The second outer-layer circuit layer in the second device aperture aperture is connect with the hole wall of second device aperture.
4. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S7, It produces the copper foil for the first device aperture end surface that need to be crimped and expose with external devices is mechanical after the second outer-layer circuit layer It goes divided by the exposing stomidium mouth and pad.
5. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S2, absolutely Edge layer is resin flow≤70mil insulating layer.
6. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S2, absolutely Edge layer is PP insulating trip.
7. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that in the step S9, table Face coat is to change gold, change tin, change silver or organic guarantor to weld film.
8. a kind of bonding method of micro-fluidic chip according to claim 1, which is characterized in that laser in the step S5 Shu Caiyong ultraviolet laser,;The processing times of laser beam are 5 ~ 25 times.
CN201811145806.4A 2018-09-29 2018-09-29 A kind of pcb board processing method Pending CN109104818A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811145806.4A CN109104818A (en) 2018-09-29 2018-09-29 A kind of pcb board processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811145806.4A CN109104818A (en) 2018-09-29 2018-09-29 A kind of pcb board processing method

Publications (1)

Publication Number Publication Date
CN109104818A true CN109104818A (en) 2018-12-28

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115121305A (en) * 2022-07-13 2022-09-30 北京理工大学 Novel digital microfluidic chip and preparation method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103096631A (en) * 2013-01-08 2013-05-08 广东生益科技股份有限公司 Processing method of printed circuit board (PCB) and PCB
CN104470211A (en) * 2013-09-24 2015-03-25 深南电路有限公司 PCB machining method and PCB
CN106271096A (en) * 2015-06-09 2017-01-04 大族激光科技产业集团股份有限公司 A kind of processing method of pcb board
CN106852027A (en) * 2016-12-23 2017-06-13 惠州市众信天成电子发展有限公司 The processing method and pcb board of a kind of pcb board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103096631A (en) * 2013-01-08 2013-05-08 广东生益科技股份有限公司 Processing method of printed circuit board (PCB) and PCB
CN104470211A (en) * 2013-09-24 2015-03-25 深南电路有限公司 PCB machining method and PCB
CN106271096A (en) * 2015-06-09 2017-01-04 大族激光科技产业集团股份有限公司 A kind of processing method of pcb board
CN106852027A (en) * 2016-12-23 2017-06-13 惠州市众信天成电子发展有限公司 The processing method and pcb board of a kind of pcb board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115121305A (en) * 2022-07-13 2022-09-30 北京理工大学 Novel digital microfluidic chip and preparation method thereof

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Application publication date: 20181228

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