CN109041094B - Radio frequency circuit debugging method and related device - Google Patents
Radio frequency circuit debugging method and related device Download PDFInfo
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- CN109041094B CN109041094B CN201810791361.0A CN201810791361A CN109041094B CN 109041094 B CN109041094 B CN 109041094B CN 201810791361 A CN201810791361 A CN 201810791361A CN 109041094 B CN109041094 B CN 109041094B
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Abstract
The application discloses a radio frequency circuit debugging method and a related device, wherein a target transmitting link is divided into a first circuit and a second circuit; acquiring a target circuit model of a first circuit and a target circuit model of a second circuit; determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit; calling a first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit; determining the insertion loss of a target transmitting link according to a reference matching circuit of a first circuit and a reference matching circuit of a second circuit; and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the first power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver. By adopting the embodiment of the application, the simulation efficiency can be improved.
Description
Technical Field
The present application relates to the field of simulation technologies, and in particular, to a method for debugging a radio frequency circuit and a related device.
Background
The third Generation mobile communication technology (3rd-Generation, 3G) communication and the fourth Generation mobile communication technology (4 th-Generation, 4G) communication of electronic equipment (such as smart phones) are mainly divided into two communication modes, namely Frequency Division Duplex (FDD) and Time Division Duplex (TDD), wherein the FDD transmit-receive path mainly realizes the simultaneous operation of transmitting and receiving through a duplexer without interfering with each other. While TDD prevents the dominant wave from interfering with other mobile devices, primarily through a filter. The radio frequency performance of the main board needs to be estimated in the early development stage of the mobile phone, mainly the transmission power of each frequency band of each system, and the antenna needs to complete the evaluation of the OTA performance of the whole antenna based on the data and the ID. The estimation of the transmitting power is mainly completed through link budget, a device specification used in a link and a difference building model corresponding to the PCB wiring are used for calculation, the calculation result has certain errors, the matching degrees of radio frequency devices are different, the corresponding difference loss is different, the PCB wiring length is different, the corresponding difference loss of different layers is different, and once the assumption is unreasonable, the calculation result is greatly different from the true value.
Disclosure of Invention
The embodiment of the application provides a radio frequency circuit debugging method and a related device, which are used for improving simulation efficiency.
In a first aspect, an embodiment of the present application provides a radio frequency circuit debugging method, which is applied to a test device, where the test device is configured to determine a maximum transmission power of a target transmission link of a radio frequency circuit, where the target transmission link includes a radio frequency transceiver, a power amplifier, a first filter or a duplexer, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna switch, and a radio frequency test socket, and the radio frequency transceiver transmits a radio frequency signal sequentially through the power amplifier, the first filter or the duplexer, the main antenna set switch, the power coupler, the combiner, the low pass filter, the antenna switch, and the radio frequency test socket, and the method includes:
dividing the target transmitting link into a first circuit and a second circuit, wherein the first circuit comprises the power amplifier, the first filter or duplexer and the main antenna switch, and the second circuit comprises the main antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch and the radio frequency test socket;
obtaining a target circuit model of the first circuit and a target circuit model of the second circuit;
determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit;
calling a first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit;
determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit;
and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the first power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver.
In a second aspect, an embodiment of the present application provides a radio frequency circuit debugging apparatus, applied to a test device, where the test device is configured to determine a maximum transmission power of a target transmission link of a radio frequency circuit, where the target transmission link includes a radio frequency transceiver, a power amplifier, a first filter or a duplexer, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna switch, and a radio frequency test socket, and the radio frequency transceiver transmits a radio frequency signal sequentially through the power amplifier, the first filter or the duplexer, the main antenna set switch, the power coupler, the combiner, the low pass filter, the antenna switch, and the radio frequency test socket, and the apparatus includes a processing unit and a communication unit,
the processing unit is configured to divide the target transmission link into a first circuit and a second circuit, where the first circuit includes the power amplifier, the first filter or duplexer, and the antenna switch, and the second circuit includes the antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch, and the radio frequency test socket; and obtaining a target circuit model of the first circuit and a target circuit model of the second circuit; and determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit; calling a first simulation module through the communication unit to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit; and determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit; and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameter of the first power amplifier and the specification parameter of a signal transmitting port of the radio frequency transceiver.
In a third aspect, an embodiment of the present application provides a test apparatus, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the program includes instructions for executing steps in the method according to the first aspect of the embodiment of the present application.
In a fourth aspect, the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program makes a computer perform some or all of the steps described in the method according to the first aspect of the present application.
In a fifth aspect, the present application provides a computer program product, where the computer program product includes a non-transitory computer-readable storage medium storing a computer program, where the computer program is operable to cause a computer to perform some or all of the steps described in the method according to the first aspect of the present application. The computer program product may be a software installation package.
It can be seen that, in the embodiment of the present application, the test device first divides the target transmission link into the first circuit and the second circuit, then creates a target circuit model of the first circuit and a target circuit model of the second circuit, then determines a simulation parameter set of the first circuit and a simulation parameter set of the second circuit according to the target circuit model of the first circuit and the target circuit model of the second circuit, then invokes the first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, then determines an insertion loss of the target transmission link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit, and finally determines an insertion loss of the target transmission link, a specification parameter of the first power amplifier, and a specification parameter of the signal transmission port of the radio frequency transceiver, and determining the maximum transmission power of the target transmission link. Therefore, on the basis of the existing link budget model, the embodiment of the application calculates the accurate path loss by adopting a software simulation method for the part (filter, PA or duplexer, switch and wiring) which has a large influence on the link budget result, thereby accurately calculating the maximum transmission power of the transmission path, judging whether the TIS of the electronic equipment can meet the OTA (over the air) index, and only needing the PCB file parameters and the board making parameters in the whole process, thereby improving the accuracy and efficiency of calculating the maximum transmission power.
These and other aspects of the present application will be more readily apparent from the following description of the embodiments.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1a is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure;
fig. 1b is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure;
fig. 2a is a schematic flowchart of a method for debugging a radio frequency circuit according to an embodiment of the present application;
fig. 2b is a schematic structural diagram of a first two-port network model according to an embodiment of the present application;
FIG. 3 is a schematic structural diagram of a testing apparatus provided in an embodiment of the present application;
fig. 4 is a schematic structural diagram of a radio frequency circuit debugging apparatus according to an embodiment of the present application.
Detailed Description
In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The following are detailed below.
The terms "first," "second," "third," and "fourth," etc. in the description and claims of this application and in the accompanying drawings are used for distinguishing between different objects and not for describing a particular order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1a, fig. 1a is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure. As shown in fig. 1a, the radio frequency circuit supports 4G LTE FDD system, which includes a signal transceiving path of a main antenna set and a signal receiving path of a diversity antenna, the signal transceiving path of the main antenna set includes a first low noise amplifier LNA, a power amplifier PA, a duplexer, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna switch and a radio frequency test socket, wherein the radio frequency transceiver connects to the first LNA and the PA, the first LNA and the PA connect to the duplexer, the duplexer connects to the main antenna set switch, the main antenna set switch connects to the power coupler, the power coupler connects to the combiner, the combiner connects to the low pass filter, the low pass filter connects to the antenna switch, the antenna switch connects to the radio frequency test socket, the signal receiving path of the diversity antenna includes a second LNA, a filter and a diversity antenna switch, wherein the radio frequency transceiver connects to the second LNA, the second LNA is connected to the diversity antenna switch. The radio frequency transceiver transmits radio frequency signals through the first low noise amplifier, the duplexer, the main antenna switch, the power coupler, the combiner, the low pass filter, the antenna change-over switch and the radio frequency test seat in sequence.
Referring to fig. 1b, fig. 1b is a schematic structural diagram of a radio frequency circuit according to an embodiment of the present disclosure. As shown in fig. 1b, the rf circuit supports TDD mode, and includes a signal transceiving path of a main antenna set and a signal receiving path of a diversity antenna, the signal transceiving path of the main antenna set includes a first LNA, a power amplifier PA, a first filter, a second filter, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna switch and an rf test socket, wherein the rf transceiver is connected to the first LNA and the PA, the first LNA is connected to the second frequency converter, the PA is connected to the first filter, the first and the second filters are connected to the duplexer, the duplexer is connected to the main antenna set switch, the main antenna set switch is connected to the power coupler, the power coupler is connected to the combiner, the combiner is connected to the low pass filter, the low pass filter is connected to the antenna switch, the antenna switch is connected to the rf test socket, and the signal receiving path of the diversity antenna includes a second LNA, a low pass filter, a main antenna switch, a third filter and a diversity antenna switch, wherein the radio frequency transceiver is connected with a second LNA, and the second LNA is connected with the diversity antenna switch. The radio frequency transceiver transmits radio frequency signals through the first low noise amplifier, the first filter, the main antenna switch, the power coupler, the combiner, the low pass filter, the antenna change-over switch and the radio frequency test seat in sequence.
The number of antennas of the main set antenna may be one or multiple, and is not limited herein. The number of diversity antennas may be one or more, and is not limited herein.
The radio frequency signal may be a radio frequency signal in an LTE Band, for example, TDD-LTE Band38, Band39, Band40, and Band41, FDD-LTE Band1, Band3, and Band 7. The radio frequency signal may be a radio frequency signal of a 3G Band, for example, Time Division-Synchronous Code Division Multiple Access (TD-SCDMA) Band34 and Band39, Wideband Code Division Multiple Access (WCDMA) Band1, Band2, Band5, and Band 8. The radio frequency signal may be a radio frequency signal in a 2G Band, and the 2G Band includes, for example, Global System for Mobile Communication (GSM) Band2, Band3, Band5, and Band 8.
The radio frequency transceiver is a device capable of receiving and transmitting radio frequency signals.
Among them, the PA is an important component of a radio frequency signal transmitter. The power amplifier is used for amplifying the power of the radio frequency signal sent by the radio frequency signal transmitter and ensuring that the radio frequency signal can be fed to an antenna for transmission.
The duplexer is a special bidirectional three-terminal filter, is mainly applied to an FDD system, and mainly plays a role in filtering and isolating signals.
The main set antenna is an antenna capable of transmitting and receiving radio frequency signals in an antenna diversity operation mode, and serves as the main set antenna.
The main antenna switch is a switch for switching the working state of the main antenna.
The diversity antenna is an antenna that can only receive radio frequency signals in an antenna diversity operation mode.
The diversity antenna switch is a switch for controlling an operating frequency band and a receiving or transmitting state of the diversity antenna.
Total Isotropic Sensitivity (TIS): the condition of receiving sensitivity indexes of the whole radiation spherical mobile phone is reflected.
The following describes embodiments of the present application in detail.
Referring to fig. 2a, fig. 2a is a schematic flowchart of a radio frequency circuit debugging method, which is applied to a test device, where the test device is configured to determine a maximum transmission power of a target transmission link of a radio frequency circuit, where the target transmission link includes a radio frequency transceiver, a power amplifier, a first filter or duplexer, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna switch, and a radio frequency test socket, and the radio frequency transceiver transmits radio frequency signals sequentially through the power amplifier, the first filter or the duplexer, the main antenna set switch, the power coupler, the combiner, the low pass filter, the antenna switch, and the radio frequency test socket, where the radio frequency circuit debugging method includes:
step 201: the test equipment divides the target transmitting link into a first circuit and a second circuit, wherein the first circuit comprises the power amplifier, the first filter or duplexer and the main antenna switch, and the second circuit comprises the main antenna switch, the power coupler, the combiner, the low-pass filter, the antenna change-over switch and the radio frequency test socket;
the radio frequency circuit is applied to an electronic device, and the electronic device may include various handheld devices, vehicle-mounted devices, wearable devices (e.g., smartwatches, smartbands, pedometers, etc.), computing devices or other processing devices connected to a wireless modem, and various forms of User Equipment (UE), Mobile Stations (MS), terminal devices (terminal device), and so on. For convenience of description, the above-mentioned devices are collectively referred to as electronic devices.
The testing device may be, for example, a computer, a notebook, a tablet computer, an industrial computer, a mobile terminal, or the like.
Step 202: the test equipment acquires a target circuit model of the first circuit and a target circuit model of the second circuit;
the simulation software is, for example, Advanced Design System (ADS) simulation software.
Step 203: the test equipment determines a simulation parameter set of the first circuit and a simulation parameter set of the second circuit according to a target circuit model of the first circuit and a target circuit model of the second circuit;
step 204: the test equipment calls a first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit;
the reference matching circuit refers to an element value of an adjustable matching network obtained by simulation of the first simulation module under the preset constraint condition of various indexes of the first or second circuit, and the adjustable matching network is used for being fused in the corresponding circuit (the first or second circuit) so that the indexes of the circuit meet the preset constraint condition. The preset constraint condition may be that the composite score of 1 or more indexes is the highest or higher than a preset threshold, and when only 1 index is used, the index should be the higher the score is, the better the score is, and when the index is a plurality of indexes, a weight may be configured for each index, or based on other preconfigured index evaluation strategies, the index value corresponding to the highest composite score and the element value of the matching circuit are obtained by calculating the composite scores of different matching circuits in the simulation process in real time. The matching circuit specifically comprises an electronic device to be matched, wherein the electronic device to be matched comprises one of the following components: capacitance, inductance, resistance. The matching circuit is a pi-type matching circuit.
Wherein, the index comprises an S2P parameter, and the S2P parameter comprises at least one of the following parameters: s parameter, Z parameter, Y parameter and H parameter. Wherein, the S-parameters are scattering parameters, the S-parameters are used to evaluate the amplitude and phase information of the reflected signal and the transmitted signal, and the S-parameters mainly include S11, S12, S21 and S22. Wherein, S12 is used to represent the inverse isolation in transmission and is used to describe the effect of the signal at the output of the device on the input. S21 is used to indicate gain in transmission, which is an increase in load power due to the insertion of an element or device, or insertion loss, which is a loss in load power due to the insertion of an element or device. S11 is used to indicate the return loss of the input end, and can be described as the ratio of the incident power to the reflected power of the rf signal at the input end. S22 is used to indicate the return loss of the output end, and can be described as the ratio of the incident power to the reflected power of the rf signal at the output end. The Z parameter is an impedance parameter, and is used to represent the impedance in the two-port network, and the impedance parameter is related to the structure and parameter values of the two-port network and is unrelated to the external network. The impedance parameters mainly comprise Z11, Z21, Z12 and Z22. Where Z11 denotes the input impedance when the output port is open, Z12 denotes the transfer impedance when the input port is open, Z21 denotes the transfer impedance when the output port is open, and Z22 denotes the output impedance when the input port is open. The Y parameter is an admittance parameter, and is used to indicate an admittance value when a port in the two-port network is short-circuited. The impedance parameters mainly comprise Y11, Y12, Y21 and Y22. Where Y11 denotes an input admittance when the output port is short-circuited, Y12 denotes a transfer admittance when the input port is short-circuited, Y21 denotes a transfer admittance when the input port is short-circuited, and Y22 denotes an output admittance when the input port is short-circuited. The H parameter is a hybrid parameter, and is used to represent a parameter related to the current and voltage of the two-port network when the port in the port network is short-circuited. The mixing parameters mainly comprise H11, H12, H21 and H22. Where H11 denotes an input impedance when the output port is short-circuited, H12 denotes a reverse transfer voltage ratio when the input port is open-circuited, H21 denotes a forward transfer current ratio when the output port is short-circuited, and H22 denotes an output admittance when the input port is open-circuited.
Step 205: the test equipment determines the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit;
step 206: and the test equipment determines the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the first power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver.
The communication distance is related to the transmission power, the reception sensitivity and the operating frequency.
[Lfs](dB)＝32.44+20lgd(km)+20lgf(MHz)
Where Lfs is the transmission loss, d is the transmission distance, and the unit of frequency f is calculated in MHz.
From the above formula, the propagation loss (also called attenuation) of the electric wave in free space is only related to the working frequency f and the propagation distance d, and when f or d is increased by one time, [ Lfs ] will be increased by 6dB respectively. The path loss increases with the transmission distance. Wireless transmission distance calculation
Pr(dBm)＝Pt(dBm)-Ct(dB)+Gt(dB)-LFS(dB)+Gr(dB)-Cr(dB)
Wherein Pr represents the sensitivity of the receiving end, Pt represents the power of the transmitting end, Cr represents the loss of the receiving end connector and the cable, Ct represents the loss of the transmitting end connector and the cable, Gr represents the antenna gain of the receiving end, Gt represents the antenna gain of the transmitting end, LFS is the free space loss, and the relation between the transmitting power and the transmission distance can be obtained by substituting a path loss formula and determining other fixed parameters.
It can be seen that, in the embodiment of the present application, the test device first divides the target transmission link into the first circuit and the second circuit, then creates a target circuit model of the first circuit and a target circuit model of the second circuit, then determines a simulation parameter set of the first circuit and a simulation parameter set of the second circuit according to the target circuit model of the first circuit and the target circuit model of the second circuit, then invokes the first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, then determines an insertion loss of the target transmission link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit, and finally determines an insertion loss of the target transmission link, a specification parameter of the first power amplifier, and a specification parameter of the signal transmission port of the radio frequency transceiver, and determining the maximum transmission power of the target transmission link. Therefore, on the basis of the existing link budget model, the embodiment of the application calculates the accurate path loss by adopting a software simulation method for the part (filter, PA or duplexer, switch and wiring) which has a large influence on the link budget result, thereby accurately calculating the maximum transmission power of the transmission path, judging whether the TIS of the electronic equipment can meet the OTA (over the air) index, and only needing the PCB file parameters and the board making parameters in the whole process, thereby improving the accuracy and efficiency of calculating the maximum transmission power.
In one possible example, the test equipment obtaining a target circuit model of the first circuit and a target circuit model of the second circuit includes: the test equipment extracts circuit topology description information of the first circuit and circuit topology description information of the second circuit; generating a reference circuit model of the first circuit and a reference circuit model of the second circuit according to the circuit topology description information of the first circuit and the circuit topology description information of the second circuit; adding a polarized Port at a preset position of the first circuit model and the second circuit model; and setting the PCB lamination of the reference circuit model of the first circuit and the reference circuit model of the second circuit according to the production parameters of the PCB to obtain a target circuit model of the first circuit and a target circuit model of the second circuit.
The preset positions are positions of ports on two sides of the reference circuit model of the first circuit and the reference circuit model of the second circuit.
In addition, because the divided circuit port information and the lamination information are missing, the port information and the lamination information need to be reset, so that the topology information of the divided circuit is as perfect as possible, and the simulation comprehensiveness and accuracy are improved.
In one possible example, the test equipment determining the set of simulation parameters for the first circuit and the set of simulation parameters for the second circuit based on a target circuit model for the first circuit and a target circuit model for the second circuit includes: and the test equipment calls a second simulation module to simulate the target circuit model of the first circuit and the target circuit model of the second circuit to obtain a simulation parameter set of the first circuit and a simulation parameter set of the second circuit.
The simulation process of the second simulation module may specifically be ADS EM simulation.
In this example, the test equipment can convert the circuit topology information of the first and second circuits into the simulation parameter set that can be identified by the first simulation module, so that the simulation of the first and second circuits is realized, and the simulation efficiency is improved.
In one possible example, the invoking, by the testing device, a first simulation module to simulate the reference matching circuit of the first circuit according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit includes: the test equipment calls a first simulation module to create a schematic diagram, creates a first two-port network model and a second two-port network model of a target frequency band on the schematic diagram, introduces a simulation parameter set of the second circuit into the first two-port network model, simulates to obtain a reference matching circuit of the second circuit, introduces the reference matching circuit of the second circuit and the simulation parameter set of the first circuit into the second two-port network model, and simulates to obtain the reference matching circuit of the first circuit.
The processing procedure of the first simulation module is also called schematic diagram simulation. The target frequency band may be each frequency band in LTE, which is not limited herein.
The two-port network model refers to a multi-port network with the port number equal to 2, wherein one port of the two-port network is an input port and used for receiving signals or energy, and the other port of the two-port network is an output port and used for outputting signals or energy. Specifically, the first two-port network model is shown in fig. 2b, and the two-port network model includes a first port, a second port, and a device model, wherein a resistor is disposed at each of the first port and the second port, and impedance values of the resistors at the first port and the second port are equal to 50 ohms. The circuit parameter is led into the first two-port network model, namely, the simulation parameter set is used as the circuit parameter of the device model. Therefore, in the first two-port network model, under the condition that the circuit parameters of the device model are known and the impedance values of the two ports are also known, the reference matching circuit of the first or second circuit can be simulated directly through simulation software under the constraint of the preset conditions of various indexes of the first two-port network model, and the element value of the matching network can be adjusted. It should be noted that the first two-port network model is not limited to the structure shown in fig. 2b, and the structure shown in fig. 2b is only an example provided in this application.
It can be seen that, in this example, since the second circuit corresponds to a common portion of the rf circuit, and the frequency band of the portion is wide, it is necessary to simulate the second circuit first, and then simulate the first circuit of each frequency band based on the second circuit. Therefore, the accuracy and the adaptability of the simulation result can be improved.
In one possible example, before the test device divides the target transmit chain into a first circuit and a second circuit, the method further comprises: the test equipment acquires a circuit diagram file of the radio frequency circuit in an original format; and converting the circuit diagram file in the original format into a circuit diagram file in a target format, wherein the target format is a format which can be identified by the second simulation module.
Wherein, the original file of the radio frequency circuit is a PCB file, and the target format comprises ODB + +.
As can be seen, in this example, through format conversion, the original file of the radio frequency circuit can be quickly converted into a file in an ODB + + format that can be recognized by simulation software, so as to implement automatic simulation.
In one possible example, after determining the maximum transmit power of the target transmit link according to the insertion loss of the target transmit link, the specification parameter of the first power amplifier, and the specification parameter of the signal transmit port of the radio frequency transceiver, the method further includes: the test equipment welds the reference matching circuit with the first circuit and the reference matching circuit with the second circuit on the PCB for actual test to obtain a test result; and the test equipment carries out fine adjustment on the basis of the reference element value of the device of the reference matching circuit of the first and second circuits according to the test result to obtain the target element value of the device of the reference matching circuit of the first and second circuits.
Therefore, in the embodiment of the application, the test equipment is provided with the reference matching circuit and welded on the PCB for actual test to obtain a test result, and then fine tuning is carried out based on the test result, so that more accurate matching parameters can be obtained, and the accuracy of simulation is further improved.
Referring to fig. 3 in accordance with the embodiment shown in fig. 3, fig. 3 is a schematic structural diagram of a testing apparatus 300 according to an embodiment of the present application, and as shown in the figure, the testing apparatus 300 includes a processor 310, a memory 320, a communication interface 330, and one or more programs 321, the testing apparatus 300 is configured to determine a maximum transmission power of a target transmission link of a radio frequency circuit, where the target transmission link includes a radio frequency transceiver, a power amplifier, a first filter or duplexer, a main set antenna switch, a power coupler, a combiner, a low pass filter, an antenna switch, and a radio frequency test socket, and the radio frequency transceiver transmits a radio frequency signal through the power amplifier, the first filter or duplexer, the main set antenna switch, the power coupler, the combiner, the low pass filter, the antenna switch, and the radio frequency test socket in sequence, wherein the one or more programs 321 are stored in the memory 320 and configured to be executed by the processor 310, the one or more programs 321 comprising instructions for performing the following steps;
dividing the target transmitting link into a first circuit and a second circuit, wherein the first circuit comprises the power amplifier, the first filter or duplexer and the main antenna switch, and the second circuit comprises the main antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch and the radio frequency test socket;
obtaining a target circuit model of the first circuit and a target circuit model of the second circuit;
determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit;
calling a first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit;
determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit;
and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the first power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver.
It can be seen that, in the embodiment of the present application, the test device first divides the target transmission link into the first circuit and the second circuit, then creates a target circuit model of the first circuit and a target circuit model of the second circuit, then determines a simulation parameter set of the first circuit and a simulation parameter set of the second circuit according to the target circuit model of the first circuit and the target circuit model of the second circuit, then invokes the first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, then determines an insertion loss of the target transmission link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit, and finally determines an insertion loss of the target transmission link, a specification parameter of the first power amplifier, and a specification parameter of the signal transmission port of the radio frequency transceiver, and determining the maximum transmission power of the target transmission link. Therefore, on the basis of the existing link budget model, the embodiment of the application calculates the accurate path loss by adopting a software simulation method for the part (filter, PA or duplexer, switch and wiring) which has a large influence on the link budget result, thereby accurately calculating the maximum transmission power of the transmission path, judging whether the TIS of the electronic equipment can meet the OTA (over the air) index, and only needing the PCB file parameters and the board making parameters in the whole process, thereby improving the accuracy and efficiency of calculating the maximum transmission power.
In one possible example, in the obtaining the target circuit model of the first circuit and the target circuit model of the second circuit, the instructions in the program are specifically configured to: extracting circuit topology description information of the first circuit and circuit topology description information of the second circuit; generating a reference circuit model of the first circuit and a reference circuit model of the second circuit according to the circuit topology description information of the first circuit and the circuit topology description information of the second circuit; adding a polarization Port at a preset position of the first circuit model and the second circuit model; and setting the PCB lamination of the reference circuit model of the first circuit and the reference circuit model of the second circuit according to the production parameters of the PCB to obtain a target circuit model of the first circuit and a target circuit model of the second circuit.
In one possible example, in the determining the set of simulation parameters for the first circuit and the set of simulation parameters for the second circuit from the target circuit model for the first circuit and the target circuit model for the second circuit, the instructions in the program are specifically configured to: and calling a second simulation module to simulate the target circuit model of the first circuit and the target circuit model of the second circuit to obtain a simulation parameter set of the first circuit and a simulation parameter set of the second circuit.
In one possible example, in an aspect that the invoking the first simulation module simulates the reference matching circuit of the first circuit according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, the instructions in the program are specifically configured to perform the following operations: calling a first simulation module to create a schematic diagram, creating a first two-port network model and a second two-port network model of a target frequency band on the schematic diagram, importing a simulation parameter set of a second circuit into the first two-port network model, simulating to obtain a reference matching circuit of the second circuit, importing the reference matching circuit of the second circuit and the simulation parameter set of the first circuit into the second two-port network model, and simulating to obtain the reference matching circuit of the first circuit.
In one possible example, the program further includes instructions for: before the target transmitting link is divided into a first circuit and a second circuit, obtaining a circuit diagram file of the radio frequency circuit in an original format; and converting the circuit diagram file in the original format into a circuit diagram file in a target format, wherein the target format is a format which can be identified by the second simulation module.
The above description has introduced the solution of the embodiment of the present application mainly from the perspective of the method-side implementation process. It is understood that the electronic device comprises corresponding hardware structures and/or software modules for performing the respective functions in order to realize the above-mentioned functions. Those of skill in the art will readily appreciate that the present application is capable of hardware or a combination of hardware and computer software implementing the various illustrative elements and algorithm steps described in connection with the embodiments provided herein. Whether a function is performed as hardware or computer software drives hardware depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiment of the present application, the electronic device may be divided into the functional units according to the method example, for example, each functional unit may be divided corresponding to each function, or two or more functions may be integrated into one processing unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit. It should be noted that the division of the unit in the embodiment of the present application is schematic, and is only a logic function division, and there may be another division manner in actual implementation.
Fig. 4 is a block diagram of functional units of a radio frequency circuit debugging apparatus 400 according to an embodiment of the present application. The radio frequency circuit debugging device 400 is applied to a testing device, the testing device is used for determining the maximum transmitting power of a target transmitting link of a radio frequency circuit, the target transmitting link comprises a radio frequency transceiver, a power amplifier, a first filter or a duplexer, a main set antenna switch, a power coupler, a combiner, a low pass filter, an antenna change-over switch and a radio frequency testing seat, the radio frequency transceiver transmits radio frequency signals through the power amplifier, the first filter or the duplexer, the main set antenna switch, the power coupler, the combiner, the low pass filter, the antenna change-over switch and the radio frequency testing seat in sequence, the radio frequency circuit debugging device 400 comprises a processing unit 401 and a communication unit 402, wherein,
the processing unit 401 is configured to divide the target transmission link into a first circuit and a second circuit, where the first circuit includes the power amplifier, the first filter or duplexer, and the main antenna switch, and the second circuit includes the main antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch, and the radio frequency test socket; and obtaining a target circuit model of the first circuit and a target circuit model of the second circuit; and determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit; calling a first simulation module through the communication unit to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit; and determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit; and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameter of the first power amplifier and the specification parameter of a signal transmitting port of the radio frequency transceiver.
The radio frequency circuit debugging apparatus may further include a storage unit 403 for storing program codes and data of the electronic device. The processing unit 401 may be a processor, the communication unit 402 may be a touch display screen or a transceiver, and the storage unit 403 may be a memory.
It can be seen that, in the embodiment of the present application, the test device first divides the target transmission link into the first circuit and the second circuit, then creates a target circuit model of the first circuit and a target circuit model of the second circuit, then determines a simulation parameter set of the first circuit and a simulation parameter set of the second circuit according to the target circuit model of the first circuit and the target circuit model of the second circuit, then invokes the first simulation module to obtain a reference matching circuit of the first circuit and a reference matching circuit of the second circuit through simulation according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, then determines an insertion loss of the target transmission link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit, and finally determines an insertion loss of the target transmission link, a specification parameter of the first power amplifier, and a specification parameter of the signal transmission port of the radio frequency transceiver, and determining the maximum transmission power of the target transmission link. Therefore, on the basis of the existing link budget model, the embodiment of the application calculates the accurate path loss by adopting a software simulation method for the part (filter, PA or duplexer, switch and wiring) which has a large influence on the link budget result, thereby accurately calculating the maximum transmission power of the transmission path, judging whether the TIS of the electronic equipment can meet the OTA (over the air) index, and only needing the PCB file parameters and the board making parameters in the whole process, thereby improving the accuracy and efficiency of calculating the maximum transmission power.
In one possible example, in terms of the obtaining the target circuit model of the first circuit and the target circuit model of the second circuit, the processing unit 401 is specifically configured to: extracting circuit topology description information of the first circuit and circuit topology description information of the second circuit; generating a reference circuit model of the first circuit and a reference circuit model of the second circuit according to the circuit topology description information of the first circuit and the circuit topology description information of the second circuit; adding a polarization Port at a preset position of the first circuit model and the second circuit model; and setting the PCB lamination of the first circuit model and the second circuit model according to the production parameters of the PCB to obtain a target circuit model of the first circuit and a target circuit model of the second circuit.
In one possible example, in the aspect of determining the simulation parameter set of the first circuit and the simulation parameter set of the second circuit according to the target circuit model of the first circuit and the target circuit model of the second circuit, the processing unit 401 is specifically configured to: and calling a second simulation module to simulate the target circuit model of the first circuit and the target circuit model of the second circuit to obtain a simulation parameter set of the first circuit and a simulation parameter set of the second circuit.
In one possible example, in terms of the invoking the first simulation module to simulate the reference matching circuit of the first circuit according to the simulation parameter set of the first circuit and the simulation parameter set of the second circuit, the processing unit 401401 is specifically configured to: calling a first simulation module to create a schematic diagram, creating a first two-port network model and a second two-port network model of a target frequency band on the schematic diagram, importing a simulation parameter set of a second circuit into the first two-port network model, simulating to obtain a reference matching circuit of the second circuit, importing the reference matching circuit of the second circuit and the simulation parameter set of the first circuit into the second two-port network model, and simulating to obtain the reference matching circuit of the first circuit.
In one possible example, before the dividing the target transmission link into the first circuit and the second circuit, the processing unit 401 is further configured to: acquiring a circuit diagram file of the radio frequency circuit in an original format; and converting the circuit diagram file in the original format into a circuit diagram file in a target format, wherein the target format is a format which can be identified by the second simulation module.
Embodiments of the present application also provide a computer storage medium, where the computer storage medium stores a computer program for electronic data exchange, the computer program enabling a computer to execute part or all of the steps of any one of the methods described in the above method embodiments, and the computer includes an electronic device.
Embodiments of the present application also provide a computer program product comprising a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps of any of the methods as described in the above method embodiments. The computer program product may be a software installation package, the computer comprising an electronic device.
It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.
In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, the above-described division of the units is only one type of division of logical functions, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of some interfaces, devices or units, and may be an electric or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit may be stored in a computer readable memory if it is implemented in the form of a software functional unit and sold or used as a stand-alone product. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a memory, and including several instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the above-mentioned method of the embodiments of the present application. And the aforementioned memory comprises: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable memory, which may include: flash Memory disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.
The foregoing detailed description of the embodiments of the present application has been presented to illustrate the principles and implementations of the present application, and the above description of the embodiments is only provided to help understand the method and the core concept of the present application; meanwhile, for a person skilled in the art, according to the idea of the present application, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present application.
Claims (9)
1. A radio frequency circuit debugging method is applied to a test device, the test device is used for determining the maximum transmitting power of a target transmitting link of a radio frequency circuit, the target transmitting link comprises a radio frequency transceiver, a power amplifier, a first filter or a duplexer, a main antenna set switch, a power coupler, a combiner, a low-pass filter, an antenna change-over switch and a radio frequency test seat, and the radio frequency transceiver transmits radio frequency signals sequentially through the power amplifier, the first filter or the duplexer, the main antenna set switch, the power coupler, the combiner, the low-pass filter, the antenna change-over switch and the radio frequency test seat, the method comprises the following steps:
dividing the target transmitting link into a first circuit and a second circuit, wherein the first circuit comprises the power amplifier, the first filter or duplexer and the main antenna switch, and the second circuit comprises the main antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch and the radio frequency test socket;
obtaining a target circuit model of the first circuit and a target circuit model of the second circuit;
determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit;
calling a first simulation module to create a schematic diagram, creating a first two-port network model and a second two-port network model of a target frequency band on the schematic diagram, importing a simulation parameter set of the second circuit into the first two-port network model, simulating to obtain a reference matching circuit of the second circuit, importing the reference matching circuit of the second circuit and the simulation parameter set of the first circuit into the second two-port network model, and simulating to obtain the reference matching circuit of the first circuit, the reference matching circuit is an element value of an adjustable matching network obtained by the first simulation module simulating the circuit under the preset constraint condition of various indexes, the adjustable matching network is used for being fused in the circuit so that the index of the circuit meets the preset constraint condition, the preset constraint condition comprises that the comprehensive score of 1 or more indexes is highest or higher than a preset threshold value;
determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit;
and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver.
2. The method of claim 1, wherein obtaining the target circuit model of the first circuit and the target circuit model of the second circuit comprises:
extracting circuit topology description information of the first circuit and circuit topology description information of the second circuit;
generating a reference circuit model of the first circuit and a reference circuit model of the second circuit according to the circuit topology description information of the first circuit and the circuit topology description information of the second circuit;
adding a polarized Port at a preset position of the first circuit model and the second circuit model;
and setting the PCB lamination of the reference circuit model of the first circuit and the reference circuit model of the second circuit according to the production parameters of the PCB to obtain a target circuit model of the first circuit and a target circuit model of the second circuit.
3. The method of claim 1 or 2, wherein determining the set of simulation parameters for the first circuit and the set of simulation parameters for the second circuit from the target circuit model for the first circuit and the target circuit model for the second circuit comprises:
and calling a second simulation module to simulate the target circuit model of the first circuit and the target circuit model of the second circuit to obtain a simulation parameter set of the first circuit and a simulation parameter set of the second circuit.
4. The method of claim 3, wherein prior to said partitioning the target transmit chain into a first circuit and a second circuit, the method further comprises:
acquiring a circuit diagram file of the radio frequency circuit in an original format;
and converting the circuit diagram file in the original format into a circuit diagram file in a target format, wherein the target format is a format which can be identified by the second simulation module.
5. A radio frequency circuit debugging device is applied to a test device, the test device is used for determining the maximum transmitting power of a target transmitting link of a radio frequency circuit, the target transmitting link comprises a radio frequency transceiver, a power amplifier, a first filter or a duplexer, a main antenna set switch, a power coupler, a combiner, a low pass filter, an antenna change-over switch and a radio frequency test seat, the radio frequency transceiver transmits radio frequency signals through the power amplifier, the first filter or the duplexer, the main antenna set switch, the power coupler, the combiner, the low pass filter, the antenna change-over switch and the radio frequency test seat in turn, the device comprises a processing unit and a communication unit, wherein,
the processing unit is configured to divide the target transmission link into a first circuit and a second circuit, where the first circuit includes the power amplifier, the first filter or duplexer, and the antenna switch, and the second circuit includes the antenna switch, the power coupler, the combiner, the low-pass filter, the antenna switch, and the radio frequency test socket; and obtaining a target circuit model of the first circuit and a target circuit model of the second circuit; and determining a set of simulation parameters for the first circuit and a set of simulation parameters for the second circuit based on the target circuit model for the first circuit and the target circuit model for the second circuit; calling a first simulation module to create a schematic diagram, creating a first two-port network model and a second two-port network model of a target frequency band on the schematic diagram, introducing a simulation parameter set of the second circuit into the first two-port network model, simulating to obtain a reference matching circuit of the second circuit, introducing the reference matching circuit of the second circuit and the simulation parameter set of the first circuit into the second two-port network model, and simulating to obtain the reference matching circuit of the first circuit, the reference matching circuit is an element value of an adjustable matching network obtained by the first simulation module simulating the circuit under the preset constraint condition of various indexes, the adjustable matching network is used for being fused in the circuit so that the index of the circuit meets the preset constraint condition, the preset constraint condition comprises that the comprehensive score of 1 or more indexes is highest or higher than a preset threshold value; and determining the insertion loss of the target transmitting link according to the reference matching circuit of the first circuit and the reference matching circuit of the second circuit; and determining the maximum transmitting power of the target transmitting link according to the insertion loss of the target transmitting link, the specification parameters of the power amplifier and the specification parameters of a signal transmitting port of the radio frequency transceiver.
6. The apparatus of claim 5, wherein in connection with the obtaining the target circuit model for the first circuit and the target circuit model for the second circuit, the processing unit is specifically configured to: extracting circuit topology description information of the first circuit and circuit topology description information of the second circuit; generating a reference circuit model of the first circuit and a reference circuit model of the second circuit according to the circuit topology description information of the first circuit and the circuit topology description information of the second circuit; adding a polarization Port at a preset position of the first circuit model and the second circuit model; and setting the PCB lamination of the first circuit model and the second circuit model according to the production parameters of the PCB to obtain a target circuit model of the first circuit and a target circuit model of the second circuit.
7. The apparatus of claim 5 or 6, wherein, in said determining the set of simulation parameters for the first circuit and the set of simulation parameters for the second circuit from the target circuit model for the first circuit and the target circuit model for the second circuit, the processing unit is specifically configured to: and calling a second simulation module to simulate the target circuit model of the first circuit and the target circuit model of the second circuit to obtain a simulation parameter set of the first circuit and a simulation parameter set of the second circuit.
8. A test device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the programs comprising instructions for performing the steps in the method of any of claims 1-4.
9. A computer-readable storage medium, characterized in that a computer program for electronic data exchange is stored, wherein the computer program causes a computer to perform the method according to any one of claims 1-4.
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