CN109039487A - Device built in self testing system is selected in a kind of shortwave prognosis - Google Patents
Device built in self testing system is selected in a kind of shortwave prognosis Download PDFInfo
- Publication number
- CN109039487A CN109039487A CN201811052332.9A CN201811052332A CN109039487A CN 109039487 A CN109039487 A CN 109039487A CN 201811052332 A CN201811052332 A CN 201811052332A CN 109039487 A CN109039487 A CN 109039487A
- Authority
- CN
- China
- Prior art keywords
- circuit
- self
- electrically connected
- conversion circuit
- output end
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000012360 testing method Methods 0.000 title claims abstract description 114
- 238000004393 prognosis Methods 0.000 title claims abstract description 35
- 238000006243 chemical reaction Methods 0.000 claims abstract description 98
- 238000007493 shaping process Methods 0.000 claims abstract description 9
- 230000005611 electricity Effects 0.000 claims description 18
- 239000003990 capacitor Substances 0.000 claims description 16
- 230000009467 reduction Effects 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 4
- 230000008859 change Effects 0.000 claims description 2
- 238000009434 installation Methods 0.000 claims description 2
- 238000013461 design Methods 0.000 abstract description 8
- 238000005265 energy consumption Methods 0.000 abstract description 3
- 238000002955 isolation Methods 0.000 description 9
- 238000001514 detection method Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 238000004891 communication Methods 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000004458 analytical method Methods 0.000 description 3
- 238000007689 inspection Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000006837 decompression Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000011056 performance test Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012372 quality testing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/10—Monitoring; Testing of transmitters
- H04B17/15—Performance testing
- H04B17/19—Self-testing arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/713—Spread spectrum techniques using frequency hopping
- H04B1/7136—Arrangements for generation of hop frequencies, e.g. using a bank of frequency sources, using continuous tuning or using a transform
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/29—Performance testing
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/04—Metal casings
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Monitoring And Testing Of Transmission In General (AREA)
Abstract
The present invention relates to a kind of shortwave prognosis to select device built in self testing system, be electrically connected including FPGA control circuit and with the FPGA control circuit it is pre-/after select device filter circuit；The FPGA control circuit is electrically connected by control interface with external short-wave radio set main control unit；It is characterized by: the self-checking system further includes self-test signal shaping circuit, conversion circuit and self-test signal the test circuit being electrically connected with the FPGA control circuit.Shortwave of the present invention is pre-/after select device built in self testing system structure design simple, rationally, it is small in size, at low cost, speed is fast, high reliablity, frequency hopping speed is fast, low in energy consumption, and noise is small, frequency selectivity is good, stable and reliable in work, can effectively improve the technical indicator and Electromagnetic Compatibility of short-wave radio set.
Description
Technical field
The invention belongs to automatic control, quality testing, isolation technology, frequency hopping and spread spectrums in modern short wave communication system
Field more particularly to a kind of shortwave be pre-/after select device built in self testing system.
Background technique
Current electromagnetic signal is increasingly intensive, complicated, requires the interference rejection of communication countermeasure equipment higher and higher.Shortwave
Communication countermeasure equipment of the frequency hopping radio set as a new generation, has stronger anti-interference, ability of anti-interception, makes it in modern electronics
Huge superiority is shown in war.Shortwave is pre-/after select device aiming at the key component of communication countermeasure equipment development of new generation.Its
In: preselector is placed in radio station receiver front end, filters out the garbage signal other than working band, improves its signal-to-noise ratio；After select device to set
In sender power-amplifier front-end, the harmonic wave other than working band is filtered out, reduces its radiation interference.Pre-/rear choosing of the shortwave
The important component of device is digital tuning bounce frequency filter.And contain 136 resonance in the digital tuning bounce frequency filter
Circuit constitutes 750 filter channels, and the quality of each path filter is directly related to the quality of communication, in product design
Middle increase self-checking circuit, can find the problem in time, debug.Therefore, it has a very important significance.
All the time, vector network analyzer is depended on to the test of filter.It can using vector network analyzer
The all technical of filter accurately being tested out, but it is expensive, bulky, carrying is very inconvenient, in particular for
Filter is opened into measurement from link down, it is impossible to be used in real-time fault detection is carried out to filter.
Summary of the invention
For the problems in above-mentioned background technology, the invention proposes a kind of structures to design simply, rationally, has event in real time
Hinder detectability, it is small in size, at low cost, speed is fast, strong antijamming capability, can effectively realize to it is pre-/after select each channel performance of device
Quick inspection and accurate analysis, select device built in self testing system for locking the shortwave prognosis that faulty channel is of great significance in time
System.
Technical scheme is as follows:
Device built in self testing system is selected in above-mentioned shortwave prognosis, including FPGA control circuit and with the FPGA control circuit electricity
Connection it is pre-/after select device filter circuit；The FPGA control circuit passes through control interface and external short-wave radio set main control unit
Electrical connection；The self-checking system further includes self-test signal shaping circuit, the conversion circuit being electrically connected with the FPGA control circuit
And self-test signal tests circuit；
The self-test signal shaping circuit includes reduction voltage circuit, emitter follower and Π type network；The input of the reduction voltage circuit
End is electrically connected the output end of the FPGA control circuit, and the output end of the reduction voltage circuit is electrically connected the input of the emitter follower
End；The output end of the emitter follower is electrically connected the input terminal of the Π type network, and the output end of the Π type network is electrically connected institute
State conversion circuit；
The conversion circuit includes identical first conversion circuit of structure and the second conversion circuit；First conversion circuit
The FPGA control circuit is electrically connected with the second conversion circuit；First conversion circuit is also electrically connected the Π type net
The output end of network, the rf inputs of preselector and it is described it is pre-/after select the input terminal of device filter circuit；Second conversion circuit
Also be electrically connected it is described it is pre-/after select the output end of device filter circuit, the RF output end of preselector and the self-test signal to survey
Try circuit；
The self-test signal test circuit includes RF logarithmic detector and voltage comparator；The RF logarithmic detector it is defeated
Enter end and be electrically connected second conversion circuit, the output end of the RF logarithmic detector is electrically connected the input of the voltage comparator
End；The output end of the voltage comparator is electrically connected the FPGA control circuit.
Device built in self testing system is selected in the shortwave prognosis, in which: the FPGA control circuit is received by the short-wave radio set
Main control unit send serial data command simultaneously be converted into 13 parallel-by-bits control code instruction, respectively by 10 bit frequency control codes Lai
Control it is described it is pre-/after select device filter circuit, controlled by 3 control codes it is pre-/after select device self-checking function, preselector and after select between device
Conversion, with realize to different frequency point carrier signal transmission and the carrier frequency of useful signal is switched over rapidly, reality
Existing self-checking function；The FPGA control circuit is XC3S200A circuit, will after the Serial Control order for receiving control device
Serial data command is converted into 13 parallel-by-bit code P0~P9, K1~K3, and wherein P0~P9 is frequency control code, and K1~K3 is transmitting-receiving
With self-test control code.
Device built in self testing system is selected in the shortwave prognosis, in which: first conversion circuit and the second conversion circuit are by institute
State control terminal K2, the K3 control of FPGA control circuit；First conversion circuit is electrically connected the Π type network by No. 8 pins
Output end, the rf inputs of preselector are electrically connected by No. 5 pins, passes through No. 2 pins and is electrically connected the FPGA control electricity
The control terminal K2 on road is electrically connected the control terminal K3 of the FPGA control circuit by No. 4 pins, is electrically connected institute by No. 3 pins
State it is pre-/after select the input terminal of device filter circuit；Second conversion circuit by No. 3 pins be electrically connected it is described it is pre-/after select device to filter
The output end of wave circuit is electrically connected the RF output end of preselector by No. 5 pins, is electrically connected the FPGA by No. 2 pins
The control terminal K2 of control circuit is electrically connected the control terminal K3 of the FPGA control circuit by No. 4 pins, passes through No. 8 pin electricity
Connect the input terminal of the RF logarithmic detector.
Device built in self testing system is selected in the shortwave prognosis, in which: it is described it is pre-/after select device filter circuit to be controlled by the FPGA
Control code P0~P9, the K1 of circuit are controlled；The FPGA control circuit by K1 control terminal control it is described it is pre-/after select device filtered electrical
The preselector on road receives the selection that device hair channel is selected in channel with after, i.e., when the control terminal K1 of the FPGA control circuit is high level
When, preselector filter circuit connect, when the control terminal K1 of the FPGA control circuit be low level when, after select device filter circuit to connect
It is logical.
Device built in self testing system is selected in the shortwave prognosis, in which: it is described it is pre-/after select device filter circuit include digital tuning jump
Frequency filter, the first transmitting-receiving conversion circuit, the second transmitting-receiving conversion circuit and amplifying circuit；Preselector selects device to share the number with after
Word tuning frequency hopping filter；The frequency hopping speed of the digital tuning bounce frequency filter≤1000 μ s, the self-checking time is about
1.2s, signal input part connect the output end of the first transmitting-receiving conversion circuit；The letter of the digital tuning bounce frequency filter
Number output end connects the input terminal of the second transmitting-receiving conversion circuit；Described in the output end connection of the second transmitting-receiving conversion circuit
The input terminal of No. 3 pins of the second conversion circuit, the first transmitting-receiving conversion circuit connects the output end of the amplifying circuit, institute
The input terminal for stating amplifying circuit connects No. 3 pins of first conversion circuit.
Device built in self testing system is selected in the shortwave prognosis, in which: the first transmitting-receiving conversion circuit and the second transmitting-receiving conversion
Circuit is SPDT RF switch；The digital tuning bounce frequency filter includes 136 resonance circuits, constitutes 750 filters
Wave device.
Device built in self testing system is selected in the shortwave prognosis, in which: described in the input terminal electrical connection of the RF logarithmic detector
No. 8 pins of the second conversion circuit；The output end of the voltage comparator is electrically connected the control terminal K4 of the FPGA control circuit；
The RF logarithmic detector is connected with resistance R1~R3 and is formed by wave detector AD8318, capacitor C1~C2, the voltage comparator
It is made of operational amplifier MAX4122, capacitor C3 and resistance R4~R6 connection, the resistance R5 is adjustable resistance；The capacitor
The one end C1 connects No. 8 pins of second conversion circuit, and the other end connects the pin INHI of the wave detector AD8318；It is described
The one end capacitor C2 connects the resistance R1 and connects No. 8 pins of second conversion circuit, the electricity by the resistance R1
Hold the pin INLO that the C2 other end connects the wave detector AD8318；The one end the resistance R2 connects the wave detector AD8318's
Pin VSET, the other end connect the resistance R3 and connect the reverse phase of the operational amplifier MAX4122 by the resistance R3
Input terminal；The pin VOUT of the wave detector AD8318 is connected to the tie point of the resistance R2 and resistance R3；The capacitor C3
One end ground connection, the other end connect the inverting input terminal of the operational amplifier MAX4122；The one end resistance R4 connection power supply+
VCC, the other end connect the resistance R5 and are grounded by the resistance R5；The positive of the operational amplifier MAX4122 inputs
End is connected to the tie point of the resistance R4 and resistance R5；The one end the resistance R6 connects the operational amplifier MAX4122's
Output end, the other end connect the control terminal K4 of the FPGA control circuit.
Device built in self testing system is selected in the shortwave prognosis, in which: first conversion circuit and the second conversion circuit are adopted
With SPDT RF switch.
Device built in self testing system is selected in the shortwave prognosis, in which: shown self-checking system and shortwave be pre-/after select device to be installed as one
Body is simultaneously mounted in the shell of metal thermal conductive material together.
The utility model has the advantages that
Shortwave prognosis of the present invention selects device built in self testing system structure design simple, rationally, small in size, at low cost, speed is fast,
High reliablity, frequency selectivity is good, stable and reliable in work, can effectively improve the technical indicator and electromagnetic compatibility energy of short-wave radio set
Power；Frequency hopping speed is fast, that is, uses digital tuning bounce frequency filter, frequency hopping speed≤1000 μ s, self-checking time about 1.2s；
Low in energy consumption, three wave band bounce frequency filters are not powered simultaneously, it may be assumed that are powered when gating work, can be reduced product power consumption and reduce each
Signal interference between wave band；Noise is small, and using the system clock of FPGA control circuit, hardware is simple, without crystal oscillator electricity
Road, on it is pre-/after to select device noise floor to influence small.
The present invention is based on the self-checking circuits that the technologies such as XC3S200A circuit and wave detector AD8318 are built；It is controlled first by FPGA
The FPGA PLL module of circuit processed generates the group of frequencies that can cover all resonance circuits as self-test signal, then will by advance/
Whether the self-test signal of device is selected to be sent into RF logarithmic detector afterwards examines its gain up to standard；The experimental results showed that the present invention can be effective
Realize to it is pre-/after select the quick inspection of each channel performance of device and accurate analysis, there is important meaning for locking faulty channel in time
Justice.
The present invention can accurately to it is pre-/after select each channel performance of device to carry out quick self-checking, for other filter class devices
Insertion loss or gain measurement it is equally applicable, in production using computer and software realization to it is pre-/after select device performance
Test, therefore, have very strong practical value；Conversion circuit of the invention uses high-isolation SPDT switch, radiofrequency signal
The multinomial technology such as switched design skill, so that the faint carrier wave for leaking into other channels improves the isolation of interchannel to ground,
It can achieve 60dB or more.
The present invention sends serial data command to FPGA control circuit, FPGA control according to external short-wave radio set main control unit
Circuit conversion processed controls 750 radio frequency filter circuits by 10 bit frequency control codes respectively, is controlled by 3 at 13 parallel-by-bit code instructions
Code processed control transmitting-receiving and the conversion of self-test radio-frequency channel, first is that realize the transmission to different frequency point carrier signal, and rapidly to having
It is switched over the carrier frequency of signal, improves short-wave radio set anti-interference ability；Second is that realizing self-checking function, have real-time
Fault-detecting ability.
The present invention and former shortwave be pre-/after select device installation to be integrated and together in the shell of metal thermal conductive material, with original
Shortwave is pre-/after select device equally there is good ground connection and heating conduction, and effectively reduce the electromagnetism between internal electronic element
The ability of interference.
Detailed description of the invention
Fig. 1 is the self-test scheme schematic diagram that device built in self testing system is selected in shortwave prognosis of the present invention；
Fig. 2 is the self-checking circuit functional-block diagram that device built in self testing system is selected in shortwave prognosis of the present invention；
Fig. 3 be shortwave prognosis of the present invention select device built in self testing system it is pre-/after select the functional-block diagram of device filter circuit；
Fig. 4 is the circuit diagram for the self-test signal test circuit that device built in self testing system is selected in shortwave prognosis of the present invention.
Specific embodiment
As shown in Figures 1 to 4, device built in self testing system is selected in shortwave prognosis of the present invention, with former shortwave it is pre-/after select device to be installed as one
Body and mounted in metal thermal conductive material shell in；Shortwave prognosis of the present invention select device built in self testing system include FPGA control circuit 1,
Self-test signal shaping circuit 2, conversion circuit 3, it is pre-/after select device filter circuit 4 and self-test signal to test circuit 5.
The FPGA control circuit 1 is electrically connected by control interface with external short-wave radio set main control unit, FPGA control
Circuit 1 is also electric with self-test signal shaping circuit 2, conversion circuit 3, preselector filter circuit 4 and self-test signal test circuit 5 respectively
Connection.
The FPGA control circuit 1 is used to receive, sends data command and generate the clock of self-test, it may be assumed that 1. FPGA is controlled
FPGA PLL module in circuit 1 generates the clock signal group that can cover all resonance circuits as self-test signal；2. receiving certainly
Examine result and loopback radio station main control unit；3. according to short-wave radio set main control unit send serial data command, output by
The parallel control code of low and high level composition, control is pre-/after select device or self-test work preselector work or after select device to work, and
Echo back data instruction.When FPGA PLL module in the FPGA control circuit 1 is sequentially generated the self-test comprising all resonance circuits
Clock signal, and self-test is received as a result, finally sending radio station main control unit back to by FPGA control circuit 1.The FPGA PLL module produces
Raw self-test clock signal group, each component in covering product, to guarantee all resonance circuits at least in working condition 1
It is secondary.
The FPGA control circuit 1 receives the serial data command sent by short-wave radio set main control unit and is converted into 13
Parallel control code instruction, controlled respectively by 10 bit frequency control codes it is pre-/after select device filter circuit 4, controlled by 3 control codes
Prognosis select device self-checking function (control code is K1, K2 and K3, according to instruction determine it is pre-/after select the device to be in self-test working condition, pre-selection
Device working condition or after select device working condition, a work status, another two state does not work), preselector and after select between device
Conversion, with realize to different frequency point carrier signal transmission and the carrier frequency of useful signal is switched over rapidly, with
And realize self-checking function, short-wave radio set anti-interference ability was not only improved, but also there is real-time fault detection ability.FPGA control electricity
Road 1 is that serial data command is converted into 13 after the Serial Control order for receiving radio station main control unit by XC3S200A circuit
Parallel-by-bit code P0~P9, K1~K3, wherein P0~P9 is frequency control code, and K1~K3 is transmitting-receiving and self-test control code.
The self-test of the FPGA control circuit 1, the control planning for receiving and dispatching control code see the table below 1:
The FPGA control circuit 1 by the control of K1 control terminal it is pre-/after select receipts (preselector) channel and the hair of device filter circuit 4
The selection in (selecting device afterwards) channel.
The self-test signal shaping circuit 2 includes reduction voltage circuit 21, emitter follower 22 and Π type network 23；Wherein, decompression electricity
FPGA PLL module output end in the input terminal electrical connection FPGA control circuit 1 on road 21, the output end electricity of the reduction voltage circuit 21
Connect the input terminal of emitter follower 22；The input terminal of the output end electrical connection Π type network 23 of the emitter follower 22, the Π type network 23
Output end be electrically connected conversion circuit 3.
The conversion circuit 3 is using the SPDT RF switch with high-isolation comprising the identical first conversion electricity of structure
Road 31 and the second conversion circuit 32；First conversion circuit 31 and the second conversion circuit 32 are electrically connected the FPGA control circuit 1
And it is controlled by control terminal K2, K3 of the FPGA control circuit 1.First conversion circuit 31 is electrically connected the self-test by No. 8 pins
The output end of the Π type network 23 of signal transformation circuit 2 is electrically connected the rf inputs of preselector by No. 5 pins, passes through No. 2
Pin and No. 4 pins are electrically connected the FPGA control circuit 1, be electrically connected that this is pre- by No. 3 pins/after select the defeated of device filter circuit 4
Enter end.Second conversion circuit 32 is electrically connected that this is pre- by No. 3 pins/after select the output end of device filter circuit 4, drawn by No. 5
Foot is electrically connected the RF output end of preselector, is electrically connected the FPGA control circuit 1 by No. 2 pins and No. 4 pins, passes through No. 8
Pin is electrically connected self-test signal and tests circuit 5.First conversion circuit 31 and the second conversion circuit 32 include three kinds of working methods:
1. the control terminal K1 in the FPGA control circuit 1 is high level, the control terminal K2 and K3 of the FPGA control circuit 1 are low level
When, shortwave of the present invention is pre-/after select device built in self testing system to work, preselector filtering channel is in the conductive state, but preselector enters
Exit port is disconnected and is grounded, and is made to leak into preselector and is entered the small-signal of exit port to ground, to improve interchannel isolation index；
2. the control terminal K1 and K2 in the FPGA control circuit 1 are high level, the control terminal K3 of the FPGA control circuit 1 is low level
When, preselector circuit work, and disconnects and be grounded from check-in exit port, make to leak into Zi check in the small-signal of exit port to
Ground, to improve interchannel isolation index；3. being low level, FPGA control electricity in the control terminal K1 of the FPGA control circuit 1
When the control terminal K2 and K3 on road 1 are high level, the exit port that enters of preselector and self-test is disconnected and is grounded, and makes to leak into preselector
Ground is arrived with the small-signal for entering exit port of self-test, to improve interchannel isolation index.
As shown in figure 3, this is pre-/after select the device filter circuit 4 to include the transmitting-receiving conversion electricity of digital tuning bounce frequency filter 41, first
Receive and dispatch conversion circuit 43 and amplifying circuit 44 in road 42, second；The frequency hopping speed of the digital tuning bounce frequency filter 41≤1000 μ s,
Self-checking time about 1.2s, the output end of signal input part connection the first transmitting-receiving conversion circuit 42, the digital tuning are jumped
Frequency filter 41 signal output end connection second transmitting-receiving conversion circuit 43 input terminal, this second transmitting-receiving conversion circuit 43 it is defeated
Outlet connects No. 3 pins of the second conversion circuit 32 of conversion circuit 3, and the input terminal connection of the first transmitting-receiving conversion circuit 42 is put
The output end of big circuit 44, No. 3 pins of the first conversion circuit 31 of the input terminal connection conversion circuit 3 of the amplifying circuit 44.
Wherein, preselector and after select device filter circuit be it is shared, i.e., preselector with after select device common numbers tuning frequency hopping
Filter 41, the first transmitting-receiving conversion circuit 42 and the second transmitting-receiving conversion circuit 43 are SPDT (referring to single-pole double throw) RF switch,
Having detected after preselector filter circuit is equivalent to selects device filter circuit to also detect that, thus the shortwave with self-test it is pre-/after select in device
After select device filter circuit to be not set forth in detail herein；The digital tuning bounce frequency filter 41 includes 136 resonance circuits, is constituted
750 filters.This is pre-/after select device filter circuit 4 to be controlled by control code P0~P9, the K1 of the FPGA control circuit 1, wherein
When the control terminal K1 of FPGA control circuit 1 is high level, preselector filter circuit is connected；When the control of FPGA control circuit 1
Hold K1 be low level when, after select device filter circuit connect.
41 control principle of digital tuning bounce frequency filter, P8 and P9 are waveband selection control code, shortwave is pre-/after select device work
Working frequency range is 1.6MHz to 30MHz, point three wave bands；Address P0~P7 is 8 parallel-by-bit binary codes, it may be assumed that is adjusted in wave band
Humorous control code；Full 0 corresponds to this wave band least significant end frequency, and FAH corresponds to this wave band most significant end frequency；Address code calculates in wave band:
f0: centre frequency to be tuned；
flow: this frequency band least significant end frequency；
fhigh: this frequency band most significant end frequency.
Thus analysis meter calculates the group of frequencies that can cover all resonance circuits, obtains least common multiple, selects base appropriate
Frequently, i.e. FPGA external clock crystal oscillator frequency；The characteristics of further according to FPGA PLL module integer frequency, even frequency division, extrapolate institute
There is self-test frequency.
Wherein, the method for generating self-test frequency signal is the system clock using FPGA control circuit 1, the advantages of this method
That hardware is simple, without crystal-oscillator circuit, on it is pre-/after to select device noise floor to influence small.
Self-test signal test circuit 5 is used to radiofrequency signal being converted into the identifiable digital signal of FPGA control circuit 1,
It includes RF logarithmic detector 51 and voltage comparator 52.Wherein, the input terminal of the RF logarithmic detector 51 is electrically connected the conversion
No. 8 pins of the second conversion circuit 32 of circuit 3, output end are electrically connected the input terminal of voltage comparator 52；The voltage comparator
52 output end is electrically connected the control terminal K4 of the FPGA control circuit 1.
As shown in figure 4, the RF logarithmic detector 51 connects group with resistance R1~R3 by wave detector AD8318, capacitor C1~C2
At the voltage comparator 52 is made of operational amplifier MAX4122, capacitor C3 and resistance R4~R6 connection, and resistance R5 is can
Adjust resistance.The one end capacitor C1 (by it is pre-/after select the RF self-test signal of device filter circuit 4 to input) connect the conversion circuit 3
No. 8 pins of the second conversion circuit 32, the pin INHI of other end tie geophone AD8318；The one end capacitor C2 connects resistance
R1 and by resistance R1 connection (by advance/after select the RF self-test signal of device filter circuit 4 to input) second turn of the conversion circuit 3
Change No. 8 pins of circuit 32, the pin INLO of other end tie geophone AD8318；The one end resistance R2 tie geophone
The pin VSET of AD8318, the other end connect resistance R3 and pass through the operational amplifier of resistance R3 connection voltage comparator 52
The inverting input terminal (self-test signal output) of MAX4122；The pin VOUT of wave detector AD8318 is connected to resistance R2 and electricity
Hinder the tie point of R3；The one end capacitor C3 ground connection, the other end connect the inverting input terminal of operational amplifier MAX4122；The resistance
The one end R4 connects power supply+VCC, and other end connection resistance R5 is simultaneously grounded by resistance R5；The positive of operational amplifier MAX4122
Input terminal is connected to the tie point of resistance R4 Yu resistance R5；The output of the one end resistance R6 connection operational amplifier MAX4122
End, the other end (self-test voltage output) connect the control terminal K4 of the FPGA control circuit 1.
52 reference voltage of voltage comparator is fixed, but can be adjusted according to the actual situation；The RF logarithmic detector 51 is by RF
Self-test input signal is accurately converted to corresponding dB scale output voltage, then the voltage is sent to voltage comparator 52 and is fixed
Reference voltage is compared, and is compared by the size of two input terminal voltages, a DC voltage is exported, only when the direct current of output
When voltage is high level, it is pre-/after select device working properly, otherwise in advance/after select device there are failures.
Wherein, shortwave prognosis of the present invention selects the automatic test of device built in self testing system to be mainly programmed to by FPGA,
Specific testing process are as follows: the FPGA PLL module of the FPGA control circuit 1 generates first self-test clock signal, through signal shaping
Circuit, by it is pre-/after select device filter circuit 4, RF logarithmic detector 51 and voltage comparator 52, first testing result is sent back to
FPGA control circuit 1 completes first frequency signal detection；Later, FPGA control circuit 1 sends out second self-test clock letter again
Number, testing result sends FPGA control circuit 1 back to again, second detection is completed, and so on, until completing all frequencies preset
Signal detection finally will test the processing of result power transmission platform main control unit, and show on the radio station display panel of radio station main control unit
Show result；FPGA control circuit 1 can quote tool to short-wave radio set by transmitted frequency and the report received event level signal
Body is in which frequency or certain frequency band or other faults.
Meanwhile shortwave prognosis of the present invention selects device built in self testing system under self-test operating mode, by the FPGA control circuit 1
FPGA PLL module generate and can cover the clock signals of all resonance circuits, successively pass through after shaped circuit in advance/after select device
Filter circuit 4 is then fed into RF logarithmic detector 51, and radiofrequency signal (gain) is converted into voltage value, is compared using voltage
Device 52 exports DC voltage high level (indicating working properly) or low level (indicating that work is abnormal), this output result
Directly send FPGA control circuit 1 back to, FPGA control circuit 1 is recycled to radio station main control unit again, radio station main control unit according to
Sent self-test signal and self-checking return result, determine it is pre-/after select device with the presence or absence of failure and failure-frequency range and
Radio station display panel display window shows result；Preselector or after select device operating mode under, in short-wave radio set carrier frequency pass through
Cross it is pre-/after select device filter circuit 4 to inhibit garbage signal, useful signal transmission, and can be rapidly to the carrier frequency of useful signal
It switches over；Radio station main control unit according to the data command of 1 loopback of FPGA control circuit, determine it is pre-/after select the device to be to receive just
Often or mistake is received, so far completes a complete modem and control handshake procedure.
The course of work of the self-test of device built in self testing system is selected in shortwave prognosis of the present invention are as follows:
FPGA PLL module output end in the FPGA control circuit 1 connects 21 input terminal of reduction voltage circuit, the reduction voltage circuit
The input terminal of 21 output termination emitter followers 22, the input terminal of the output termination Π type network 23 of emitter follower 22, the Π type network 23
Output the first conversion circuit 31 of termination No. 8 pins, No. 3 pins connection of the first conversion circuit 31 is pre-/after select device filtered electrical
The input terminal on road 4, this is pre-/after select the output end of device filter circuit 4 to connect No. 3 pins of the second conversion circuit 32, the second conversion
The output end connection voltage of the input terminal of No. 8 pins connection RF logarithmic detector 51 of circuit 32, RF logarithmic detector 51 compares
The input terminal of device 52, the output of the voltage comparator 52 terminate the control terminal K4 of the FPGA control circuit 1, so far complete one certainly
Examine the output and test job of signal.Later, the FPGA PLL module in FPGA control circuit 1 sends out second self-test clock again
Signal, testing result send FPGA circuitry back to again, complete second self-test signal detection, and so on, until completing the institute preset
There is frequency signal detection, finally will test the processing of result power transmission platform main control unit, the radio station display panel of main control unit in radio station
Upper display is as a result, so far complete entire self-test work.Shortwave of the present invention is pre-/after select device built in self testing system advanced after powering
Row self-test, self-checking time take around 1.2s.
Shortwave prognosis of the present invention select device built in self testing system and former shortwave it is pre-/after select device to be the integrated design, be mounted in metal
In the shell of Heat Conduction Material, with former shortwave it is pre-/after select as device there is good ground connection and heating conduction, and in effectively reducing
The ability of electromagnetic interference between portion's electronic component.
Wherein, divided according to the circuit of short-wave radio set, shortwave is pre-/after select the circuit of device and radio station governor circuit is shortwave electricity
Two circuit units in platform, radio station governor circuit and shortwave be pre-/after select device not in a unit, so not numbering.
Shortwave prognosis of the present invention selects device built in self testing system structure design simple, rationally, small in size, at low cost, speed is fast,
Can effectively realize to it is pre-/after select the quick inspection of each channel performance of device and accurately analyze, have for locking faulty channel in time
Significance, wherein conversion circuit is made using multinomial technologies such as SPDT switch, the radiofrequency signal switched design skills of high-isolation
The faint carrier wave in other channels must be leaked into ground, improve the isolation of interchannel, by test and used, the present invention is reliable
Property it is high, frequency hopping speed is fast, and low in energy consumption, noise is small, and frequency selectivity is good, stable and reliable in work, can effectively improve short-wave radio set
Technical indicator and Electromagnetic Compatibility.
Claims (9)
1. device built in self testing system is selected in a kind of shortwave prognosis, including FPGA control circuit and it is electrically connected with the FPGA control circuit
It is pre-/after select device filter circuit；The FPGA control circuit is electrically connected by control interface and external short-wave radio set main control unit
It connects；It is characterized by: the self-checking system further includes the self-test signal shaping circuit being electrically connected with the FPGA control circuit, turns
Change circuit and self-test signal test circuit；
The self-test signal shaping circuit includes reduction voltage circuit, emitter follower and Π type network；The input terminal electricity of the reduction voltage circuit
The output end of the FPGA control circuit is connected, the output end of the reduction voltage circuit is electrically connected the input terminal of the emitter follower；Institute
The output end for stating emitter follower is electrically connected the input terminal of the Π type network, and the output end of the Π type network is electrically connected the conversion
Circuit；
The conversion circuit includes identical first conversion circuit of structure and the second conversion circuit；First conversion circuit and
Two conversion circuits are electrically connected the FPGA control circuit；First conversion circuit is also electrically connected the Π type network
Output end, preselector rf inputs and it is described it is pre-/after select the input terminal of device filter circuit；Second conversion circuit also divides
Be not electrically connected it is described it is pre-/after select the output end of device filter circuit, the RF output end of preselector and the self-test signal test electricity
Road；
The self-test signal test circuit includes RF logarithmic detector and voltage comparator；The input terminal of the RF logarithmic detector
It is electrically connected second conversion circuit, the output end of the RF logarithmic detector is electrically connected the input terminal of the voltage comparator；
The output end of the voltage comparator is electrically connected the FPGA control circuit.
2. device built in self testing system is selected in shortwave prognosis as described in claim 1, it is characterised in that: the FPGA control circuit connects
Receive the serial data command that is sent by the short-wave radio set main control unit and be converted into 13 parallel-by-bits and control code instruction, respectively by
10 bit frequency control codes come control it is described it is pre-/after select device filter circuit, controlled by 3 control codes it is pre-/after select device self-checking function,
Preselector and after select conversion between device, to realize transmission to different frequency point carrier signal and rapidly to the carrier wave of useful signal
Frequency switches over, and realizes self-checking function；
The FPGA control circuit is XC3S200A circuit, after the Serial Control order for receiving control device, by serial number
13 parallel-by-bit code P0~P9, K1~K3 are converted into according to instruction, wherein P0~P9 is frequency control code, and K1~K3 is transmitting-receiving and self-test
Control code.
3. device built in self testing system is selected in shortwave prognosis as claimed in claim 2, it is characterised in that: first conversion circuit and
Second conversion circuit is controlled by control terminal K2, K3 of the FPGA control circuit；
First conversion circuit is electrically connected the output end of the Π type network by No. 8 pins, pre- by No. 5 pin electrical connections
The rf inputs for selecting device are electrically connected the control terminal K2 of the FPGA control circuit by No. 2 pins, are electrically connected by No. 4 pins
The control terminal K3 for connecing the FPGA control circuit, by No. 3 pins be electrically connected it is described it is pre-/after select the input terminal of device filter circuit；
Second conversion circuit by No. 3 pins be electrically connected it is described it is pre-/after select the output end of device filter circuit, drawn by No. 5
Foot is electrically connected the RF output end of preselector, and the control terminal K2 of the FPGA control circuit is electrically connected by No. 2 pins, passes through 4
Number pin is electrically connected the control terminal K3 of the FPGA control circuit, is electrically connected the defeated of the RF logarithmic detector by No. 8 pins
Enter end.
4. device built in self testing system is selected in shortwave prognosis as claimed in claim 2, it is characterised in that: it is described it is pre-/after select device to filter
Circuit is controlled by control code P0~P9, the K1 of the FPGA control circuit；The FPGA control circuit is controlled by K1 control terminal
It is described it is pre-/after select device filter circuit preselector receive channel and after select device hair channel selection, i.e., when the FPGA control circuit
Control terminal K1 be high level when, preselector filter circuit connect, when the FPGA control circuit control terminal K1 be low level
When, after select device filter circuit connect.
5. device built in self testing system is selected in shortwave prognosis as described in claim 1 or 4, it is characterised in that: it is described it is pre-/after select device to filter
Wave circuit includes digital tuning bounce frequency filter, the first transmitting-receiving conversion circuit, the second transmitting-receiving conversion circuit and amplifying circuit；Pre-selection
Device selects device to share the digital tuning bounce frequency filter with after；The frequency hopping speed of the digital tuning bounce frequency filter≤1000 μ
S, self-checking time about 1.2s, signal input part connect the output end of the first transmitting-receiving conversion circuit；The number
The signal output end of tuning frequency hopping filter connects the input terminal of the second transmitting-receiving conversion circuit；The second transmitting-receiving conversion electricity
The output end on road connects No. 3 pins of second conversion circuit, and described first receives and dispatches described in the input terminal connection of conversion circuit
The output end of amplifying circuit, the input terminal of the amplifying circuit connect No. 3 pins of first conversion circuit.
6. device built in self testing system is selected in shortwave prognosis as claimed in claim 5, it is characterised in that: the first transmitting-receiving conversion electricity
Road and the second transmitting-receiving conversion circuit are SPDT RF switch；The digital tuning bounce frequency filter includes 136 resonance electricity
Road constitutes 750 filters.
7. device built in self testing system is selected in shortwave prognosis as claimed in claim 2, it is characterised in that: the RF logarithmic detector
Input terminal is electrically connected No. 8 pins of second conversion circuit；The output end of the voltage comparator is electrically connected the FPGA control
The control terminal K4 of circuit processed；
The RF logarithmic detector is connected with resistance R1~R3 and is formed by wave detector AD8318, capacitor C1~C2, the voltage ratio
It is made of compared with device operational amplifier MAX4122, capacitor C3 and resistance R4~R6 connection, the resistance R5 is adjustable resistance；It is described
The one end capacitor C1 connects No. 8 pins of second conversion circuit, and the other end connects the pin INHI of the wave detector AD8318；
The one end the capacitor C2 connects the resistance R1 and connects No. 8 pins of second conversion circuit, institute by the resistance R1
State the pin INLO that the capacitor C2 other end connects the wave detector AD8318；The one end the resistance R2 connects the wave detector
The pin VSET of AD8318, the other end connect the resistance R3 and pass through the resistance R3 connection operational amplifier
The inverting input terminal of MAX4122；The pin VOUT of the wave detector AD8318 is connected to the connection of the resistance R2 and resistance R3
Point；The one end capacitor C3 ground connection, the other end connect the inverting input terminal of the operational amplifier MAX4122；The resistance R4
One end connects power supply+VCC, and the other end connects the resistance R5 and is grounded by the resistance R5；The operational amplifier
The normal phase input end of MAX4122 is connected to the tie point of the resistance R4 and resistance R5；The one end the resistance R6 connects the fortune
The output end of amplifier MAX4122 is calculated, the other end connects the control terminal K4 of the FPGA control circuit.
8. device built in self testing system is selected in shortwave prognosis as described in claim 1, it is characterised in that: first conversion circuit and
Second conversion circuit is all made of SPDT RF switch.
9. device built in self testing system is selected in shortwave prognosis described in claim 1, it is characterised in that: shown self-checking system and shortwave
In advance/after select device installation be integrated and together be mounted in metal thermal conductive material shell in.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811052332.9A CN109039487B (en) | 2018-09-10 | 2018-09-10 | Short wave prognosis selector internal self-checking system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811052332.9A CN109039487B (en) | 2018-09-10 | 2018-09-10 | Short wave prognosis selector internal self-checking system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109039487A true CN109039487A (en) | 2018-12-18 |
| CN109039487B CN109039487B (en) | 2024-02-27 |
Family
ID=64621309
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811052332.9A Active CN109039487B (en) | 2018-09-10 | 2018-09-10 | Short wave prognosis selector internal self-checking system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN109039487B (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110988931A (en) * | 2019-10-31 | 2020-04-10 | 北京遥测技术研究所 | Clock self-checking circuit based on AD8310 detector |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090190640A1 (en) * | 2008-01-25 | 2009-07-30 | Brian Allan Floyd | Radio Frequency Integrated Circuit with On-Chip Noise Source for Self-Test |
| CN102510269A (en) * | 2011-11-09 | 2012-06-20 | 广东圣大电子有限公司 | Small short-wave preselector |
| CN102594468A (en) * | 2012-02-28 | 2012-07-18 | 桂林电子科技大学 | Short-wave spectrum sensing method and system |
| RU135868U1 (en) * | 2013-07-16 | 2013-12-20 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Омский государственный технический университет" (ОмГТУ) | RADIO STATION |
| JP2014192581A (en) * | 2013-03-26 | 2014-10-06 | Toshiba Denpa Products Kk | Pre-selector and pre-selector diagnosis system |
| KR101698177B1 (en) * | 2015-11-09 | 2017-01-19 | 리모트솔루션주식회사 | Remocon for observing of rf enviroment |
| CN106506039A (en) * | 2016-12-13 | 2017-03-15 | 宝鸡烽火诺信科技有限公司 | Device control system is selected in a kind of shortwave prognosis |
| CN107276695A (en) * | 2017-06-07 | 2017-10-20 | 中国电子科技集团公司第四十研究所 | A kind of noise coefficient scanning survey method |
| US9851383B1 (en) * | 2014-11-26 | 2017-12-26 | Keysight Technologies, Inc. | Method and system for performing vector spectral measurements of a radio frequency (RF) signal having a repetitive waveform |
| CN208739123U (en) * | 2018-09-10 | 2019-04-12 | 陕西烽火诺信科技有限公司 | Device built in self testing system is selected in a kind of shortwave prognosis |
-
2018
- 2018-09-10 CN CN201811052332.9A patent/CN109039487B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090190640A1 (en) * | 2008-01-25 | 2009-07-30 | Brian Allan Floyd | Radio Frequency Integrated Circuit with On-Chip Noise Source for Self-Test |
| CN102510269A (en) * | 2011-11-09 | 2012-06-20 | 广东圣大电子有限公司 | Small short-wave preselector |
| CN102594468A (en) * | 2012-02-28 | 2012-07-18 | 桂林电子科技大学 | Short-wave spectrum sensing method and system |
| JP2014192581A (en) * | 2013-03-26 | 2014-10-06 | Toshiba Denpa Products Kk | Pre-selector and pre-selector diagnosis system |
| RU135868U1 (en) * | 2013-07-16 | 2013-12-20 | Федеральное государственное бюджетное образовательное учреждение высшего профессионального образования "Омский государственный технический университет" (ОмГТУ) | RADIO STATION |
| US9851383B1 (en) * | 2014-11-26 | 2017-12-26 | Keysight Technologies, Inc. | Method and system for performing vector spectral measurements of a radio frequency (RF) signal having a repetitive waveform |
| KR101698177B1 (en) * | 2015-11-09 | 2017-01-19 | 리모트솔루션주식회사 | Remocon for observing of rf enviroment |
| CN106506039A (en) * | 2016-12-13 | 2017-03-15 | 宝鸡烽火诺信科技有限公司 | Device control system is selected in a kind of shortwave prognosis |
| CN107276695A (en) * | 2017-06-07 | 2017-10-20 | 中国电子科技集团公司第四十研究所 | A kind of noise coefficient scanning survey method |
| CN208739123U (en) * | 2018-09-10 | 2019-04-12 | 陕西烽火诺信科技有限公司 | Device built in self testing system is selected in a kind of shortwave prognosis |
Non-Patent Citations (1)
| Title |
|---|
| 李红;阮斌;柴瑞;: "基于FPGA和AD8318的预/后选器自检电路设计应用", 无线电通信技术, no. 01, pages 99 - 102 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110988931A (en) * | 2019-10-31 | 2020-04-10 | 北京遥测技术研究所 | Clock self-checking circuit based on AD8310 detector |
| CN110988931B (en) * | 2019-10-31 | 2022-03-04 | 北京遥测技术研究所 | Clock self-checking circuit based on AD8310 detector |
Also Published As
| Publication number | Publication date |
|---|---|
| CN109039487B (en) | 2024-02-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102946286B (en) | Method, device and system for controlling detection of equipment | |
| CN205864433U (en) | Scramble testing system | |
| CN105022020A (en) | RF electromagnetic field and radio immunity test system and method of electric energy meter | |
| CN105553754A (en) | Wireless communication device testability design method | |
| CN103234534A (en) | Method for testing sensitivity of airplane radio compass receiver | |
| CN211426658U (en) | Electromagnetic compatibility test equipment | |
| CN208739123U (en) | Device built in self testing system is selected in a kind of shortwave prognosis | |
| CN104519503A (en) | Radio frequency link switching device for mobile communication terminal testing | |
| CN101174907A (en) | Testing device for radio frequency veneer | |
| CN110609183A (en) | IVI technology-based identification module and automatic test system of complete machine | |
| CN100502525C (en) | Testing and calibrating device of mobile phone | |
| CN112782567A (en) | Chip testing system, method, device, medium and equipment | |
| CN206432996U (en) | Radio-frequency performance of wireless terminal test system | |
| CN107395296A (en) | A kind of short-wave receiver antenna-feedback system intellectual monitoring module and monitoring method | |
| CN109039487A (en) | Device built in self testing system is selected in a kind of shortwave prognosis | |
| CN113343621A (en) | Automatic test system of short wave comprehensive digital platform | |
| CN204349995U (en) | The full-automatic regulating and measuring system of a kind of GSM digital high-frequency amplification station | |
| CN105162530A (en) | System for detecting hardware performance of micropower wireless communication module | |
| CN113259021A (en) | Automatic receiving and dispatching testing device for portable aviation radio station | |
| CN112882070A (en) | Navigation satellite EIRP and stability test system and method | |
| CN114006667B (en) | Portable short wave radio station circuit electromagnetic compatibility fault finding instrument | |
| CN105791525B (en) | Grounding adjustment method and device | |
| CN106019322A (en) | Testing system and method for high and low temperatures of GPS module in car-networking terminal equipment | |
| CN206002608U (en) | A kind of radiation immunity electromagnetic compatibility test system being applied to high pressure dosing apparatus | |
| CN212723133U (en) | Radiation stray testing device and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |