CN109037060A - A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low - Google Patents
A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low Download PDFInfo
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- CN109037060A CN109037060A CN201810794649.3A CN201810794649A CN109037060A CN 109037060 A CN109037060 A CN 109037060A CN 201810794649 A CN201810794649 A CN 201810794649A CN 109037060 A CN109037060 A CN 109037060A
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- layer
- igbt
- channel mobility
- grid
- drift
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- 238000010276 construction Methods 0.000 title claims abstract description 13
- 238000002360 preparation method Methods 0.000 title claims abstract description 10
- 239000000463 material Substances 0.000 claims abstract description 5
- 239000000758 substrate Substances 0.000 claims abstract description 5
- 238000009792 diffusion process Methods 0.000 claims abstract description 4
- 238000005530 etching Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 7
- 229910010271 silicon carbide Inorganic materials 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
- H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Recrystallisation Techniques (AREA)
Abstract
Channel mobility can be inhibited low the present invention provides a kind of, improve the preparation method of the IGBT new construction of threshold voltage setting freedom degree.The inventive step is as follows: selecting wafer material SiC as substrate, successively grows p+ type collector layer, n+ cutoff layers and n- drift layer from the bottom up；It etches n- drift layer and forms grid slot, in the upper surface growth mask layer of the n- drift layer；Make p-type base area, n+ emitter and p+ diffusion layer；Grid oxic horizon is added；Gate electrode is filled it up in grid slot, and covers insulating layer above grid oxic horizon and gate electrode；Emitter electrode is drawn, surface electrode is formed.Between 50 ° to 65 °, epitaxial surface is grown as interarea for the drift angle that the face orientation that the face orientation of grid slot side corresponds to { 0001 } face is constituted.Even if the doping concentration of p-type base area is 5 × 1016cm‑3More than, the voltage value of threshold values Vth can also be adjusted accordingly, and can be effectively reduced the low problem that channel mobility is generated due to high concentration.
Description
Technical field
The present invention relates to a kind of preparation methods of IGBT structure, and especially providing a kind of can inhibit channel mobility low
The preparation method of IGBT new construction.
Background technique
IGBT is the abbreviation of insulated gate bipolar transistor (Isolated Gate Bipolar Transistor), it
It is that early eighties are born, the NEW TYPE OF COMPOSITE power electronic devices that the nineties develop rapidly.After 1980 in the world
The semiconductor power device of mainstream is more advanced insulated gate bipolar transistor (IGBT) by silicon-controlled development.With power electronics
Transformation system puts forward higher requirements efficiency and volume, and silicon carbide (SiC) will be more and more suitable semiconductor devices.
It will be a kind of very effective means for realizing its high power density by the IGBT device of base of SiC.
The channel mobility of original structure IGBT produces low problem due to high concentration；In the doping of p type diffused layer
Concentration is from 2 × 1016cm-3To 1 × 1017cm-3After increase, channel mobility can also decline therewith, and threshold voltage sets freedom degree
It is relatively low.
Summary of the invention
To solve the above-mentioned problems, channel mobility can be inhibited low the object of the present invention is to provide a kind of, improves valve
Threshold voltage sets the preparation method of the IGBT new construction of freedom degree.
In order to achieve the above objectives, technical scheme is as follows: a kind of IGBT that channel mobility can be inhibited low is new
The preparation method of structure includes the following steps:
Step 1: selecting wafer material SiC as substrate, p+ type collector layer (1), n+ cutoff layers are successively grown from the bottom up
(2) and n- drift layer (3)；
Step 2: etching n- drift layer (3) forms grid slot, in the upper surface growth mask layer (17) of the n- drift layer (3)；
Step 3: production p-type base area (4), n+ emitter (5) and p+ diffusion layer (6)；
Step 4: grid oxic horizon (18) are added；
Step 5: filling it up with gate electrode (19) in grid slot, and the covering above grid oxic horizon (18) and gate electrode (19)
One insulating layer (20)；
Step 6: forming the ohmic contact layer (21) of emitter, draw surface electrode (22)；
Step 7: forming collector electrode layer (23).
Further, the drift angle that the face orientation that the face orientation of grid slot side (16a) corresponds to { 0001 } face is constituted exists
Between 50 ° to 65 °, which grows as interarea.
The beneficial effects of the present invention are: (1) though the doping concentration of p-type base area 5 × 1016cm-3More than, threshold values Vth's
Voltage value can also be adjusted accordingly, and can be effectively reduced that channel mobility generated due to high concentration lowly asks
Topic.(2) mobility of new construction IGBT with the doping concentration of p type diffused layer increase, almost without changing.Moreover,
Original structure is compared, new construction IGBT mobility is greatly improved.
Detailed description of the invention
Fig. 1 is the cross-sectional configuration figure of the corresponding IGBT form of step 1 of the present invention；Fig. 2 is that step 2 of the present invention is corresponding
The cross-sectional configuration figure of IGBT form；Fig. 3 is the cross-sectional configuration figure of the corresponding IGBT form of step 3 of the present invention；Fig. 4 is the present invention
The cross-sectional configuration figure of the corresponding IGBT form of step 4；Fig. 5 is the cross-sectional configuration figure of the corresponding IGBT form of step 5 of the present invention；
Fig. 6 is the cross-sectional configuration figure of the corresponding IGBT form of step 6 of the present invention；Fig. 7 is the channel mobility of new construction IGBT of the present invention
With the relational graph of p type diffused layer doping concentration；The channel mobility and p type diffused layer doping concentration that Fig. 8 is original structure IGBT
Relational graph.
Specific embodiment
It describes the specific embodiments of the present invention in detail with reference to the accompanying drawing.
A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low includes the following steps:
Step 1: silicon carbide (SiC) is very attractive semiconductor as shown in Figure 1, selecting wafer material SiC as substrate
One of material, it has many advantages, such as broad-band gap, high heat conductance, high critical breakdown strength, high electronics saturation migration rate.At present absolutely
Most of SiC devices are that extension higher-quality SiC thin layer manufactures on sic substrates.The size of wafer can from 4 inches to
Between 8 inches, p+ type collector layer (1), n+ cutoff layers (2) and n- drift layer (3) are successively grown from the bottom up；
Step 2: in the upper surface of the n- drift layer (3), growth is covered as shown in Fig. 2, etching n- drift layer (3) forms grid slot
Mold layer (17)；
Step 3: as shown in figure 3, production p-type base area (4), n+ emitter (5) and p+ diffusion layer (6)；
Step 4: as shown in figure 4, grid oxic horizon (18) are added；
Step 5: as shown in figure 5, filled it up in grid slot gate electrode (19), and in grid oxic horizon (18) and gate electrode
(19) top covers insulating layer (20)；
Step 6: as shown in fig. 6, the ohmic contact layer (21) of formation emitter, draws surface electrode layer (22)；
Step 7: forming collector electrode layer (23).
The drift angle that the face orientation that the face orientation of grid slot side (16a) corresponds to { 0001 } face is constituted is at 50 ° to 65 °
Between, which grows as interarea.In this way, even if the doping concentration of p-type base area (4) is 5 × 1016cm-3With
On, the voltage value of threshold values Vth can also be adjusted accordingly, and channel mobility can be effectively reduced due to high concentration and
The low problem generated.
As shown in Figure 7,8, compare rear it is found that the IGBT(of original structure is as shown in Figure 7) in the doping of p type diffused layer
Concentration is from 2 × 1016cm-3To 1 × 1017cm-3After increase, channel mobility also has dropped 25% or so therewith.And new construction
(as shown in Figure 8) mobility of IGBT with the doping concentration of p type diffused layer increase, almost without changing.Moreover, right
Than with original structure, it is 3 times of original structure or more that new construction IGBT mobility, which is also greatly improved,.
It is to be illustrated to preferable implementation of the invention, but the invention is not limited to the implementation above
Example, those skilled in the art can also make various equivalent variations on the premise of without prejudice to spirit of the invention or replace
It changes, these equivalent deformations or replacement are all included in the scope defined by the claims of the present application.
Claims (2)
1. a kind of preparation method for the IGBT new construction that channel mobility can be inhibited low, characterized by the following steps:
Step 1: selecting wafer material SiC as substrate, p+ type collector layer (1), n+ cutoff layers are successively grown from the bottom up
(2) and n- drift layer (3)；
Step 2: etching n- drift layer (3) forms grid slot, in the upper surface growth mask layer (17) of the n- drift layer (3)；
Step 3: production p-type base area (4), n+ emitter (5) and p+ diffusion layer (6)；
Step 4: grid oxic horizon (18) are added；
Step 5: filling it up with gate electrode (19) in grid slot, and the covering above grid oxic horizon (18) and gate electrode (19)
One insulating layer (20)；
Step 6: forming the ohmic contact layer (21) of emitter, draw surface electrode (22)；
Step 7: forming collector electrode layer (23).
2. a kind of preparation method of IGBT new construction that channel mobility can be inhibited low according to claim 1, special
Sign is: the drift angle that the face orientation that the face orientation of grid slot side (16a) corresponds to { 0001 } face is constituted is at 50 ° to 65 °
Between, which grows as interarea.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810794649.3A CN109037060A (en) | 2018-07-19 | 2018-07-19 | A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810794649.3A CN109037060A (en) | 2018-07-19 | 2018-07-19 | A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low |
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|---|---|
| CN109037060A true CN109037060A (en) | 2018-12-18 |
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| CN201810794649.3A Pending CN109037060A (en) | 2018-07-19 | 2018-07-19 | A kind of preparation method for the IGBT new construction that channel mobility can be inhibited low |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120248461A1 (en) * | 2011-04-01 | 2012-10-04 | Sumitomo Electric Industries, Ltd. | Silicon carbide semiconductor device |
| CN102859698A (en) * | 2011-03-30 | 2013-01-02 | 住友电气工业株式会社 | Igbt |
| WO2013073293A1 (en) * | 2011-11-16 | 2013-05-23 | 住友電気工業株式会社 | Method for manufacturing semiconductor device, and semiconductor device |
-
2018
- 2018-07-19 CN CN201810794649.3A patent/CN109037060A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102859698A (en) * | 2011-03-30 | 2013-01-02 | 住友电气工业株式会社 | Igbt |
| US20120248461A1 (en) * | 2011-04-01 | 2012-10-04 | Sumitomo Electric Industries, Ltd. | Silicon carbide semiconductor device |
| WO2013073293A1 (en) * | 2011-11-16 | 2013-05-23 | 住友電気工業株式会社 | Method for manufacturing semiconductor device, and semiconductor device |
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Application publication date: 20181218 |
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