CN109034068B

CN109034068B - Video processing method and device, electronic equipment and storage medium

Info

Publication number: CN109034068B
Application number: CN201810845512.6A
Authority: CN
Inventors: 郝元桢; 黄明杨; 石建萍
Original assignee: Beijing Sensetime Technology Development Co Ltd
Current assignee: Beijing Sensetime Technology Development Co Ltd
Priority date: 2018-07-27
Filing date: 2018-07-27
Publication date: 2020-11-03
Anticipated expiration: 2038-07-27
Also published as: CN109034068A

Abstract

The disclosure relates to a video processing method and apparatus, an electronic device, and a storage medium. The method comprises the following steps: performing edge detection on a video frame to be processed of a video, and determining an edge area in the video frame to be processed; determining a highlight area in the video frame to be processed; determining a flash area in the video frame to be processed according to the edge area and the highlight area; and superposing a flash image layer in the video frame to be processed according to the position of the flash area. The method and the device can realize the flash effect in the video through lower calculation complexity, and meet the real-time requirement of video processing.

Description

Video processing method and device, electronic equipment and storage medium

Technical Field

The present disclosure relates to the field of computer vision technologies, and in particular, to a video processing method and apparatus, an electronic device, and a storage medium.

Background

In video processing, a user may wish to add a specific special effect to a video to enhance the viewing of the video. The video processing method generally needs to process a large number of video frames in the video, and the related technology has high computational complexity and cannot meet the real-time requirement of video processing.

Disclosure of Invention

The present disclosure provides a video processing technical solution.

According to an aspect of the present disclosure, there is provided a video processing method including:

performing edge detection on a video frame to be processed of a video, and determining an edge area in the video frame to be processed;

determining a highlight area in the video frame to be processed;

determining a flash area in the video frame to be processed according to the edge area and the highlight area;

and superposing a flash image layer in the video frame to be processed according to the position of the flash area.

In one possible implementation, determining a highlight region in the video frame to be processed includes:

and determining a highlight area in the video frame to be processed according to the area of which the gray value is greater than the gray threshold value in the video frame to be processed.

In a possible implementation manner, determining a highlight region in the video frame to be processed according to a region in the video frame to be processed whose gray value is greater than a gray threshold includes:

determining a region of which the gray value is greater than a gray threshold value in the video frame to be processed as a highlight region in the video frame to be processed; alternatively, the first and second electrodes may be,

and determining a region with an area larger than a first area threshold value in the region with the gray value larger than the gray threshold value in the video frame to be processed as a highlight region in the video frame to be processed.

In a possible implementation manner, determining a flash region in the video frame to be processed according to the edge region and the highlight region includes:

and determining a flash area in the video frame to be processed according to the intersection area of the edge area and the highlight area.

In a possible implementation manner, determining a flash region in the video frame to be processed according to an intersection region of the edge region and the highlight region includes:

determining the intersection area of the edge area and the highlight area as a flash area in the video frame to be processed; alternatively, the first and second electrodes may be,

and determining a region with an area larger than a second area threshold in an intersection region of the edge region and the highlight region as a flash region in the video frame to be processed.

In a possible implementation manner, superimposing a flash image layer in the video frame to be processed according to the position of the flash area includes:

scanning the video frame to be processed by adopting a scanning line;

if a first scanning line passes through a first flash area, acquiring the positions of two intersection points of the first scanning line and the boundary line of the first flash area;

and superposing a flash image layer on the first flash region according to the positions of the two intersection points.

In one possible implementation, superimposing a flash layer for the first flash region according to the positions of the two intersection points includes:

determining the size of a flash layer corresponding to the first flash region according to the distance between the two intersection points;

and taking the midpoint of the two intersection points as the geometric center of the flash layer, and superposing the flash layer for the first flash region according to the size of the flash layer corresponding to the first flash region.

and superposing a flash image layer in the video frame to be processed in a color filtering mode according to the position of the flash area.

determining a flash layer corresponding to the video frame to be processed;

and superposing a flash image layer corresponding to the video frame to be processed in the video frame to be processed according to the position of the flash area.

In a possible implementation manner, determining a flash layer corresponding to the to-be-processed video frame includes:

and determining a flash layer corresponding to the video frame to be processed from the flash layer sequence according to the flash period, the number of flash layers in the flash layer sequence and the frame number of the video frame to be processed in the video.

According to an aspect of the present disclosure, there is provided a video processing apparatus including:

the edge detection module is used for carrying out edge detection on a video frame to be processed of a video and determining an edge area in the video frame to be processed;

the first determining module is used for determining a highlight area in the video frame to be processed;

the second determining module is used for determining a flash area in the video frame to be processed according to the edge area and the highlight area;

and the superposition module is used for superposing a flash image layer in the video frame to be processed according to the position of the flash area.

In one possible implementation manner, the first determining module is configured to:

In one possible implementation manner, the second determining module is configured to:

In one possible implementation, the superposition module includes:

the scanning submodule is used for scanning the video frame to be processed by adopting a scanning line;

the acquisition submodule is used for acquiring the positions of two intersection points of a boundary line of a first scanning line and a first flash area if the first scanning line passes through the first flash area;

and the first superposition submodule is used for superposing a flash map layer aiming at the first flash area according to the positions of the two intersection points.

In one possible implementation, the first superposition sub-module includes:

a determining unit, configured to determine a size of a flash layer corresponding to the first flash region according to a distance between the two intersection points;

and the superposition unit is used for taking the midpoint of the two intersection points as the geometric center of the flash layer, and superposing the flash layer for the first flash region according to the size of the flash layer corresponding to the first flash region.

In one possible implementation, the superposition module is configured to:

In one possible implementation, the superposition module includes:

the determining submodule is used for determining a flash layer corresponding to the video frame to be processed;

and the second superposition submodule is used for superposing the flash image layer corresponding to the video frame to be processed in the video frame to be processed according to the position of the flash area.

In one possible implementation, the determining sub-module is configured to:

According to an aspect of the present disclosure, there is provided an electronic device including:

a processor;

a memory for storing processor-executable instructions;

wherein the processor is configured to: the above-described video processing method is performed.

According to an aspect of the present disclosure, there is provided a computer-readable storage medium having stored thereon computer program instructions which, when executed by a processor, implement the above-described video processing method.

In the embodiment of the disclosure, edge detection is performed on a video frame to be processed of a video, an edge region in the video frame to be processed is determined, a highlight region in the video frame to be processed is determined, a flash region in the video frame to be processed is determined according to the edge region and the highlight region, and a flash layer is superimposed in the video frame to be processed according to the position of the flash region, so that a flash effect can be realized in the video through low computational complexity, and the real-time requirement of video processing is met.

Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments, which proceeds with reference to the accompanying drawings.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

Fig. 1 shows a flow diagram of a video processing method according to an embodiment of the present disclosure.

Fig. 2 shows a schematic diagram of an edge region in a video processing method according to an embodiment of the present disclosure.

Fig. 3 shows a schematic diagram of highlight areas in a video processing method according to an embodiment of the present disclosure.

Fig. 4 shows an exemplary flowchart of step S14 of the video processing method according to the embodiment of the present disclosure.

Fig. 5 shows a schematic diagram of a scan line passing through a flash region in a video processing method according to an embodiment of the present disclosure.

Fig. 6 shows an exemplary flowchart of step S143 of the video processing method according to the embodiment of the present disclosure.

Fig. 7 shows a schematic diagram after superimposing a flash layer in a video frame to be processed in a video processing method according to an embodiment of the present disclosure.

Fig. 8 shows an exemplary flowchart of step S14 of the video processing method according to the embodiment of the present disclosure.

Fig. 9 shows a block diagram of a video processing apparatus according to an embodiment of the present disclosure.

Fig. 10 shows an exemplary block diagram of a video processing apparatus according to an embodiment of the present disclosure.

Fig. 11 is a block diagram illustrating an electronic device 800 in accordance with an example embodiment.

Fig. 12 is a block diagram illustrating an electronic device 1900 according to an example embodiment.

Detailed Description

Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. In the drawings, like reference numbers can indicate functionally identical or similar elements. While the various aspects of the embodiments are presented in drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

The word "exemplary" is used exclusively herein to mean "serving as an example, embodiment, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.

Furthermore, in the following detailed description, numerous specific details are set forth in order to provide a better understanding of the present disclosure. It will be understood by those skilled in the art that the present disclosure may be practiced without some of these specific details. In some instances, methods, means, elements and circuits that are well known to those skilled in the art have not been described in detail so as not to obscure the present disclosure.

Fig. 1 shows a flow diagram of a video processing method according to an embodiment of the present disclosure. As shown in fig. 1, the method includes steps S11 through S14.

In step S11, edge detection is performed on a video frame to be processed of the video, and an edge area in the video frame to be processed is determined.

The video of the embodiments of the present disclosure may be any video that needs to be processed. For example, the video may be a video shot in real time or a video shot in non-real time. The video frames to be processed of the video represent the video frames in the video that need to be processed. In the embodiment of the present disclosure, a part of video frames of a video may be used as video frames to be processed, and all video frames of the video may also be used as video frames to be processed. For a non-real-time shot video, whether each video frame of the video is a video frame to be processed or not can be determined in advance according to the frame number of each video frame of the video in the video; for the video shot in real time, whether each video frame of the video is a video frame to be processed or not can be determined in real time according to the frame number of each video frame of the video in the video.

The frame number of the video frame to be processed in the video indicates that the video frame to be processed is the number of frames in the video. For example, the frame number of the video frame to be processed in the video is i, which indicates that the video frame to be processed is the ith frame in the video. For both non-live captured video and live captured video, the number of frames in the video of the video to be processed can be counted from the first frame of the video.

In the embodiment of the present disclosure, edge detection may be performed on a video frame to be processed by using a related art means, so as to determine an edge area in the video frame to be processed. For example, a Sobel edge detection method may be adopted to perform edge detection on the video frame to be processed, and determine an edge region in the video frame to be processed. For another example, a Canny edge detection method may be adopted to perform edge detection on the video frame to be processed, and determine an edge region in the video frame to be processed. The edge area in the video frame to be processed represents the area where the edge in the video frame to be processed is located. Fig. 2 shows a schematic diagram of an edge region in a video processing method according to an embodiment of the present disclosure.

In step S12, a highlight region in the video frame to be processed is determined.

In one possible implementation, determining a highlight region in a video frame to be processed includes: and determining a highlight area in the video frame to be processed according to the area of which the gray value is greater than the gray threshold value in the video frame to be processed.

In the embodiment of the disclosure, if the video frame to be processed is a gray scale image, the gray scale value of each pixel in the video frame to be processed may be obtained, and the highlight area in the video frame to be processed is determined according to the area in the video frame to be processed where the gray scale value is greater than the gray scale threshold.

In a possible implementation manner, if the video frame to be processed is an RGB image, the video frame to be processed may be converted into a grayscale image, and a highlight region in the video frame to be processed may be determined according to a region of the grayscale image corresponding to the video frame to be processed, where a grayscale value is greater than a grayscale threshold value.

In another possible implementation manner, if the video frame to be processed is an RGB image, the gray value of each pixel to be processed may be determined according to the channel value of one or more of the R channel, the G channel, and the B channel of the video frame to be processed, so that the highlight region in the video frame to be processed is determined according to the region in the video frame to be processed in which the gray value is greater than the gray threshold.

As an example of this implementation, the gray value of a certain pixel in the video frame to be processed is equal to the weighted sum of the channel values of the respective channels of the pixel.

For example, the weight of the R channel is 0.3, the weight of the G channel is 0.59, the weight of the B channel is 0.11, and Gray is 0.3R +0.59G +0.11B, where Gray represents a Gray value, R represents an R channel value, G represents a G channel value, and B represents a B channel value.

For another example, the weights of the R channel, the G channel, and the B channel are 1/3, and Gray ═ R + G + B)/3.

As another example of this implementation, the gray value of a certain pixel in the video frame to be processed is equal to the pixel value of the G channel of the pixel.

It should be noted that, although the manner of determining the gray-scale values of the respective pixels in the video frame to be processed is described in the above implementation manner, those skilled in the art can understand that the present disclosure should not be limited thereto. The method for determining the gray value of each pixel in the video frame to be processed can be flexibly set by a person skilled in the art according to the requirements of the actual application scene and/or personal preference.

In one possible implementation manner, determining a highlight region in a video frame to be processed according to a region in the video frame to be processed whose gray value is greater than a gray threshold value includes: and determining the area of which the gray value is greater than the gray threshold value in the video frame to be processed as a highlight area in the video frame to be processed. In this implementation, all regions of the video frame to be processed whose gray values are greater than the gray threshold may be respectively determined as highlight regions in the video frame to be processed. Fig. 3 shows a schematic diagram of highlight areas in a video processing method according to an embodiment of the present disclosure. In fig. 3, the white region is a highlight region, and the black region is a non-highlight region.

In one possible implementation manner, determining a highlight region in a video frame to be processed according to a region in the video frame to be processed whose gray value is greater than a gray threshold value includes: and determining a region with an area larger than a first area threshold value in a region with a gray value larger than a gray threshold value in the video frame to be processed as a highlight region in the video frame to be processed. In this implementation manner, only the region with an area larger than the first area threshold value in the region with the gray scale value larger than the gray scale threshold value in the video frame to be processed is determined as the highlight region in the video frame to be processed, which is helpful for reducing the calculation amount in the subsequent processing process and further improving the efficiency of video processing.

In step S13, a flash region in the video frame to be processed is determined according to the edge region and the highlight region.

In one possible implementation, determining a flash region in a video frame to be processed according to an edge region and a highlight region includes: and determining a flash area in the video frame to be processed according to the intersection area of the edge area and the highlight area.

As an example of this implementation, determining a flash region in a video frame to be processed according to an intersection region of an edge region and a highlight region includes: and determining the intersection area of the edge area and the highlight area as a flash area in the video frame to be processed. In this example, the respective intersection regions of the edge region and the highlight region may be respectively determined as flash regions in the video frame to be processed.

As another example of this implementation, determining a flash region in a video frame to be processed according to an intersection region of an edge region and a highlight region includes: and determining a region with an area larger than a second area threshold in an intersection region of the edge region and the highlight region as a flash region in the video frame to be processed. The example helps to reduce the calculation amount of the subsequent processing process and further improve the efficiency of video processing by determining only the area of the area larger than the second area threshold in the intersection region of the edge region and the highlight region as the flash region in the video frame to be processed.

In another possible implementation manner, determining a flash region in a video frame to be processed according to the edge region and the highlight region includes: determining a region except an edge region in a video frame to be processed as a non-edge region; and determining a flash area in the video frame to be processed according to the intersection area of the non-edge area and the highlight area.

As an example of this implementation, determining a flash region in a video frame to be processed according to an intersection region of a non-edge region and a highlight region includes: and determining the intersection area of the non-edge area and the highlight area as a flash area in the video frame to be processed. In this example, the intersection regions of the non-edge region and the highlight region may be respectively determined as flash regions in the video frame to be processed.

As another example of this implementation, determining a flash region in a video frame to be processed according to an intersection region of a non-edge region and a highlight region includes: and determining a region with an area larger than a third area threshold value in an intersection region of the non-edge region and the highlight region as a flash region in the video frame to be processed. The example helps to reduce the calculation amount of the subsequent processing process and further improve the efficiency of video processing by determining only the area of the area larger than the third area threshold in the intersection region of the non-edge region and the highlight region as the flash region in the video frame to be processed.

In step S14, a flash image layer is superimposed in the video frame to be processed according to the position of the flash area.

After the flash layer is superposed in the video frame to be processed according to the position of the flash area, the flash area becomes bright, and the visual effect is better.

In one possible implementation, superimposing a flash layer in the video frame to be processed according to the position of the flash region includes: according to the position of the flash region, adopting a color filtering mode to treatAnd superposing the flash image layer in the video frame. For example, superimposing the pixel value P of the coordinates (x, y) behind the flash layer in the video frame to be processed_x,y＝255-a_x,y(255-b_x,y) /255 wherein a_x,yPixel value representing the coordinates (x, y) in the video frame to be processed, b_x,yA pixel value representing coordinates (x, y) in the superimposed flash layer.

The embodiment of the disclosure determines an edge region in a video frame to be processed by performing edge detection on the video frame to be processed of a video, determines a highlight region in the video frame to be processed, determines a flash region in the video frame to be processed according to the edge region and the highlight region, and superimposes a flash layer in the video frame to be processed according to the position of the flash region, thereby realizing a flash effect in the video through low computational complexity and meeting the real-time requirement of video processing.

Fig. 4 shows an exemplary flowchart of step S14 of the video processing method according to the embodiment of the present disclosure. As shown in fig. 4, step S14 may include steps S141 to S143.

In step S141, the video frame to be processed is scanned with the scanning line.

In one possible implementation, the distance between adjacent scan lines is a fixed value. For example, the fixed value may range from 20 to 50.

In the embodiment of the present disclosure, the scan line may be determined according to the number of flash image layers that need to be added. If more flash image layers need to be added, the scanning lines are denser, namely the distance between adjacent scanning lines is smaller; if fewer flash layers need to be added, the scan lines are sparser, i.e., the distance between adjacent scan lines is larger.

In step S142, when the first scan line passes through the first flash region, positions of two intersections of a boundary line between the first scan line and the first flash region are acquired.

Fig. 5 shows a schematic diagram of a scan line passing through a flash region in a video processing method according to an embodiment of the present disclosure. As shown in fig. 5, a scanning line where A, B two points are located passes through the flash region.

In step S143, a flash map layer is superimposed for the first flash region according to the positions of the two intersections.

For example, a flash layer may be superimposed between two intersections; as another example, the distance between two intersection points may be taken as the side length of the flash layer.

Fig. 6 shows an exemplary flowchart of step S143 of the video processing method according to the embodiment of the present disclosure. As shown in fig. 6, step S143 may include step S1431 and step S1432.

In step S1431, the size of the flash layer corresponding to the first flash region is determined based on the distance between the two intersection points.

The correspondence between the distance between the two intersection points and the size of the flash image layer may be determined according to the requirements of the actual application scene, and is not limited herein.

For example, if the distance between the two intersections is smaller than the distance threshold, the size of the flash layer corresponding to the first flash region is S₁(ii) a If the distance between the two intersection points is greater than or equal to the distance threshold, the size of the flash layer corresponding to the first flash region is S₂. For example, the distance threshold is 50 pixels.

In step S1432, the midpoint of the two intersection points is used as the geometric center of the flash layer, and the flash layer is superimposed on the first flash region according to the size of the flash layer corresponding to the first flash region.

As shown in fig. 5, one flash region may intersect with a plurality of scan lines, and in this case, flash layers may be superimposed for the flash regions respectively according to intersections of boundary lines of the respective scan lines and the flash regions.

Fig. 8 shows an exemplary flowchart of step S14 of the video processing method according to the embodiment of the present disclosure. As shown in fig. 8, step S14 may include step S41 and step S42.

In step S41, a flash layer corresponding to the video frame to be processed is determined.

In one possible implementation manner, determining a flash layer corresponding to a video frame to be processed includes: and determining a flash layer corresponding to the video frame to be processed from the flash layer sequence according to the flash period, the number of flash layers in the flash layer sequence and the frame number of the video frame to be processed in the video.

In this implementation, the brightness of each flash layer in the sequence of flash layers is different. For example, the number of flash layers in the flash layer sequence is K, the luminance of the kth flash layer in the flash layer sequence is less than the luminance of the (K + 1) th flash layer, wherein K is greater than or equal to 1 and is less than or equal to K-1; or the brightness of the kth flash layer in the flash layer sequence is greater than the brightness of the (k + 1) th flash layer.

For example, the flash layer f corresponding to the video frame to be processed may be determined from the flash layer sequence by using the formula f ≦ K/(T + K), where f is ≦ 1 ≦ K, i represents the number of video frames to be processed in the video, T represents the flash period, K represents the number of flash layers in the flash layer sequence, and i% T represents the remainder obtained by dividing i by T. Where f ═ (i% T) K/(T + K) can be a shaping operation.

According to the implementation mode, the flash layer corresponding to the video frame to be processed is determined from the flash layer sequence according to the flash period, the number of flash layers in the flash layer sequence and the frame number of the video frame to be processed in the video, and therefore the flash effect with periodic change can be achieved.

In step S42, a flash layer corresponding to the video frame to be processed is superimposed on the video frame to be processed according to the position of the flash region.

In one possible implementation, each video frame to be processed may be processed in parallel to further improve the efficiency of video processing.

In one possible implementation, after the flash image layer is superimposed in the video frame to be processed, the flash image layer can be output to a screen in real time and displayed.

Because the video processing method provided by the embodiment of the disclosure can realize the flash effect in the video through lower computation complexity, the embodiment of the disclosure can be applied to application scenes such as video recording and live broadcasting platforms and the like which need to process the video in real time.

It is understood that the above-mentioned method embodiments of the present disclosure can be combined with each other to form a combined embodiment without departing from the logic of the principle, which is limited by the space, and the detailed description of the present disclosure is omitted.

In addition, the present disclosure also provides an image processing apparatus, an electronic device, a computer-readable storage medium, and a program, which can be used to implement any one of the image processing methods provided by the present disclosure, and the descriptions and corresponding descriptions of the corresponding technical solutions and the corresponding descriptions in the methods section are omitted for brevity.

Fig. 9 shows a block diagram of a video processing apparatus according to an embodiment of the present disclosure. As shown in fig. 9, the apparatus includes: the edge detection module 91 is configured to perform edge detection on a video frame to be processed of a video, and determine an edge area in the video frame to be processed; a first determining module 92, configured to determine a highlight region in the video frame to be processed; a second determining module 93, configured to determine a flash region in the video frame to be processed according to the edge region and the highlight region; and the superimposing module 94 is configured to superimpose the flash image layer in the video frame to be processed according to the position of the flash area.

In one possible implementation, the first determining module 92 is configured to: and determining a highlight area in the video frame to be processed according to the area of which the gray value is greater than the gray threshold value in the video frame to be processed.

In one possible implementation, the first determining module 92 is configured to: determining a region with the gray value larger than a gray threshold value in a video frame to be processed as a highlight region in the video frame to be processed; or determining a region with an area larger than the first area threshold value in a region with a gray value larger than a gray threshold value in the video frame to be processed as a highlight region in the video frame to be processed.

In one possible implementation, the second determining module 93 is configured to: and determining a flash area in the video frame to be processed according to the intersection area of the edge area and the highlight area.

In one possible implementation, the second determining module 93 is configured to: determining the intersection area of the edge area and the highlight area as a flash area in the video frame to be processed; or determining a region with an area larger than a second area threshold in an intersection region of the edge region and the highlight region as a flash region in the video frame to be processed.

Fig. 10 shows an exemplary block diagram of a video processing apparatus according to an embodiment of the present disclosure. As shown in fig. 10:

in one possible implementation, the superposition module 94 includes: a scanning sub-module 941, configured to scan a video frame to be processed by using a scanning line; an obtaining sub-module 942 configured to obtain positions of two intersections of a boundary line between the first scan line and the first flash region if the first scan line passes through the first flash region; a first superimposing submodule 943 is configured to superimpose the flash image layer for the first flash region according to the positions of the two intersection points.

In one possible implementation, the first stacking sub-module 943 includes: the determining unit is used for determining the size of a flash layer corresponding to the first flash region according to the distance between the two intersection points; and the superposition unit is used for taking the middle point of the two intersection points as the geometric center of the flash layer and superposing the flash layer aiming at the first flash region according to the size of the flash layer corresponding to the first flash region.

In one possible implementation, the superposition module 94 is configured to: and superposing the flash image layer in the video frame to be processed in a color filtering mode according to the position of the flash area.

In one possible implementation, the superposition module 94 includes: a determining sub-module 944, configured to determine a flash layer corresponding to the video frame to be processed; and a second superimposing submodule 945, configured to superimpose, in the to-be-processed video frame, a flash layer corresponding to the to-be-processed video frame according to the position of the flash region.

In one possible implementation, the determination submodule 944 is configured to: and determining a flash layer corresponding to the video frame to be processed from the flash layer sequence according to the flash period, the number of flash layers in the flash layer sequence and the frame number of the video frame to be processed in the video.

Embodiments of the present disclosure also provide a computer-readable storage medium having stored thereon computer program instructions, which when executed by a processor, implement the above-mentioned method. The computer readable storage medium may be a non-volatile computer readable storage medium.

An embodiment of the present disclosure further provides an electronic device, including: a processor; a memory for storing processor-executable instructions; wherein the processor is configured as the above method.

The electronic device may be provided as a terminal, server, or other form of device.

Fig. 11 is a block diagram illustrating an electronic device 800 in accordance with an example embodiment. For example, the electronic device 800 may be a mobile phone, a computer, a digital broadcast terminal, a messaging device, a game console, a tablet device, a medical device, a fitness device, a personal digital assistant, or the like terminal.

Referring to fig. 11, electronic device 800 may include one or more of the following components: processing component 802, memory 804, power component 806, multimedia component 808, audio component 810, input/output (I/O) interface 812, sensor component 814, and communication component 816.

The processing component 802 generally controls overall operation of the electronic device 800, such as operations associated with display, telephone calls, data communications, camera operations, and recording operations. The processing components 802 may include one or more processors 820 to execute instructions to perform all or a portion of the steps of the methods described above. Further, the processing component 802 can include one or more modules that facilitate interaction between the processing component 802 and other components. For example, the processing component 802 can include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.

The memory 804 is configured to store various types of data to support operations at the electronic device 800. Examples of such data include instructions for any application or method operating on the electronic device 800, contact data, phonebook data, messages, pictures, videos, and so forth. The memory 804 may be implemented by any type or combination of volatile or non-volatile memory devices such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic or optical disks.

The power supply component 806 provides power to the various components of the electronic device 800. The power components 806 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device 800.

The multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and a user. In some embodiments, the screen may include a Liquid Crystal Display (LCD) and a Touch Panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive an input signal from a user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundary of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front facing camera and/or a rear facing camera. The front camera and/or the rear camera may receive external multimedia data when the electronic device 800 is in an operation mode, such as a shooting mode or a video mode. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

The audio component 810 is configured to output and/or input audio signals. For example, the audio component 810 includes a Microphone (MIC) configured to receive external audio signals when the electronic device 800 is in an operational mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signals may further be stored in the memory 804 or transmitted via the communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

The I/O interface 812 provides an interface between the processing component 802 and peripheral interface modules, which may be keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

The sensor assembly 814 includes one or more sensors for providing various aspects of state assessment for the electronic device 800. For example, the sensor assembly 814 may detect an open/closed state of the electronic device 800, the relative positioning of components, such as a display and keypad of the electronic device 800, the sensor assembly 814 may also detect a change in the position of the electronic device 800 or a component of the electronic device 800, the presence or absence of user contact with the electronic device 800, orientation or acceleration/deceleration of the electronic device 800, and a change in the temperature of the electronic device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of a nearby object without any physical contact. The sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 may also include an acceleration sensor, a gyroscope sensor, a magnetic sensor, a pressure sensor, or a temperature sensor.

The communication component 816 is configured to facilitate wired or wireless communication between the electronic device 800 and other devices. The electronic device 800 may access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 further includes a Near Field Communication (NFC) module to facilitate short-range communications. For example, the NFC module may be implemented based on Radio Frequency Identification (RFID) technology, infrared data association (IrDA) technology, Ultra Wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

In an exemplary embodiment, the electronic device 800 may be implemented by one or more Application Specific Integrated Circuits (ASICs), Digital Signal Processors (DSPs), Digital Signal Processing Devices (DSPDs), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs), controllers, micro-controllers, microprocessors or other electronic components for performing the above-described methods.

In an exemplary embodiment, a non-transitory computer-readable storage medium, such as the memory 804, is also provided that includes computer program instructions executable by the processor 820 of the electronic device 800 to perform the above-described methods.

Fig. 12 is a block diagram illustrating an electronic device 1900 according to an example embodiment. For example, the electronic device 1900 may be provided as a server. Referring to fig. 12, electronic device 1900 includes a processing component 1922 further including one or more processors and memory resources, represented by memory 1932, for storing instructions, e.g., applications, executable by processing component 1922. The application programs stored in memory 1932 may include one or more modules that each correspond to a set of instructions. Further, the processing component 1922 is configured to execute instructions to perform the above-described method.

The electronic device 1900 may also include a power component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input/output (I/O) interface 1958. The electronic device 1900 may operate based on an operating system stored in memory 1932, such as Windows Server, Mac OS XTM, UnixTM, LinuxTM, FreeBSDTM, or the like.

In an exemplary embodiment, a non-transitory computer readable storage medium, such as the memory 1932, is also provided that includes computer program instructions executable by the processing component 1922 of the electronic device 1900 to perform the above-described methods.

The present disclosure may be systems, methods, and/or computer program products. The computer program product may include a computer-readable storage medium having computer-readable program instructions embodied thereon for causing a processor to implement various aspects of the present disclosure.

The computer readable storage medium may be a tangible device that can hold and store the instructions for use by the instruction execution device. The computer readable storage medium may be, for example, but not limited to, an electronic memory device, a magnetic memory device, an optical memory device, an electromagnetic memory device, a semiconductor memory device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a Static Random Access Memory (SRAM), a portable compact disc read-only memory (CD-ROM), a Digital Versatile Disc (DVD), a memory stick, a floppy disk, a mechanical coding device, such as punch cards or in-groove projection structures having instructions stored thereon, and any suitable combination of the foregoing. Computer-readable storage media as used herein is not to be construed as transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., optical pulses through a fiber optic cable), or electrical signals transmitted through electrical wires.

The computer-readable program instructions described herein may be downloaded from a computer-readable storage medium to a respective computing/processing device, or to an external computer or external storage device via a network, such as the internet, a local area network, a wide area network, and/or a wireless network. The network may include copper transmission cables, fiber optic transmission, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. The network adapter card or network interface in each computing/processing device receives computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in a computer-readable storage medium in the respective computing/processing device.

The computer program instructions for carrying out operations of the present disclosure may be assembler instructions, Instruction Set Architecture (ISA) instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source or object code written in any combination of one or more programming languages, including an object oriented programming language such as Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The computer-readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider). In some embodiments, the electronic circuitry that can execute the computer-readable program instructions implements aspects of the present disclosure by utilizing the state information of the computer-readable program instructions to personalize the electronic circuitry, such as a programmable logic circuit, a Field Programmable Gate Array (FPGA), or a Programmable Logic Array (PLA).

Various aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer-readable program instructions.

These computer-readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer-readable program instructions may also be stored in a computer-readable storage medium that can direct a computer, programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer-readable medium storing the instructions comprises an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.

The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer, other programmable apparatus or other devices implement the functions/acts specified in the flowchart and/or block diagram block or blocks.

The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Having described embodiments of the present disclosure, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terms used herein were chosen in order to best explain the principles of the embodiments, the practical application, or technical improvements to the techniques in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A video processing method, comprising:

performing edge detection on a video frame to be processed of a video, and determining an edge area in the video frame to be processed, wherein the edge area in the video frame to be processed represents an area where an edge in the video frame to be processed is located;

determining a highlight area in the video frame to be processed;

2. The method of claim 1, wherein determining the highlight region in the video frame to be processed comprises:

3. The method of claim 2, wherein determining the highlight region in the video frame to be processed according to the region of the video frame to be processed whose gray value is greater than the gray threshold comprises:

4. The method of claim 1, wherein determining a flash region in the video frame to be processed according to the edge region and the highlight region comprises:

5. The method according to claim 4, wherein determining the flash region in the video frame to be processed according to the intersection region of the edge region and the highlight region comprises:

6. The method according to any one of claims 1 to 5, wherein superimposing a flash layer in the video frame to be processed according to the position of the flash region comprises:

scanning the video frame to be processed by adopting a scanning line;

7. The method according to claim 6, wherein superimposing a flash layer for the first flash region according to the position of the two intersection points comprises:

8. The method according to any one of claims 1 to 5, wherein superimposing a flash layer in the video frame to be processed according to the position of the flash region comprises:

9. The method according to any one of claims 1 to 5, wherein superimposing a flash layer in the video frame to be processed according to the position of the flash region comprises:

determining a flash layer corresponding to the video frame to be processed;

10. The method according to claim 9, wherein determining the flash image layer corresponding to the video frame to be processed comprises:

11. A video processing apparatus, comprising:

the edge detection module is used for carrying out edge detection on a video frame to be processed of a video and determining an edge area in the video frame to be processed, wherein the edge area in the video frame to be processed represents an area where an edge in the video frame to be processed is located;

12. The apparatus of claim 11, wherein the first determining module is configured to:

13. The apparatus of claim 12, wherein the first determining module is configured to:

14. The apparatus of claim 11, wherein the second determining module is configured to:

15. The apparatus of claim 14, wherein the second determining module is configured to:

16. The apparatus of any one of claims 11 to 15, wherein the superposition module comprises:

17. The apparatus of claim 16, wherein the first superposition sub-module comprises:

18. The apparatus of any one of claims 11 to 15, wherein the superposition module is configured to:

19. The apparatus of any one of claims 11 to 15, wherein the superposition module comprises:

20. The apparatus of claim 19, wherein the determination submodule is configured to:

21. An electronic device, comprising:

a processor;

a memory for storing processor-executable instructions;

wherein the processor is configured to: performing the method of any one of claims 1 to 10.

22. A computer readable storage medium having computer program instructions stored thereon, which when executed by a processor implement the method of any one of claims 1 to 10.