CN109031368B - Method for reading GPS receiving output effective data by combining PPS signal - Google Patents

Method for reading GPS receiving output effective data by combining PPS signal Download PDF

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CN109031368B
CN109031368B CN201810794511.3A CN201810794511A CN109031368B CN 109031368 B CN109031368 B CN 109031368B CN 201810794511 A CN201810794511 A CN 201810794511A CN 109031368 B CN109031368 B CN 109031368B
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signal
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CN109031368A (en
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魏东兴
王诗涵
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Dalian University of Technology
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/35Constructional details or hardware or software details of the signal processing chain
    • G01S19/37Hardware or software details of the signal processing chain

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  • Signal Processing (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)

Abstract

The invention discloses a method for reading effective data of a GPS receiver by combining PPS signals, which comprises the steps of firstly reading PPS signals; judging the input PPS signal through a GPIO port line of a micro control unit MCU for detecting the PPS signal level; when the PPS signal is in an effective state; when the PPS signal is in an invalid state; starting UART receiving interruption of an asynchronous receiving and transmitting transmitter, and reading GPS data output by a GPS receiver by a data receiving RXD pin of the UART; judging the level of the PPS signal; if the level is a rising edge, the receiving is finished; if the level is a falling edge; and closing UART receiving interruption, and processing the data received and output by the GPS through the MCU. The invention avoids that the MCU continuously enters the UART for receiving and interrupts the receiving of all data for state detection on the GPS data receiving, thereby wasting working time and avoiding other invalid data and data required by non-functions from occupying storage space.

Description

Method for reading GPS receiving output effective data by combining PPS signal
Technical Field
The invention relates to a method for reading GPS receiving and outputting effective data by combining PPS signals, belonging to the field of signal receiving and processing.
Background
At present, the civil GPS receiving module is relatively mature in application, and GPS data can be output in an NMEA-0183 protocol format through a GPS receiving module packaged by a manufacturer through simple circuit construction. The serial data format generated by the GPS receiving module can be directly read by adopting an interrupt mode or an inquiry mode through the UART of the MCU.
A method for obtaining high-precision time in the prior art comprises the steps that when a CPU of a time server receives a rising edge of a PPS (pulse per second) sent by a satellite receiving card, a time processing program is started, the time difference between a real-time clock and the satellite receiving card is calculated, when the next PPS arrives, the CPU sets the sum of the time of the real-time clock chip and the time difference obtained in the last step in the time processing program into the real-time clock chip to finish time correction once, the error generated by time delay is eliminated, time and moment information provided by a GPS (global positioning system) receiving module are converted into the time of the time server, and the time server can obtain the high-precision time.
Conventionally, the MCU can read the GPS data through the UART in an interrupt mode or an inquiry mode, both of which require the MCU to receive all the data output by the GPS receiving module and then determine whether the positioning status in the corresponding data frame is a (valid), thereby determining whether to continue data processing. Both of these modes of operation suffer from the following disadvantages: the data receiving process needs continuous intervention of a corresponding program of the MCU, if the GPS receiving module is not positioned and the output data is invalid, the data reading operation of the MCU is also invalid, which occupies the working time of the MCU and influences the operation of other programs of the MCU; the NMEA-0183 protocol data frame output by the GPS receiving module comprises six formats of data of GGA, GLL, GSA, GSV, RMC and VTG, the maximum data volume is about 500 bytes, and in the receiving process, the MCU needs to store all the data every time the GPS data is refreshed, so that invalid data output by the GPS receiving module when the GPS receiving module is not positioned continuously occupies the storage space of the MCU.
Disclosure of Invention
In light of the above-identified problems, a method for reading GPS receiver valid data in conjunction with PPS signals is provided. The invention mainly utilizes a GPIO port line of a micro control unit MCU for detecting the PPS signal level to judge the input PPS signal, thereby avoiding that the MCU continuously enters a UART for receiving and interrupts to receive all data to carry out state detection on GPS data reception, thereby avoiding wasting working time and avoiding other invalid data and data required by non-functions from occupying storage space.
The invention comprises a method for reading effective data of a GPS receiver by combining PPS signals, which is characterized by comprising the following steps: s1: reading a Pulse Per Second (PPS) signal; s2: judging the input PPS signal through a bus expander GPIO port line of a micro control unit MCU for detecting the PPS signal level; when the PPS signal is in the active state, step S3 is executed; when the PPS signal is in the inactive state, step S1 is executed; s3: starting UART receiving interruption of an asynchronous receiving and transmitting transmitter, and reading GPS data output by a GPS receiver by a data receiving RXD pin of the UART; s4: judging the level of the PPS signal; if the level is a rising edge, the reception is finished, and step S5 is executed; if the level is a falling edge, performing step S3; s5: and closing UART receiving interruption, and processing the data received and output by the GPS through the MCU.
Further, judging the input PPS signal, and if the input PPS signal is at a low level, entering an initial state M0 of a Finite State Machine (FSM); if the level is raised, the state is entered from M0 to M1;
furthermore, when the high-level retention time of the PPS signal is less than or equal to 1s and the time when the level starts to fall is marked as t2, the state is entered from M1 to M2, the positioning state of the GPS data is determined to be the preliminary valid state a, and when the high-level retention time of the PPS signal is greater than 1s, the initial state M0 is returned;
further, in the state M2, if the difference between the next pulse time t3 and the previous pulse time t1 is 1s, the state M3 is entered, and if the difference between the next pulse time t3 and the previous pulse time t1 is greater than or less than 1s, the state returns to the initial state M0;
further, in the state M3, if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is 1s, the state M4 is entered, and if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is greater than or less than 1s, the state returns to the initial state M0.
Further, the finite state machine FSM includes M0-M4 states;
the M0 is in an initial state, the PPS signal is in a low level, and the GPS signal is in an invalid state V; the M1 is the 1 st rising edge of the PPS signal, the PPS signal is in a high level, and the GPS signal is in an invalid state V; the M2 is the end of the 1 st pulse of the PPS signal and is at low level, and the GPS signal is in a preliminary effective state A; the M3 is the 2 nd rising edge of the PPS signal, the PPS signal is at a high level, and the GPS signal is in an invalid state V; the M4 signal is a low level after the end of the 2 nd pulse, and the GPS signal is in the confirmation valid state a.
Further, the FSM state trigger conditions are:
when the PPS signal level changes from low to high, it is denoted as t 1;
when the high level of the PPS signal is kept for time t1 less than 1s, the level is reduced, and the reduction time is recorded as t 2;
when the high level of the PPS signal is kept for t1 to be more than or equal to 1s, the level is reduced, and the reduction time is recorded as t 2;
when the PPS signal level rises, the rising time is marked as t3, and the time difference t3-t1 from the previous level is 1 s;
when the PPS signal level rises, the rising time is recorded as t3, and the time difference from the previous level rising time is t3-t1 & gt 1 s;
when the PPS signal level is reduced, the time difference t4-t2 from the previous level reduction time is 1s, and the time of the reduction is marked as t 4;
when the PPS signal level is reduced, the reduction time is recorded as t4, and the time difference t4-t2 is more than 1s from the previous level reduction.
Further, the MCU adopts an STM32F103VCT6 chip of a Cortex-M3 framework, a general GPIO port line of the chip is used as an input pin to receive a PPS signal of the GPS receiving module, and the UART of the chip realizes receiving and buffering NMEA-0183 protocol data.
The invention has the advantages that: the UART communication mode of the invention is provided with UART working baud rate which is the same as the working baud rate of the GPS receiving module and is 9600bps, NMEA-0183 protocol data calculation, and the time required for transmitting 1 frame of protocol data by UART is about 520 ms. In the invention, the communication between the MCU and the GPS receiving module is started only after the GPIO port line detects that the PPS signal is in the state S4 (namely, the valid state A is confirmed), and the mode avoids the phenomenon that the MCU continuously enters UART receiving on the GPS data receiving to interrupt the receiving of all data to carry out state detection, thereby wasting working time.
Further, for GPS data, the maximum data volume of a returned NMEA-0183 protocol data frame is about 500 bytes, after the positioning state of the GPS data is judged to be a confirmed valid state A, the MCU starts the UART to receive, interrupt and receive and store the data for subsequent processing, the processing method for ensuring that the stored data is valid can prevent the storage space of the MCU from being largely occupied by invalid data, the MCU directly screens the read valid data to obtain required data, and other invalid data and non-functional required data can not occupy the storage space.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions of the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic overall flow chart of the present invention.
Fig. 2 is a block diagram of an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the following describes the technical solutions of the embodiments of the present invention clearly and completely with reference to the accompanying drawings in the embodiments of the present invention:
as shown in fig. 1-2, a method for reading valid data of a GPS receiver in combination with a PPS signal according to the present invention comprises the following steps:
in the present embodiment, step S1: reading a Pulse Per Second (PPS) signal; s2: judging an input PPS signal through a GPIO port line of a micro control unit MCU for detecting the PPS signal level; when the PPS signal is in the active state, step S3 is executed; when the PPS signal is in the inactive state, step S1 is executed; s3: starting UART receiving interruption of an asynchronous receiving and transmitting transmitter, and reading GPS data output by a GPS receiver by a data receiving RXD pin of the UART; s4: judging the level of the PPS signal; if the level is a rising edge, the reception is finished, and step S5 is executed; if the level is a falling edge, go to step S3; s5: and turning off the UART receiving interrupt, and processing the data output by the GPS through the MCU. It is understood that in other embodiments, the MCU may adopt other control units as long as the pps signal can be processed and determined.
In a preferred embodiment, the input PPS signal is judged, and if the input PPS signal is at a low level, the PPS signal enters an initial state M0 of a finite state machine FSM; if the level is raised, the state goes from M0 to M1.
In a preferred embodiment, when the high-level retention time of the PPS signal is less than or equal to 1s and the time when the level starts to fall is t2, the state is entered from M1 to M2, the positioning state of the GPS data is determined to be the preliminary valid state a, and when the high-level retention time of the PPS signal is greater than 1s, the initial state M0 is returned.
In a preferred embodiment, in state M2, when the difference between the next pulse time t3 and the previous pulse time t1 is 1s, the state M3 is entered, and when the difference between the next pulse time t3 and the previous pulse time t1 is greater than or less than 1s, the state returns to the initial state M0.
In a preferred embodiment, in the state M3, if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is 1s, the state M4 is entered, and if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is greater than or less than 1s, the state returns to the initial state M0.
As a preferred embodiment, the finite state machine FSM includes M0-M4 states; m0 is an initial state, the PPS signal is low level, and the GPS signal is in an invalid state V; m1 is the 1 st rising edge of the PPS signal, the PPS signal is high, and the GPS signal is in the inactive state V; m2 is the end of the 1 st pulse of the PPS signal and is low level, the GPS signal is in the preliminary effective state A; m3 is the 2 nd rising edge of the PPS signal, the PPS signal is high, and the GPS signal is in the inactive state V; m4 is the PPS signal at low level after the end of the 2 nd pulse, and the GPS signal is in the validation state a.
As a preferred embodiment, the FSM state trigger conditions are: when the PPS signal level is changed from low to high, at this time, the signal level is marked as t1, and FSM triggers; when the high level of the PPS signal is kept for a time T1 less than 1s, the level is reduced, and the reduction time is recorded as T2; when the high level holding time T1 of the PPS signal is more than or equal to 1s, the level is reduced, and the reduction time is marked as T2; when the PPS signal level rises, the rising time is marked as t3, and the time difference t3-t1 from the previous level is 1 s; when the PPS signal level rises, the rising time is recorded as t3, and the time difference from the previous level rising time is t3-t1 & gt 1 s; when the PPS signal level is reduced, the time difference t4-t2 from the previous level reduction time is 1s, and the time of the reduction is marked as t 4; when the PPS signal level is reduced, the reduction time is recorded as t4, and the time difference t4-t2 is more than 1s from the previous level reduction.
As a preferred embodiment, the MCU adopts an STM32F103VCT6 chip of Cortex-M3 architecture, a GPIO port line commonly used by the chip is used as an input pin, receives a PPS signal of a GPS receiving module, and the UART of the chip realizes receiving and buffering NMEA-0183 protocol data. It is understood that in other embodiments, the MCU may be of other types and configurations as long as it can accept GPS signals.
Fig. 2 shows an embodiment of the present application, which includes a provided circuit module structure diagram, a GPS receiving module circuit, an MCU chip, a power module, and a clock circuit.
In this embodiment, the GPS receiving module circuit includes an integrated GPS receiving module, an active antenna circuit; the GPS receiving module can work independently and output standard NMEA-0183 protocol data through a serial data I/O port, and the baud rate is 9600 bps. It is understood that in other embodiments, other models of GPS receiving module may be used.
In the embodiment, the MCU chip adopts an STM32F103VCT6 chip with a Cortex-M3 framework, a general GPIO port line of the chip is connected with a PPS signal of a GPS receiving module and used for detecting the level of the PPS signal, and the receiving and the caching of NMEA-0183 protocol data are realized through a UART of the chip. In this embodiment, the power module includes 3 SPX5205 voltage conversion chips and its working configuration circuit, and converts 5.0V voltage into 3.3V voltage to provide working power for the MCU and the GPS receiving module. In this embodiment, the clock circuit of the MCU is an 8MHz crystal oscillator circuit, and provides an external input clock source for the STM32 chip.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims (4)

1. A method for reading GPS reception output valid data in combination with a PPS signal, comprising the steps of:
s1: reading a Pulse Per Second (PPS) signal;
s2: judging the input PPS signal through a bus expander GPIO port line of a micro control unit MCU for detecting the PPS signal level; when the PPS signal is in the active state, step S3 is executed; when the PPS signal is in the inactive state, step S1 is executed;
s3: starting UART receiving interruption of an asynchronous receiving and transmitting transmitter, and reading GPS data output by a GPS receiver by a data receiving RXD pin of the UART;
s4: judging the level of the PPS signal; if the level is a rising edge, the reception is finished, and step S5 is executed; if the level is a falling edge, performing step S3;
s5: closing UART receiving interruption, and processing the data received and output by the GPS through the MCU;
judging the input PPS signal, and if the input PPS signal is at a low level, entering an initial state M0 of a Finite State Machine (FSM); if the level is raised, the state is entered from M0 to M1;
when the high level holding time of the PPS signal is less than or equal to 1s and the time when the level starts to decline is marked as t2, the state is entered into M2 from M1, the positioning state of the GPS data is judged to be a preliminary effective state A, and when the high level holding time of the PPS signal is more than 1s, the initial state M0 is returned;
in the state M2, if the difference between the next pulse time t3 and the previous pulse time t1 is 1s, the state M3 is entered, and if the difference between the next pulse time t3 and the previous pulse time t1 is greater than or less than 1s, the state returns to the initial state M0;
in the state M3, if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is 1s, the state M4 is entered, and if the difference between the PPS signal level lowering time t4 and the previous level lowering time t2 is greater than or less than 1s, the state returns to the initial state M0.
2. A method of reading GPS receiver output valid data in conjunction with a PPS signal as recited in claim 1, further characterized by:
the finite state machine FSM includes M0-M4 states;
the M0 is in an initial state, the PPS signal is in a low level, and the GPS signal is in an invalid state V;
the M1 is the 1 st rising edge of the PPS signal, the PPS signal is at a high level, and the GPS signal is in an invalid state V;
the M2 is the end of the 1 st pulse of the PPS signal and is at low level, and the GPS signal is in a preliminary effective state A;
the M3 is the 2 nd rising edge of the PPS signal, the PPS signal is at a high level, and the GPS signal is in an invalid state V;
the M4 signal is a low level after the end of the 2 nd pulse, and the GPS signal is in the confirmation valid state a.
3. A method of reading GPS receiver output valid data in conjunction with a PPS signal as recited in claim 1, further characterized by:
the FSM state trigger conditions are as follows:
when the PPS signal level is changed from low to high, at this time, the signal level is marked as t1, and FSM triggers;
when the high level of the PPS signal is kept for time t1 less than 1s, the level is reduced, and the reduction time is recorded as t 2;
when the high level of the PPS signal is kept for t1 to be more than or equal to 1s, the level is reduced, and the reduction time is recorded as t 2;
when the PPS signal level rises, the rising time is marked as t3, and the time difference t3-t1 from the previous level is 1 s;
when the PPS signal level rises, the rising time is recorded as t3, and the time difference from the previous level rising time is t3-t1 & gt 1 s;
when the PPS signal level is reduced, the time difference t4-t2 from the previous level reduction time is 1s, and the time of the reduction is marked as t 4;
when the PPS signal level is reduced, the reduction time is recorded as t4, and the time difference t4-t2 is more than 1s from the previous level reduction.
4. A method of reading GPS receiver output valid data in conjunction with a PPS signal as recited in claim 1, further characterized by:
the MCU adopts STM32F103VCT6 chip of Cortex-M3 framework, the general GPIO mouth line of chip is as input pin, receives the PPS signal of GPS receiving module, the UART of chip realizes receiving and buffering NMEA-0183 agreement data.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110085744A (en) * 2010-01-21 2011-07-27 현대모비스 주식회사 Appartus and method for executing global positioning system/dead reckoning algorithm
CN102156404A (en) * 2010-12-16 2011-08-17 国网电力科学研究院 Time synchronizing method capable of recognizing GPS input signals in self-adapting manner
CN103616814A (en) * 2013-12-09 2014-03-05 东南大学 Synchronous sampling clock closed loop correcting method and system based on FPGA
CN106788843A (en) * 2016-12-09 2017-05-31 中北大学 A kind of GPS synchronous method of distributed test system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20110085744A (en) * 2010-01-21 2011-07-27 현대모비스 주식회사 Appartus and method for executing global positioning system/dead reckoning algorithm
CN102156404A (en) * 2010-12-16 2011-08-17 国网电力科学研究院 Time synchronizing method capable of recognizing GPS input signals in self-adapting manner
CN103616814A (en) * 2013-12-09 2014-03-05 东南大学 Synchronous sampling clock closed loop correcting method and system based on FPGA
CN106788843A (en) * 2016-12-09 2017-05-31 中北大学 A kind of GPS synchronous method of distributed test system

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
INS/Ultrasound navigation system;Patricio Moreno等;《2015 Sixth Argentine Conference on Embedded Systems (CASE)》;20151012;第1-6页 *
基于CPLD的时间信号精确同步研究;周永亮等;《石油天然气学报》;20110415(第04期);摘要,第105页倒数第1段,第106页第1-3段,第107页倒数第1-4段及图1-3 *
基于FPGA的GPS同步时钟***设计;郑恭明等;《桂林理工大学学报》;20150215(第01期);第200-203页 *
基于GPS实现电力***高精度同步时钟;蒋陆萍等;《电网技术》;20110205(第02期);第207-212页 *

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