CN109004081A - With the double cofferdam of extension, metal column and encapsulating structure of scolding tin and preparation method thereof - Google Patents
With the double cofferdam of extension, metal column and encapsulating structure of scolding tin and preparation method thereof Download PDFInfo
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- CN109004081A CN109004081A CN201810910184.3A CN201810910184A CN109004081A CN 109004081 A CN109004081 A CN 109004081A CN 201810910184 A CN201810910184 A CN 201810910184A CN 109004081 A CN109004081 A CN 109004081A
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- cofferdam
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- chip
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- 239000002184 metal Substances 0.000 title claims abstract description 75
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 75
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 title claims abstract description 73
- 238000002360 preparation method Methods 0.000 title abstract description 4
- 239000000758 substrate Substances 0.000 claims abstract description 124
- 238000004519 manufacturing process Methods 0.000 claims abstract description 38
- 238000007747 plating Methods 0.000 claims description 81
- 238000004806 packaging method and process Methods 0.000 claims description 61
- 229920002120 photoresistant polymer Polymers 0.000 claims description 27
- 238000003384 imaging method Methods 0.000 claims description 19
- 238000005538 encapsulation Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 abstract description 17
- 230000008569 process Effects 0.000 abstract description 14
- 239000000126 substance Substances 0.000 abstract description 13
- 239000010949 copper Substances 0.000 description 83
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 79
- 229910052802 copper Inorganic materials 0.000 description 79
- 241000208340 Araliaceae Species 0.000 description 32
- 235000005035 Panax pseudoginseng ssp. pseudoginseng Nutrition 0.000 description 32
- 235000003140 Panax quinquefolius Nutrition 0.000 description 32
- 235000008434 ginseng Nutrition 0.000 description 32
- 238000000465 moulding Methods 0.000 description 19
- 239000000463 material Substances 0.000 description 16
- 125000004122 cyclic group Chemical group 0.000 description 15
- 230000000694 effects Effects 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 230000006872 improvement Effects 0.000 description 9
- 238000010897 surface acoustic wave method Methods 0.000 description 8
- 230000005540 biological transmission Effects 0.000 description 7
- 230000007704 transition Effects 0.000 description 7
- 239000011248 coating agent Substances 0.000 description 6
- 238000000576 coating method Methods 0.000 description 6
- 238000005476 soldering Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 230000005611 electricity Effects 0.000 description 5
- 238000005516 engineering process Methods 0.000 description 5
- 230000033001 locomotion Effects 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 4
- 238000009826 distribution Methods 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- 239000011810 insulating material Substances 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 230000011218 segmentation Effects 0.000 description 4
- 230000008901 benefit Effects 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000012536 packaging technology Methods 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 125000002619 bicyclic group Chemical group 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 230000001413 cellular effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 235000021384 green leafy vegetables Nutrition 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 230000009466 transformation Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/88—Mounts; Supports; Enclosures; Casings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/02—Forming enclosures or casings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/01—Manufacture or treatment
- H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N30/00—Piezoelectric or electrostrictive devices
- H10N30/80—Constructional details
- H10N30/87—Electrodes or interconnections, e.g. leads or terminals
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
Abstract
Present invention discloses a kind of with double cofferdam, metal column and encapsulating structure of scolding tin and preparation method thereof is extended, and encapsulating structure includes: package substrate, and the side of base lower surface has several external pins；Filter chip, chip lower surface have several electrodes；Cofferdam；Package substrate has several through-holes passed through for several interconnection structures, cofferdam includes the first cofferdam on the inside of through-hole and the second cofferdam on the outside of through-hole, first cofferdam and chip lower surface and upper surface of base plate cooperate and enclose to set to form cavity, interconnection structure includes metal column structures, scolding tin and electroplated layer structure, metal column structures conduction electrode, external pin is connected in electroplated layer structure, and scolding tin is for being connected metal column structures and electroplated layer structure.The present invention forms cavity by setting cofferdam, avoids in encapsulating structure manufacturing process or in encapsulating structure use process external substance from entering cavity inside and influences the normal use of filter chip, to improve the overall performance of encapsulating structure.
Description
Technical field
The present invention relates to field of semiconductor package more particularly to a kind of envelopes with the double cofferdam of extension, metal column and scolding tin
Assembling structure and preparation method thereof.
Background technique
RF IC (RFIC) is widely used in wireless device, for example, cellular telephone.
RFIC is on matrix the discrete of transmission line, matching network and inductance coil, resistance, capacitor and transistor etc
Element is combined together the subsystem for providing and capable of transmitting and receive high-frequency signal, for example, in about 0.1 to 100 gigabits
In the range of conspicuous (GHz), the encapsulation of RFIC differs markedly from the encapsulation of digital integrated electronic circuit, because the encapsulation is often radio frequency electrical
The a part on road, moreover, because the rf electric field and/or magnetic field energy of RFIC complexity and any neighbouring insulator and conductor are mutual
Effect, in order to meet wireless industrial increasing demand, RFIC encapsulation development is tried to provide more small and exquisite, more cheap, performance more
High adapts to the device of more bare die radio-frequency modules, while providing higher reliability and using unleaded solder and other " greens
" material.The one chip encapsulation that single or multiple bare die RFIC is encapsulated individually is to solve the small size and inexpensive demand of RFIC
Direct solution, and be used for most of RFIC now.
Microelectromechanical systems (MEMS) permits the controlled conversion between miniature scale mechanical movement and specified electric signal,
For example, consistent with specified frequency, MEMS is being widely used for RFIC.
Based on mechanical movement, RF MEMS is able to achieve fabulous signal quality for radio frequency band filter, and citing comes
It says, SAW filter converts electrical signals into mechanical wave, and the latter propagates before its converted back into electric signals along piezo-electric crystal matrix
When be delayed by；BAW filter realizes expected special resonance using volume mass motion；And in RF switch, electric signal
For controlling the movement of microelectrode, switch is opened or closed.
Present MEMS technology grows up from semiconductor fabrication process, however, mechanical fortune associated with MEMS
Dynamic packaging structure and the requirement for requiring to be totally different from traditional semiconductor integrated circuit, specifically, in all MEMS collection
Inside circuit, some materials must be moved freely uninterruptedly, and therefore, MEMS integrated circuit must be shielded in movement material
Small vacuum or air pocket are formed around material to allow them to move while to protect them.
And in the prior art, a closing and reliable cavity can not be formed to realize the protection of circuit or other structures.
Summary of the invention
The purpose of the present invention is to provide a kind of with the double cofferdam of extension, the encapsulating structure of metal column and scolding tin and its production
Method.
One of for achieving the above object, an embodiment of the present invention provides a kind of with extension double cofferdam, metal column
And the encapsulating structure of scolding tin, comprising:
Package substrate has upper surface of base plate and base lower surface to setting, and the side of the base lower surface has
It is several outer
Portion's pin；
Filter chip, has the chip upper surface that is oppositely arranged and a chip lower surface, the chip lower surface with it is described
Upper surface of base plate is arranged face-to-face, and the chip lower surface has several electrodes；
Several interconnection structures, for several electrodes and several external pins to be connected；
Cofferdam；
Wherein, the package substrate has several through-holes passed through for several interconnection structures, if the cofferdam includes being located at
The first cofferdam on the inside of dry through-hole and the second cofferdam on the outside of several through-holes, first cofferdam and the chip lower surface
And the upper surface of base plate cooperates and encloses to set to form cavity, the interconnection structure includes metal column structures, scolding tin and electroplated layer knot
The electrode is connected in structure, the metal column structures, and the external pin is connected in the electroplated layer structure, and the scolding tin is for being connected
The metal column structures and the electroplated layer structure.
As the further improvement of an embodiment of the present invention, the metal column structures include metal column and the conducting gold
Belong to the UBM layer of column and the electrode, the electroplated layer structure includes being covered in the through-hole wall and extending on the substrate
Surface, the base lower surface plating seed layer and be located at the plating seed layer it is outer and with the plating seed layer mutual
The electroplated layer matched, the scolding tin coat the metal column and extend to the through-hole and the plating of the through-hole wall is connected
Layer.
As the further improvement of an embodiment of the present invention, under the upper surface of the electroplated layer structure and the electrode
With overlapping region and with gap between surface.
As the further improvement of an embodiment of the present invention, the scolding tin connects the lower surface of the electrode and wraps simultaneously
Cover the UBM layer and the metal column.
As the further improvement of an embodiment of the present invention, the electroplated layer structure and the scolding tin are close to the cavity
Side connect first cofferdam, the electroplated layer structure and the scolding tin and connect described second far from the side of the cavity
Cofferdam.
As the further improvement of an embodiment of the present invention, first cofferdam and the electroplated layer structure division weight
It is folded, and second cofferdam is Chong Die with the electroplated layer structure division.
As the further improvement of an embodiment of the present invention, several through-holes, which enclose, sets the Internal periphery to be formed connection described first
Cofferdam, several through-holes, which enclose, sets the outer profile to be formed connection second cofferdam, and first cofferdam and second cofferdam are mutual
Connection.
As the further improvement of an embodiment of the present invention, direction of second cofferdam towards separate first cofferdam
The lateral border for extending up to second cofferdam is flushed with the lateral border of the package substrate.
As the further improvement of an embodiment of the present invention, the encapsulating structure further includes remote positioned at the package substrate
The plastic packaging layer of side from the base lower surface, the plastic packaging layer coat second cofferdam simultaneously and are exposed to outer upper surface
Region and the filter chip, and the encapsulating structure further includes being set to the base lower surface and exposing the outside
The soldermask layer of pin.
One of for achieving the above object, an embodiment of the present invention provides a kind of with extension double cofferdam, metal column
And the production method of the encapsulating structure of scolding tin, comprising steps of
S1: providing filter chip, has the chip upper surface being oppositely arranged and chip lower surface, the chip following table
Face has several electrodes；
S2: metal column structures are formed in the lower surface of the electrode；
S3: providing package substrate, has the upper surface of base plate and base lower surface being oppositely arranged；
S4: in forming several through-holes on the package substrate；
S5: electroplated layer is formed in the upper surface of base plate of the through-hole wall and the connection through-hole wall, base lower surface
Structure；
S6: forming cofferdam in the upper surface of base plate, the cofferdam include the first cofferdam on the inside of several through-holes and
The second cofferdam on the outside of several through-holes；
S7: the filter chip is assembled to the package substrate, the chip lower surface and the upper surface of base plate
Setting face-to-face, first cofferdam are located on the inside of several through-holes, and second cofferdam is located on the outside of several through-holes, and described the
One cofferdam and the chip lower surface and the upper surface of base plate cooperate and enclose and set to form cavity；
S8: the scolding tin that the metal column structures and the electroplated layer structure are connected is formed in the metal column structures periphery；
S9: external pin is formed below the electroplated layer structure.
As the further improvement of an embodiment of the present invention,
Step S2 is specifically included:
UBM layer and metal column are formed in the lower surface of the electrode；
Step S5 is specifically included:
Electricity is formed in the part substrate upper surface of the through-hole wall and the connection through-hole wall, whole base lower surfaces
Plate seed layer；
The second photoresist film is formed in the lower section of the plating seed layer of the base lower surface, and in second light
Photoresist film exposure and imaging forms several second holes, and second hole exposes the through-hole and plating seed layer；
Electroplated layer is formed in being exposed on outer plating seed layer；
Remove the second photoresist film；
Removal is exposed to outer plating seed layer.
Step S8, S9 is specifically included:
Plastic packaging layer is formed far from the side of the base lower surface in the package substrate, the plastic packaging layer coats institute simultaneously
It states the second cofferdam and is exposed to outer surface area and the filter chip, several metal columns and extend towards several through-holes；
Scolding tin is formed in the periphery of the metal column and the UBM layer, the scolding tin connects the electrode, and the scolding tin
Extend to the through-hole and the electroplated layer with the conducting through-hole wall；
In base lower surface formed soldermask layer, the soldermask layer coat simultaneously the base lower surface, the electroplated layer and
The scolding tin；
Several third holes are formed in the soldermask layer exposure and imaging, the third hole exposes the electroplated layer；
In forming ball grid array in several third holes.
Compared with prior art, the beneficial effects of the present invention are: present embodiments forms cavity by setting cofferdam, can
With effectively avoid in encapsulating structure manufacturing process or in encapsulating structure use process external substance enter cavity inside and
The normal use for influencing filter chip, to improve the overall performance of encapsulating structure.
Detailed description of the invention
Fig. 1 is the encapsulating structure cross-sectional view of first embodiment of the invention；
Fig. 2 is the package substrate of first embodiment of the invention and the schematic diagram in cofferdam；
Fig. 3 is the production method block diagram of the encapsulating structure of first embodiment of the invention；
Fig. 4 a- Fig. 4 v is the production method flow chart of the encapsulating structure of first embodiment of the invention；
Fig. 5 is the encapsulating structure cross-sectional view of second embodiment of the invention；
Fig. 6 is the package substrate of second embodiment of the invention and the schematic diagram in cofferdam；
Fig. 7 is the production method block diagram of the encapsulating structure of second embodiment of the invention；
Fig. 8 a- Fig. 8 u is the production method flow chart of the encapsulating structure of second embodiment of the invention；
Fig. 9 is the encapsulating structure cross-sectional view of third embodiment of the invention；
Figure 10 is the package substrate of third embodiment of the invention and the schematic diagram in cofferdam；
Figure 11 is the production method block diagram of the encapsulating structure of third embodiment of the invention；
Figure 12 a- Figure 12 w is the production method flow chart of the encapsulating structure of third embodiment of the invention；
Figure 13 is the encapsulating structure cross-sectional view of four embodiment of the invention；
Figure 14 is the package substrate of four embodiment of the invention and the schematic diagram in cofferdam；
Figure 15 is the production method block diagram of the encapsulating structure of four embodiment of the invention；
Figure 16 a- Figure 16 p is the production method flow chart of the encapsulating structure of four embodiment of the invention.
Specific embodiment
Below with reference to specific embodiment shown in the drawings, the present invention will be described in detail.But these embodiments are simultaneously
The present invention is not limited, structure that those skilled in the art are made according to these embodiments, method or functionally
Transformation is included within the scope of protection of the present invention.
In each diagram of the application, for the ease of illustration, structure or partial certain sizes can be relative to other knots
Structure or part are exaggerated, and therefore, are only used for the basic structure of the theme of diagram the application.
In addition, the term of the representation space relative position used herein such as "upper", " top ", "lower", " lower section " is
A unit as shown in the drawings or feature are described for the purpose convenient for explanation relative to another unit or feature
Relationship.The term of relative space position can be intended to include equipment in use or work other than orientation as shown in the figure not
Same orientation.For example, being described as being located at other units or feature " below " or " under " if the equipment in figure overturn
Unit will be located at other units or feature " top ".Therefore, exemplary term " lower section " can include above and below both
Orientation.Equipment can otherwise be directed (be rotated by 90 ° or other directions), and be interpreted accordingly it is used herein with it is empty
Between relevant description language.
Join Fig. 1, is the cross-sectional view with the encapsulating structure 100 for extending double cofferdam of first embodiment of the invention.
Encapsulating structure 100 includes package substrate 10, filter chip 20, several interconnection structures 30 and cofferdam 40.
Package substrate 10 has the upper surface of base plate 11 and base lower surface 12 being oppositely arranged, the side tool of package substrate 10
There are several external pins 121.
Here, package substrate 10 is the loading plate for carrying chip, and package substrate 10 can be printing made of organic resin
Circuit board is also possible to glass substrate or ceramic substrate etc..
External pin 121 can be ball grid array (Ball Grid Array, BGA), pad etc., and encapsulating structure 100 is logical
Crossing external pin 121 can be electrically connected with realizations such as other chips or substrates, and here, external pin 121 is with ball grid array 121
For, external pin 121 protrudes out the lower surface of encapsulating structure 100.
In addition, but not limited to this, outside here by taking several external pins 121 are located at the side of base lower surface 12 as an example
Portion's pin 121 may be alternatively located at other regions.
Filter chip 20 has the chip upper surface 21 and chip lower surface 22, chip lower surface 22 and base being oppositely arranged
Plate upper surface 11 is arranged face-to-face, and chip lower surface 22 has several electrodes 221.
Here, filter chip 20 can be surface acoustic wave filter chip (Surface Acoustic Wave, SAW)
Or bulk acoustic wave filter chip (Bulk Acoustic Wave, BAW), but not limited to this, 20 surface of filter chip
Active region (Active Zone) needs to work normally under the contact of no foreign object or coverage condition, that is to say, that needs
A cavity is formed in the lower section of filter chip 20 to protect the active region.
Electrode 221 protrudes out chip lower surface 22 towards the direction far from chip upper surface 21, and but not limited to this.
In general, the size of filter chip 20 is less than the size of package substrate 10.
Several interconnection structures 30 are for being connected several electrodes 221 and several external pins 121.
Cofferdam 40 includes the first cofferdam 41 and positioned at second cofferdam 42 in first cofferdam, 41 outside, the first cofferdam 41 with
Chip lower surface 22 and upper surface of base plate 11 cooperate and enclose to set to form cavity S, the work on 20 surface of cavity S respective filter chip
Property region.
Present embodiment by setting cofferdam 40 formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20 in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100.
In the present embodiment, the side of base lower surface 12 has several external pins 121, and package substrate 10, which has, to be supplied
Several through-holes 13 that several interconnection structures 30 pass through.
It should be noted that " package substrate 10 has several through-holes 13 passed through for several interconnection structures 30 " refers to interconnection
At least partly structure of structure 30 passes through corresponding through-hole 13, to realize the interconnection of electrode 221 and external pin 121.
In addition, when the lower surface area when cofferdam 40 is too small, may can not be propped up since cofferdam 40 has certain height
The cofferdam 40 of the height is supportted, collapsing phenomenon occurs so as to cause cofferdam 40, the cofferdam 40 of present embodiment includes being located at several lead to
The first cofferdam 41 and the second cofferdam 42 on the outside of several through-holes 13, cofferdam 40 of 13 inside of hole have sufficiently large following table
Face improves the stability in entire cofferdam 40；In addition 40 upper surface of cofferdam can be with the 20 lower surface region cavity S of filter chip
Outer 20 lower surface whole region of filter chip combines, and further increases the forming stability of cavity S.
In conjunction with Fig. 2, several through-holes 13 are in array distribution in upper surface of base plate 11, and have interval between adjacent through-holes 13,
There is a space, the first cofferdam 41 is located in the space, and the first cofferdam 41 is located at the interior of several through-holes 13 between two column through-holes 13
Side, the second cofferdam 42 are located at outside the space, and the second cofferdam 42 is located at the outside of several through-holes 13.
That is, several through-holes 13, which enclose, sets the first cofferdam 41 of the Internal periphery to be formed connection, several through-holes 13, which enclose, to be set to be formed
Outer profile connect the second cofferdam 42.
It should be noted that can be independent from each other between the first cofferdam 41 and the second cofferdam 42, such as the first cofferdam
41 be the first cyclic structure, and the first cyclic structure connects the inside of several through-holes 13, and the second cofferdam 42 is the second cyclic structure, the
Bicyclic structures connect the outside of several through-holes 13.
Certainly, be also possible between the first cofferdam 41 and the second cofferdam 42 it is interconnected, at this point, the first cofferdam 41 and
Interconnection is realized by third cofferdam 43 between two cofferdam 42, third cofferdam 43 is positioned at adjacent through-hole 13 between or other areas
Domain, that is to say, that cofferdam 40 at this time is covered with cavity S periphery.
In the present embodiment, chip lower surface 22 covers the upper surface in the first cofferdam 41, and chip lower surface 22 and the
The upper surface portion in two cofferdam 42 is overlapped, and upper surface of base plate 11 covers the lower surface in the first cofferdam 41 and the following table in the second cofferdam 42
Face.
Second cofferdam 42 extends up to the lateral border and package substrate in the second cofferdam 42 towards the direction far from the first cofferdam 41
10 lateral border flushes.
Cofferdam 40 is made of photaesthesia insulating materials, and but not limited to this.
In the present embodiment, encapsulating structure 100 further includes coating the second cofferdam 42 simultaneously to be exposed to outer upper surface region
The plastic packaging layer 50 of domain and filter chip 20, and plastic packaging layer 50 is located at side of the package substrate 10 far from base lower surface 12.
That is, plastic packaging layer 50 is located at the top in the second cofferdam 42 at this time, plastic packaging layer 50 is coated filter chip 20 weeks
Enclose all open areas.
Plastic packaging layer 50 can be EMC (Expoy Molding Compound) plastic packaging layer, enclose since present embodiment utilizes
Weir 40 can stop external substance to enter cavity S, without considering whether plastic packaging layer 50 can influence in cavity S because of problem of materials
Protection zone, therefore, the range of choice of 50 material of plastic packaging layer expands significantly, and then can evade the choosing of specific capsulation material
It selects, substantially widen plastic packaging making technology window and effectively reduce cost.
In the present embodiment, encapsulating structure 100 further includes being set to base lower surface 12 and exposing external pin 121
Soldermask layer 60.
Continue to join Fig. 1 and Fig. 2, in the present embodiment, interconnection structure 30 includes the metal column structures interconnected that cooperate
31 and metal-layer structure 32, external pin 121 is connected in 31 conduction electrode 221 of metal column structures, metal-layer structure 32.
Specifically, metal column structures 31 include metal column 311 and the UBM layer 312 that metal column 311 and electrode 221 is connected, gold
Belonging to layer structure 32 includes metal layer 321 and the plating seed layer 322 that metal layer 321 and metal column 311 is connected, metal-layer structure 32
Filling 13 interior zone of through-hole simultaneously extends to base lower surface 12, and the lower section of metal layer 321 connects external pin 121.
Plating seed layer 322 and the outer profile of metal layer 321 are mutually matched, plating seed layer 322 along 13 inner wall of through-hole to
Base lower surface 12 extends, and metal layer 321 is filled through-hole 13 and extended along base lower surface 12, and the lower surface of metal layer 321 is
Plane.
It should be noted that base lower surface 12 is also equipped with plating seed layer 322, metal layer far from the region of through-hole 13
321 and external pin 121.
Here, metal column 311 is copper post 311, and metal layer 321 is layers of copper 321, and UBM layer 312 and plating seed layer 322 can
Think Ti/Cu layers, but not limited to this.
For UBM layer 312 as the transition zone between copper post 311 and electrode 221, the molding that copper post 311 can be effectively reduced is difficult
Degree, improves molding, the fixed effect of copper post 311, and the electrical transmission performance between copper post 311 and electrode 221 can be improved.
Likewise, plating seed layer 322 is as between copper post 311 and layers of copper 321, between layers of copper 321 and package substrate 10
Transition zone, can be effectively reduced the molding difficulty of layers of copper 321, improve molding, the fixed effect of layers of copper 321, and copper can be improved
Electrical transmission performance between column 311 and layers of copper 321.
The cross-sectional area of UBM layer 312 is less than the surface area of electrode 221, and the cross-sectional area of copper post 311 is equal to
The intermediate region that the cross-sectional area of UBM layer 312, i.e. UBM layer 312 are laid in 221 lower surface of electrode, the corresponding UBM layer of copper post 311
312 settings.
The upper surface of metal-layer structure 32 has the groove 323 for accommodating metal column structures 31, and in the present embodiment, recessed
Slot 323 accommodates entire copper post 311 and UBM layer 312.
That is, the lower surface of the outer collar region contact electrode 221 of the upper surface of metal-layer structure 32, i.e., in addition to groove
In outside indent form, the upper surface of plating seed layer 322 is contacted with electrode 221 in 323 regions.
Metal-layer structure 32 and through-hole 13 enclose the chamber for setting and being formed and accommodating metal column structures 31, and chamber is around metal column structures
31 surrounding.
Here, the advantage that copper post 311, groove 323 and through-hole 13 are equipped with is: (1) 311 phase of groove 323 and copper post
Mutually contraposition, groove 323 play position-limiting action to copper post 311, improve aligning accuracy and final products yield in encapsulation process,
The difficulty of packaging technology is reduced, and the problem of the position of filter chip 20 is fixed, is not in die drift at this time；(2)
Copper post 311 has already taken up a part of space of through-hole 13, can reduce layers of copper when copper electroplating layer 321 in the through-hole 13 at this time
321 plating amount, reduces electroplating technique difficulty, shortens electroplating time, and then improves plating production capacity；(3) copper post 311
Appearance is significant, can be used as identification part to improve recognition efficiency, and then convenient for the detection of automatic aspect and possible defect recognition.
In the present embodiment, the outer profile of the outer profile with electrode 221 of the upper surface of metal-layer structure 32 is mutually matched.
That is, plating seed layer 322 and UBM layer 312 mutually splice and have been covered with the lower surface of electrode 221.
Metal-layer structure 32 connects the first cofferdam 41, side of the metal-layer structure 32 far from cavity S close to the side of cavity S
Connect the second cofferdam 42, i.e., be between metal-layer structure 32 and cofferdam 40 at this time it is interconnected, 32 periphery of metal-layer structure does not have
There is plastic packaging layer 50.
An embodiment of the present invention also provides a kind of production method with the encapsulating structure for extending double cofferdam, in conjunction with aforementioned
Explanation and Fig. 3, Fig. 4 a to Fig. 4 v with the encapsulating structure 100 for extending double cofferdam, production method comprising steps of
S1: ginseng Fig. 4 a provides filter chip 20, has the chip upper surface 21 being oppositely arranged and chip lower surface
22, chip lower surface 22 has several electrodes 221；
S2: ginseng Fig. 4 b to Fig. 4 g forms several first interconnection structures in the lower surface of several electrodes 221；
It is specific as follows:
Join Fig. 4 b, forms UBM layer 312 in chip lower surface 22；
Join Fig. 4 c, forms the first photoresist film 70 in the lower section of UBM layer 312；
Join Fig. 4 d, forms several first holes 71, the corresponding electricity of the first hole 71 in 70 exposure and imaging of the first photoresist film
Pole 221, and the first hole 71 exposes UBM layer 312；
Join Fig. 4 e, in forming several copper posts 311 in several first holes 71；
Join Fig. 4 f, removes the first photoresist film 70；
Join Fig. 4 g, removal is exposed to outer UBM layer 312.
S3: ginseng Fig. 4 h provides package substrate 10, has the upper surface of base plate 11 and base lower surface 12 being oppositely arranged；
S4: ginseng Fig. 4 i to Fig. 4 k, cofferdam 40 is formed in upper surface of base plate 11, cofferdam 40 includes that the first cofferdam 41 and second enclose
Weir 42；
It is specific as follows:
Join Fig. 4 i, in forming several through-holes 13 on package substrate 10；
Join Fig. 4 j, lays photaesthesia insulating film 80 in upper surface of base plate 11；
Join Fig. 4 k, forms cofferdam 40 in 11 exposure and imaging of upper surface of base plate, cofferdam 40 includes being located in several through-holes 13
First cofferdam 41 of side and the second cofferdam 42 on the outside of several through-holes 13.
It should be noted that cofferdam 40 may include the third cofferdam 43 for connecting the first cofferdam 41 and the second cofferdam 42,
That is the other surfaces region outside the region that upper surface of base plate 11 removes corresponding cavity S, corresponding through-hole 13 is respectively formed at this time
Cofferdam 40.
In addition, formed since independent package substrate 10 can be divided by the large substrates of wafer scale, it, can when forming cofferdam 40
With the multiple cofferdam 40 of straight forming on large substrates, the segmentation of large substrates is then carried out again and obtains the list with single cofferdam 40
A package substrate 10, in this way, being greatly improved packaging efficiency, certainly, cofferdam 40 is also plastic on filter chip 20.
Filter chip 20 is assembled to package substrate 10, chip lower surface 22 and 11 face of upper surface of base plate by S5: ginseng Fig. 4 l
Be provided opposite to, second cofferdam 42 is located at the outside in first cofferdam 41, and the first cofferdam 41 and chip lower surface 22 and
Upper surface of base plate 11 cooperates and encloses and set to form cavity S；
Here, the first cofferdam 41 is located at the inside of several through-holes 13, and the second cofferdam 42 is located at the outside of several through-holes 13.
S6: ginseng Fig. 4 m to Fig. 4 s forms the second interconnection structure of the first interconnection structure of conducting；
It is specific as follows:
Join Fig. 4 m, forms plastic packaging layer 50 far from the side of base lower surface 12 in package substrate 10, plastic packaging layer 50 wraps simultaneously
It covers the second cofferdam 42 and is exposed to outer surface area and filter chip 20, several copper posts 311 and extend towards several through-holes 13；
Join Fig. 4 n, forms continuous plating seed layer 322 along base lower surface 12,13 inner wall of through-hole and copper post 311；
Join Fig. 4 o, forms the second photoresist film 90 in the lower section of plating seed layer 322；
Join Fig. 4 p, forms several second holes 91 in 90 exposure and imaging of the second photoresist film, the exposure of the second hole 91 is logical
Hole 13 and plating seed layer 322；
Join Fig. 4 q, in plating fill copper layer 321 in several second holes 91；
Join Fig. 4 r, removes the second photoresist film 90；
Join Fig. 4 s, removal is exposed to outer plating seed layer 322.
S7: ginseng Fig. 4 t to Fig. 4 v forms external pin 121 at the second interconnection structure.
It is specific as follows:
Join Fig. 4 t, forms soldermask layer 60 in base lower surface 12, soldermask layer 60 coats base lower surface 12 and layers of copper simultaneously
321；
Join Fig. 4 u, forms several third holes 61 in 60 exposure and imaging of soldermask layer, third hole 61 exposes layers of copper
321；
Join Fig. 4 v, in formation ball grid array 121 in several third holes 61.
Other explanations of the production method of the encapsulating structure of present embodiment can saying with reference to above-mentioned encapsulating structure 100
Bright, details are not described herein.
Join Fig. 5, is the cross-sectional view of the encapsulating structure 100a of second embodiment of the invention.
For ease of description, present embodiment is identical with first embodiment or similar structure uses similar label,
Certainly, the structure of like numerals also can have different effects, depending on needing according to the actual situation, below other embodiments
And in this way, subsequent repeat no more.
Encapsulating structure 100a includes package substrate 10a, filter chip 20a, several interconnection structure 30a and cofferdam 40a.
Package substrate 10a has the upper surface of base plate 11a and base lower surface 12a being oppositely arranged, base lower surface 12a's
Side has several external pin 121a.
Here, package substrate 10a is the loading plate for carrying chip, and package substrate 10a can be print made of organic resin
Printed circuit board is also possible to glass substrate or ceramic substrate etc..
External pin 121a can be ball grid array (Ball Grid Array, BGA), pad etc., encapsulating structure 100a
It can be electrically connected with realizations such as other chips or substrates by external pin 121a, here, external pin 121a is with ball bar battle array
For arranging 121a, external pin 121a protrudes out the lower surface of encapsulating structure 100a.
Filter chip 20a has the chip upper surface 21a and chip lower surface 22a being oppositely arranged, chip lower surface 22a
It is arranged face-to-face with upper surface of base plate 11a, chip lower surface 22a has several electrode 221a.
Here, filter chip 20a can be surface acoustic wave filter chip (Surface Acoustic Wave, SAW)
Or bulk acoustic wave filter chip (Bulk Acoustic Wave, BAW), but not limited to this, the surface filter chip 20a
Active region (Active Zone) needs to work normally under the contact of no foreign object or coverage condition, that is to say, that needs
A cavity is formed in the lower section of filter chip 20a to protect the active region.
Electrode 221a protrudes out chip lower surface 22a towards the direction far from chip upper surface 21a, and but not limited to this.
In general, the size of filter chip 20a is less than the size of package substrate 10a.
Several interconnection structure 30a are for being connected several electrode 221a and several external pin 121a.
Cofferdam 40a includes the first cofferdam 41a on the inside of several through-hole 13a and the on the outside of several through-hole 13a
Two cofferdam 42a, the first cofferdam 41a and chip lower surface 22a and upper surface of base plate 11a cooperate and enclose to set to form cavity S, the cavity
The active region on the surface S respective filter chip 20a.
Here, package substrate 10a has several through-hole 13a passed through for several interconnection structure 30a, interconnection structure 30a packet
Include the soldering structure 33a and electroplated layer structure 32a of the interconnection that cooperates, soldering structure 33a electric conduction 221a, electroplated layer structure
External pin 121a is connected in 32a.
It should be noted that " package substrate 10a has several through-hole 13a passed through for several interconnection structure 30a " refers to
At least partly structure of interconnection structure 30a passes through corresponding through-hole 13a, to realize that electrode 221a's and external pin 121a is mutual
Even.
Present embodiment by setting cofferdam 40a formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20a in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100a.
In addition, since cofferdam 40a has certain height, it, may can not when the lower surface area of cofferdam 40a is too small
The cofferdam 40a of the height is supported, collapsing phenomenon occurs so as to cause cofferdam 40a, if the cofferdam 40a of present embodiment includes being located at
The first cofferdam 41a on the inside of dry through-hole 13a and the second cofferdam 42a on the outside of several through-hole 13a, cofferdam 40a have enough
Big lower surface improves the stability of entire cofferdam 40a；In addition the upper surface cofferdam 40a can be with filter chip 20a following table
Filter chip 20a lower surface whole region outside the region cavity S of face combines, and further increases the forming stability of cavity S.
In conjunction with Fig. 6, several through-hole 13a in array distribution in upper surface of base plate 11a, and between having between adjacent through-holes 13a
Every there is a space, the first cofferdam 41a is located in the space, and the first cofferdam 41a is located at several through-holes between two column through-hole 13a
The inside of 13a, the second cofferdam 42a are located at outside the space, and the second cofferdam 42a is located at the outside of several through-hole 13a.
That is, several through-hole 13a, which enclose, sets the Internal periphery to be formed the first cofferdam 41a of connection, several through-hole 13a, which enclose, sets shape
At outer profile connect the second cofferdam 42a.
It should be noted that can be independent from each other between the first cofferdam 41a and the second cofferdam 42a, such as first encloses
Weir 41a is the first cyclic structure, and the first cyclic structure connects the inside of several through-hole 13a, and the second cofferdam 42a is the second cyclic annular knot
Structure, the second cyclic structure connect the outside of several through-hole 13a.
Certainly, be also possible between the first cofferdam 41a and the second cofferdam 42a it is interconnected, at this point, the first cofferdam 41a
Between the second cofferdam 42a by third cofferdam 43a realize interconnection, third cofferdam 43a between adjacent through-hole 13a or
It is other regions, that is to say, that cofferdam 40a at this time is covered with cavity S periphery, and cofferdam 40a is covered with through-hole 13a periphery.
In the present embodiment, chip lower surface 22a cover the first cofferdam 41a upper surface, and chip lower surface 22a with
The upper surface portion of second cofferdam 42a is overlapped, and upper surface of base plate 11a covers lower surface and the second cofferdam 42a of the first cofferdam 41a
Lower surface.
Second cofferdam 42a extends up to the lateral border and encapsulation base of the second cofferdam 42a towards the direction far from the first cofferdam 41a
The lateral border of plate 10a flushes.
Cofferdam 40a is made of photaesthesia insulating materials, and but not limited to this.
In the present embodiment, encapsulating structure 100a further includes coating the second cofferdam 42a simultaneously to be exposed to outer upper surface
The plastic packaging layer 50a of region and filter chip 20a, and plastic packaging layer 50a is located at package substrate 10a far from base lower surface 12a's
Side.
That is, plastic packaging layer 50a is located at the top of the second cofferdam 42a at this time, plastic packaging layer 50a coats filter chip
All open areas around 20a.
Plastic packaging layer 50a can be EMC (Expoy Molding Compound) plastic packaging layer, enclose since present embodiment utilizes
Weir 40a can stop external substance to enter cavity S, without considering whether plastic packaging layer 50a can influence cavity S because of problem of materials
Interior protection zone, therefore, the range of choice of plastic packaging layer 50a material expand significantly, and then can evade specific capsulation material
Selection is substantially widened plastic packaging making technology window and is effectively reduced cost.
In the present embodiment, encapsulating structure 100a further includes being set to base lower surface 12a and exposing external pin
The soldermask layer 60a of 121a.
Continue join Fig. 5 and Fig. 6, in the present embodiment, soldering structure 33a include scolding tin 331a and conducting scolding tin 331a and
The UBM layer 312a of electrode 221a, electroplated layer structure 32a include be covered in through-hole 13a inner wall and extend to upper surface of base plate 11a,
The plating seed of base lower surface 12a layer by layer plating seed layer 322a and be located at plating seed layer by layer plating seed layer 322a it is outer and
It extends to through-hole 13a with the plating seed electroplated layer 321a that plating seed layer 322a is mutually matched layer by layer, scolding tin 331a and is connected
The lower section of the electroplated layer 321a of through-hole 13a inner wall, electroplated layer 321a connect external pin 121a.
Plating seed layer 322a and the outer profile of electroplated layer 321a are mutually matched, and plating seed layer 322a is by through-hole 13a
Wall extends to upper surface of base plate 11a and base lower surface 12a respectively, electroplated layer 321a according to plating seed layer 322a laying area
Domain is also extended to upper surface of base plate 11a and base lower surface 12a from through-hole 13a inner wall respectively, and the lower surface of electroplated layer 321a is
Plane.
It should be noted that base lower surface 12a is also equipped with plating seed layer 322a, electricity far from the region of through-hole 13a
Coating 321a and external pin 121a.
Here, it can be Ti/Cu layers that electroplated layer 321a, which is layers of copper 321a, UBM layer 312a and plating seed layer 322a, but not
As limit.
UBM layer 312a as the transition zone between scolding tin 331a and electrode 221a, can be effectively reduced scolding tin 331a at
Type difficulty, improves molding, the fixed effect of scolding tin 331a, and the electrical transporting between scolding tin 331a and electrode 221a can be improved
Energy.
Likewise, plating seed layer 322a can effectively be dropped as the transition zone between layers of copper 321a and package substrate 10a
The molding difficulty of low layers of copper 321a improves molding, the fixed effect of layers of copper 321a.
Here, scolding tin 331a is extended in through-hole 13a by UBM layer 312a, and mutual with the layers of copper 321a of through-hole 13a inner wall
Contact, which is realized, to be electrically connected, so as to conduction electrode 221a and external pin 121a.
The advantage that scolding tin 331a and through-hole 13a is arranged is: (1) scolding tin 331a is molten condition in reflow soldering process,
Convenient for effectively filling through-hole 13a and in conjunction with UBM layer 312a, and combine effect preferable；(2) scolding tin 331a can be with through-hole 13a
The layers of copper 321a of entire internal perisporium contacts with each other, and contact area is big, and electrical transmission performance can be improved, and scolding tin 331a also can be improved
Strong degree in conjunction with layers of copper 321a；(3) reflow soldering process that scolding tin 331a is used is succinct, and high production efficiency can be greatly reduced
Production cost and shortening product delivery cycle.
In the present embodiment, the width that electroplated layer structure 32a extends to upper surface of base plate 11a is less than electroplated layer structure
32a extends to the width of base lower surface 12a.
Here, on the one hand, upper surface of base plate 11a and base lower surface 12a is provided with electroplated layer structure 32a, Ke Yiti
Strong degree of the high electroplated layer structure 32a in conjunction with package substrate 10a；On the other hand, the electroplated layer structure of base lower surface 12a
32a width is greater than the electroplated layer structure 32a width of upper surface of base plate 11a, can make the external pin of base lower surface 12a
121a be combined with each other consequently facilitating encapsulating structure 100a is subsequent with other chips or other substrates etc. far from through-hole 13a.
With overlapping region and with gap, scolding tin between the upper surface and chip lower surface 22a of electroplated layer structure 32a
The upper surface of 331a is flushed with the upper surface of electroplated layer structure 32a, and the cross-sectional area of UBM layer 312a is equal to the table of electrode 221a
Face area, and the cross-sectional area in the region scolding tin 331a connection UBM layer 312a is equal to the cross-sectional area of UBM layer 312a.
It can be seen that UBM layer 312a is covered with the lower surface area of electrode 221a, and scolding tin 331a is covered with UBM layer 312a's
Lower surface area.
Electroplated layer structure 32a and UBM layer 312a connects the first cofferdam 41a, electroplated layer structure 32a close to the side of cavity S
And UBM layer 312a far from cavity S side connect the second cofferdam 42a, moreover, the first cofferdam 41a be located at upper surface of base plate 11a
Electroplated layer structure 32a partly overlap, and the second cofferdam 42a and the part the electroplated layer structure 32a weight positioned at upper surface of base plate 11a
It is folded, at this point, electroplated layer structure 32a periphery does not have plastic packaging layer 50a.
An embodiment of the present invention also provides a kind of production method of encapsulating structure, in conjunction with saying for aforementioned encapsulation structure 100a
Bright and Fig. 7, Fig. 8 a to Fig. 8 u, production method comprising steps of
S1: ginseng Fig. 8 a provides filter chip 20a, has the chip upper surface 21a being oppositely arranged and chip lower surface
22a, chip lower surface 22a have several electrode 221a；
S2: ginseng Fig. 8 b to Fig. 8 g forms UBM layer 312a in the lower surface of electrode 221a；
It is specific as follows:
Join Fig. 8 b, forms the first photoresist film 70a in chip lower surface 22a；
Join Fig. 8 c, forms several first hole 71a, the first hole 71a exposure in the first photoresist film 70a exposure and imaging
Electrode 221a out；
Join Fig. 8 d, in formation UBM layer 312a in the first hole 71a；
Join Fig. 8 e, removes the first photoresist film 70a.
S3: ginseng Fig. 8 f provides package substrate 10a, has the upper surface of base plate 11a and base lower surface being oppositely arranged
12a；
S4: ginseng Fig. 8 g, in forming several through-hole 13a on package substrate 10a；
S5: ginseng Fig. 8 h to Fig. 8 m in through-hole 13a inner wall and connects under the upper surface of base plate 11a of through-hole 13a inner wall, substrate
Surface 12a forms electroplated layer structure 32a；
It is specific as follows:
Join Fig. 8 h, in the part substrate upper surface 11a of through-hole 13a inner wall and connection through-hole 13a inner wall, whole substrate following tables
Face 12a forms plating seed layer 322a；
Join Fig. 8 i, forms the second photoresist film 90a in the lower section of the plating seed layer 322a of base lower surface 12a；
Join Fig. 8 j, forms several second hole 91a, the second hole 91a exposure in the second photoresist film 90a exposure and imaging
Through-hole 13a and plating seed layer 322a；
Join Fig. 8 k, forms layers of copper 321a in being exposed on outer plating seed layer 322a；
Join Fig. 8 l, removes the second photoresist film 90a；
Join Fig. 8 m, removal is exposed to outer plating seed layer 322a.
S6: ginseng Fig. 8 n and Fig. 8 o, cofferdam 40a is formed in upper surface of base plate 11a, cofferdam 40a includes being located at several through-hole 13a
First cofferdam 41a of inside and the second cofferdam 42a on the outside of several through-hole 13a；
It is specific as follows:
Join Fig. 8 n, lays photaesthesia insulating film 80a in upper surface of base plate 11a；
Join Fig. 8 o, exposure and imaging forms cofferdam 40a, and cofferdam 40a includes the first cofferdam on the inside of several through-hole 13a
The lateral margin of 41a and the second cofferdam 42a on the outside of several through-hole 13a, the first cofferdam 41a and the second cofferdam 42a are and through-hole
It (is substantially to flush with the layers of copper 321a being located in through-hole 13a far from the side of plating seed layer 322a, at this time that 13a inner wall, which flushes,
The first cofferdam 41a and the second cofferdam 42a section it is L-shaped), at this point, the first cofferdam 41a with positioned at upper surface of base plate 11a
Electroplated layer structure 32a partly overlaps, and the second cofferdam 42a and the part electroplated layer structure 32a positioned at upper surface of base plate 11a are heavy
It is folded.
It should be noted that being formed since independent package substrate 10a can be divided by the large substrates of wafer scale, molding is enclosed
When the 40a of weir, can on large substrates the multiple cofferdam 40a of straight forming, then carry out the segmentation of large substrates again and obtain having single
The single package substrate 10a of a cofferdam 40a, in this way, being greatly improved packaging efficiency, certainly, cofferdam 40a is also plastic to be filtered
On device chip 20a.
Filter chip 20a is assembled to package substrate 10a, chip lower surface 22a and upper surface of base plate by S7: ginseng Fig. 8 p
11a is arranged face-to-face, and the first cofferdam 41a is located at the inside of several through-hole 13a, and the second cofferdam 42a is located at the outer of several through-hole 13a
Side, and the first cofferdam 41a and chip lower surface 22a and upper surface of base plate 11a cooperates and encloses and set to form cavity S；
S8: ginseng Fig. 8 q and Fig. 8 r, in the scolding tin for forming conduction electrode 221a and electroplated layer structure 32a on UBM layer 312a
331a；
It is specific as follows:
Join Fig. 8 q, forms plastic packaging layer 50a far from the side of base lower surface 12a in package substrate 10a, plastic packaging layer 50a is same
When coat the second cofferdam 42a and be exposed to outer surface area and filter chip 20a, several UBM layer 312a and be aligned to several
Through-hole 13a；
Join Fig. 8 r, in forming scolding tin 331a on UBM layer 312a, scolding tin 331a extends to through-hole 13a and is connected in through-hole 13a
The layers of copper 321a of wall.
S9: ginseng Fig. 8 s to Fig. 8 u forms external pin 121a below electroplated layer structure 32a.
It is specific as follows:
Join Fig. 8 s, forms soldermask layer 60a in base lower surface 12a, soldermask layer 60a coats base lower surface 12a, copper simultaneously
Layer 321a and scolding tin 331a；
Join Fig. 8 t, forms several third hole 61a in soldermask layer 60a exposure and imaging, third hole 61a exposes layers of copper
321a；
Join Fig. 8 u, in formation ball grid array 121a in several third hole 61a.
Other explanations of the production method of the encapsulating structure of present embodiment can saying with reference to above-mentioned encapsulating structure 100a
Bright, details are not described herein.
Join Fig. 9, is the cross-sectional view of the encapsulating structure 100b of third embodiment of the invention.
Encapsulating structure 100b includes package substrate 10b, filter chip 20b, several interconnection structure 30b and cofferdam 40b.
Package substrate 10b has the upper surface of base plate 11b and base lower surface 12b being oppositely arranged, base lower surface 12b's
Side has several external pin 121b.
Here, package substrate 10b is the loading plate for carrying chip, and package substrate 10b can be print made of organic resin
Printed circuit board is also possible to glass substrate or ceramic substrate etc..
External pin 121b can be ball grid array (Ball Grid Array, BGA), pad etc., encapsulating structure 100b
It can be electrically connected with realizations such as other chips or substrates by external pin 121b, here, external pin 121b is with ball bar battle array
For arranging 121b, external pin 121b protrudes out the lower surface of encapsulating structure 100b.
Filter chip 20b has the chip upper surface 21b and chip lower surface 22b being oppositely arranged, chip lower surface 22b
It is arranged face-to-face with upper surface of base plate 11b, chip lower surface 22b has several electrode 221b.
Here, filter chip 20b can be surface acoustic wave filter chip (Surface Acoustic Wave, SAW)
Or bulk acoustic wave filter chip (Bulk Acoustic Wave, BAW), but not limited to this, the surface filter chip 20b
Active region (Active Zone) needs to work normally under the contact of no foreign object or coverage condition, that is to say, that needs
A cavity is formed in the lower section of filter chip 20b to protect the active region.
Electrode 221b protrudes out chip lower surface 22b towards the direction far from chip upper surface 21b, and but not limited to this.
In general, the size of filter chip 20b is less than the size of package substrate 10b.
Several interconnection structure 30b are for being connected several electrode 221b and several external pin 121b.
Cofferdam 40b includes the first cofferdam 41b on the inside of several through-hole 13b and the on the outside of several through-hole 13b
Two cofferdam 42b, the first cofferdam 41b and chip lower surface 22b and upper surface of base plate 11b cooperate and enclose to set to form cavity S, the cavity
The active region on the surface S respective filter chip 20b.
Here, package substrate 10b has several through-hole 13b passed through for several interconnection structure 30b, interconnection structure 30b packet
Include metal column structures 31b, scolding tin 331b and electroplated layer structure 32b, metal column structures 31b conduction electrode 221b, electroplated layer structure
External pin 121b is connected in 32b, and scolding tin 331b is for being connected metal column structures 31b and electroplated layer structure 32b.
It should be noted that " package substrate 10b has several through-hole 13b passed through for several interconnection structure 30b " refers to
At least partly structure of interconnection structure 30b passes through corresponding through-hole 13b, to realize that electrode 221b's and external pin 121b is mutual
Even.
Present embodiment by setting cofferdam 40b formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20b in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100b.
Present embodiment by setting cofferdam 40b formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20b in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100b.
In addition, since cofferdam 40b has certain height, it, may can not when the lower surface area of cofferdam 40b is too small
The cofferdam 40b of the height is supported, collapsing phenomenon occurs so as to cause cofferdam 40b, if the cofferdam 40b of present embodiment includes being located at
The first cofferdam 41b on the inside of dry through-hole 13b and the second cofferdam 42b on the outside of several through-hole 13b, cofferdam 40b have enough
Big lower surface improves the stability of entire cofferdam 40b；In addition the upper surface cofferdam 40b can be with filter chip 20b following table
Filter chip 20b lower surface whole region outside the region cavity S of face combines, and further increases the forming stability of cavity S.
In conjunction with Figure 10, several through-hole 13b in array distribution in upper surface of base plate 11b, and between having between adjacent through-holes 13b
Every there is a space, the first cofferdam 41b is located in the space, and the first cofferdam 41b is located at several through-holes between two column through-hole 13b
The inside of 13b, the second cofferdam 42b are located at outside the space, and the second cofferdam 42b is located at the outside of several through-hole 13b.
That is, several through-hole 13b, which enclose, sets the Internal periphery to be formed the first cofferdam 41b of connection, several through-hole 13b, which enclose, sets shape
At outer profile connect the second cofferdam 42b.
It should be noted that can be independent from each other between the first cofferdam 41b and the second cofferdam 42b, such as first encloses
Weir 41b is the first cyclic structure, and the first cyclic structure connects the inside of several through-hole 13b, and the second cofferdam 42b is the second cyclic annular knot
Structure, the second cyclic structure connect the outside of several through-hole 13b.
Certainly, be also possible between the first cofferdam 41b and the second cofferdam 42b it is interconnected, at this point, the first cofferdam 41b
Between the second cofferdam 42b by third cofferdam 43b realize interconnection, third cofferdam 43b between adjacent through-hole 13b or
It is other regions, that is to say, that cofferdam 40b at this time is covered with cavity S periphery, and cofferdam 40b is covered with through-hole 13b periphery.
In the present embodiment, chip lower surface 22b cover the first cofferdam 41b upper surface, and chip lower surface 22b with
The upper surface portion of second cofferdam 42b is overlapped, and upper surface of base plate 11b covers lower surface and the second cofferdam 42b of the first cofferdam 41b
Lower surface.
Second cofferdam 42b extends up to the lateral border and encapsulation base of the second cofferdam 42b towards the direction far from the first cofferdam 41b
The lateral border of plate 10b flushes.
Cofferdam 40b is made of photaesthesia insulating materials, and but not limited to this.
In the present embodiment, encapsulating structure 100b further includes coating the second cofferdam 42b simultaneously to be exposed to outer upper surface
The plastic packaging layer 50b of region and filter chip 20b, and plastic packaging layer 50b is located at package substrate 10b far from base lower surface 12b's
Side.
That is, plastic packaging layer 50b is located at the top of the second cofferdam 42b at this time, plastic packaging layer 50b coats filter chip
All open areas around 20b.
Plastic packaging layer 50b can be EMC (Expoy Molding Compound) plastic packaging layer, enclose since present embodiment utilizes
Weir 40b can stop external substance to enter cavity S, without considering whether plastic packaging layer 50b can influence cavity S because of problem of materials
Interior protection zone, therefore, the range of choice of plastic packaging layer 50b material expand significantly, and then can evade specific capsulation material
Selection is substantially widened plastic packaging making technology window and is effectively reduced cost.
In the present embodiment, encapsulating structure 100b further includes being set to base lower surface 12b and exposing external pin
The soldermask layer 60b of 121b.
Continue to join Fig. 9 and Figure 10, in the present embodiment, metal column structures 31b includes metal column 311b and conducting metal
The UBM layer 312b of column 311b and electrode 221b, electroplated layer structure 32b include being covered in through-hole 13b inner wall and extending on substrate
Surface 11b, base lower surface 12b plating seed plating seed layer 322b and be located at plating seed plating seed layer layer by layer layer by layer
322b is outer and coats metal column with the plating seed electroplated layer 321b that plating seed layer 322b is mutually matched layer by layer, scolding tin 331b
311b simultaneously extends to through-hole 13b and the electroplated layer 321b of through-hole 13b inner wall is connected, and the lower section of electroplated layer 321b connects external pin
121b。
Plating seed layer 322b and the outer profile of electroplated layer 321b are mutually matched, and plating seed layer 322b is by through-hole 13b
Wall extends to upper surface of base plate 11b and base lower surface 12b respectively, electroplated layer 321b according to plating seed layer 322b laying area
Domain is also extended to upper surface of base plate 11b and base lower surface 12b from through-hole 13b inner wall respectively, and the lower surface of electroplated layer 321b is
Plane.
It should be noted that base lower surface 12b is also equipped with plating seed layer 322b, electricity far from the region of through-hole 13b
Coating 321b and external pin 121b.
Here, metal column 311b is copper post 311b, and electroplated layer 321b is layers of copper 321b, UBM layer 312b and plating seed layer
322b can be Ti/Cu layers, and but not limited to this.
UBM layer 312b as the transition zone between copper post 311b and electrode 221b, can be effectively reduced copper post 311b at
Type difficulty, improves molding, the fixed effect of copper post 311b, and the electrical transporting between copper post 311b and electrode 221b can be improved
Energy.
Likewise, plating seed layer 322b can effectively be dropped as the transition zone between layers of copper 321b and package substrate 10b
The molding difficulty of low layers of copper 321b improves molding, the fixed effect of layers of copper 321b.
Here, scolding tin 331b is coated on the outside of copper post 311b, and scolding tin 331b is extended downward into through-hole 13b, and with
The layers of copper 321b of through-hole 13b inner wall, which contacts with each other, realizes electric connection, so as to conduction electrode 221b and external pin 121b.
The advantage that copper post 311b, scolding tin 331b and through-hole 13b is arranged is: (1) scolding tin 331b is in reflow soldering process
Molten condition convenient for effectively filling through-hole 13b and in conjunction with copper post 311b, and combines effect preferable；(2) scolding tin 331b can be with
The layers of copper 321b of the entire internal perisporium of through-hole 13b contacts with each other, and contact area is big, and electrical transmission performance can be improved, also can be improved
Strong degree of the scolding tin 331b in conjunction with layers of copper 321b；(3) copper post 311b has already taken up a part of space through-hole 13b, at this time in
The raw material usage amount that scolding tin 331b can be reduced in the through-hole 13b when setting scolding tin 331b, reduces the Welder of scolding tin 331b
Skill difficulty shortens weld interval, and then improves welding production capacity；(4) copper post 311b appearance is significant, can be used as identification part with
Recognition efficiency is improved, and then convenient for the detection of automatic aspect and possible defect recognition.
In the present embodiment, the width that electroplated layer structure 32b extends to upper surface of base plate 11b is less than electroplated layer structure
32b extends to the width of base lower surface 12b.
Here, on the one hand, upper surface of base plate 11b and base lower surface 12b is provided with electroplated layer structure 32b, Ke Yiti
Strong degree of the high electroplated layer structure 32b in conjunction with package substrate 10b；On the other hand, the electroplated layer structure of base lower surface 12b
32b width is greater than the electroplated layer structure 32b width of upper surface of base plate 11b, can make the external pin of base lower surface 12b
121b be combined with each other consequently facilitating encapsulating structure 100b is subsequent with other chips or other substrates etc. far from through-hole 13b.
The lower surface of scolding tin 331b connection electrode 221b and UBM layer 312b and copper post 311b, electroplated layer structure are coated simultaneously
With overlapping region and with gap, the cross-sectional area of UBM layer 312b between the upper surface of 32b and the lower surface of electrode 221b
Less than the surface area of electrode 221b, the cross-sectional area of copper post 311b is equal to the cross-sectional area of UBM layer 312b.
It can be seen that UBM layer 312b is laid in the intermediate region of electrode 221b, copper post 311b corresponds to UBM layer 312b setting.
Electroplated layer structure 32b and scolding tin 331b close to cavity S side connect the first cofferdam 41b, electroplated layer structure 32b and
Scolding tin 331b connects the second cofferdam 42b far from the side of cavity S, moreover, the first cofferdam 41b with positioned at upper surface of base plate 11b
Electroplated layer structure 32b partly overlaps, and the second cofferdam 42b and the part electroplated layer structure 32b positioned at upper surface of base plate 11b are heavy
It is folded, at this point, electroplated layer structure 32b periphery does not have plastic packaging layer 50b.
An embodiment of the present invention also provides a kind of production method of encapsulating structure, in conjunction with saying for aforementioned encapsulation structure 100b
Bright and Figure 11, Figure 12 a to Figure 12 w, production method comprising steps of
S1: ginseng Figure 12 a provides filter chip 20b, has the chip upper surface 21b being oppositely arranged and chip following table
Face 22b, chip lower surface 22b have several electrode 221b；
S2: ginseng Figure 12 b to Figure 12 g forms metal column structures 31b in the lower surface of electrode 221b；
It specifically includes:
Join Figure 12 b, forms UBM layer 312b in chip lower surface 22b；
Join Figure 12 c, forms the first photoresist film 70b in the lower section of UBM layer 312b；
Join Figure 12 d, the first photoresist film 70b exposure and imaging forms several first hole 71b, and the first hole 71b is corresponding
Electrode 221b, and the first hole 71b exposes UBM layer 312b；
Join Figure 12 e, in forming several copper post 311b in several first hole 71b；
Join Figure 12 f, removes the first photoresist film 70b；
Join Figure 12 g, removal is exposed to outer UBM layer 312b.
S3: ginseng Figure 12 h provides package substrate 10b, has the upper surface of base plate 11b and base lower surface being oppositely arranged
12b；
S4: ginseng Figure 12 i, in forming several through-hole 13b on package substrate 10b；
S5: ginseng Figure 12 j to Figure 12 o, in through-hole 13b inner wall and upper surface of base plate 11b, the substrate of connection through-hole 13b inner wall
Lower surface 12b forms electroplated layer structure 32b；
It specifically includes:
Join Figure 12 j, in through-hole 13b inner wall and connects under the part substrate upper surface 11b of through-hole 13b inner wall, whole substrates
Surface 12b forms plating seed layer 322b；
Join Figure 12 k, forms the second photoresist film 90b in the lower section of the plating seed layer 322b of base lower surface 12b；
Join Figure 12 l, forms several second hole 91b in the second photoresist film 90b exposure and imaging, the second hole 91b is sudden and violent
Expose through-hole 13b and plating seed layer 322b；
Join Figure 12 m, forms layers of copper 321b in being exposed on outer plating seed layer 322b；
Join Figure 12 n, removes the second photoresist film 90b；
Join Figure 12 o, removal is exposed to outer plating seed layer 322b.
S6: ginseng Figure 12 p and Figure 12 q, cofferdam 40b is formed in upper surface of base plate 11b, cofferdam 40b includes being located at several through-holes
The first cofferdam 41b on the inside of 13b and the second cofferdam 42b on the outside of several through-hole 13b；
It specifically includes:
Join Figure 12 p, lays photaesthesia insulating film 80b in upper surface of base plate 11b；
Join Figure 12 q, exposure and imaging forms cofferdam 40b, and cofferdam 40b includes first enclosing on the inside of several through-hole 13b
The lateral margin of weir 41b and the second cofferdam 42b on the outside of several through-hole 13b, the first cofferdam 41b and the second cofferdam 42b with it is logical
Hole 13b inner wall flush (be substantially be located at through-hole 13b in layers of copper 321b flushed far from the side of plating seed layer 322b, this
When the first cofferdam 41b and the second cofferdam 42b section it is L-shaped), at this point, the first cofferdam 41b be located at upper surface of base plate 11b
Electroplated layer structure 32b partly overlap, and the second cofferdam 42b and the part the electroplated layer structure 32b weight positioned at upper surface of base plate 11b
It is folded.
It should be noted that being formed since independent package substrate 10b can be divided by the large substrates of wafer scale, molding is enclosed
When the 40b of weir, can on large substrates the multiple cofferdam 40b of straight forming, then carry out the segmentation of large substrates again and obtain having single
The single package substrate 10b of a cofferdam 40b, in this way, being greatly improved packaging efficiency, certainly, cofferdam 40b is also plastic to be filtered
On device chip 20b.
Filter chip 20b is assembled to package substrate 10b, chip lower surface 22b and upper surface of base plate by S7: ginseng Figure 12 r
11b is arranged face-to-face, and the first cofferdam 41b is located at the inside of several through-hole 13b, and the second cofferdam 42b is located at the outer of several through-hole 13b
Side, and the first cofferdam 41b and chip lower surface 22b and upper surface of base plate 11b cooperates and encloses and set to form cavity S；
S8: ginseng Figure 12 s and Figure 12 t forms conducting metal column structures 31b and electroplated layer knot in the periphery metal column structures 31b
The scolding tin 331b of structure 32b；
It specifically includes:
Join Figure 12 s, forms plastic packaging layer 50b far from the side of base lower surface 12b in package substrate 10b, plastic packaging layer 50b is same
When coat the second cofferdam 42b and be exposed to outer surface area and filter chip 20b, several copper post 311b towards several through-holes
13b extends；
Join Figure 12 t, form scolding tin 311b, scolding tin 311b connection electrode 221b in the periphery of copper post 311b and UBM layer 312b,
And scolding tin 331b extends to through-hole 13b and the layers of copper 321b of through-hole 13b inner wall is connected.
S9: ginseng Figure 12 u to Figure 12 w forms external pin 121b below electroplated layer structure 32b.
It specifically includes:
Join Figure 12 u, in base lower surface 12b formed soldermask layer 60b, soldermask layer 60b coat simultaneously base lower surface 12b,
Layers of copper 321b and scolding tin 331b；
Join Figure 12 v, forms several third hole 61b, third hole 61b exposure copper in soldermask layer 60b exposure and imaging
Layer 321b；
Join Figure 12 w, in formation ball grid array 121b in several third hole 61b.
Other explanations of the production method of the encapsulating structure of present embodiment can saying with reference to above-mentioned encapsulating structure 100b
Bright, details are not described herein.
Join Figure 13, is the cross-sectional view of the encapsulating structure 100c of four embodiment of the invention.
Encapsulating structure 100c includes package substrate 10c, filter chip 20c, several electroplated layer structure 32c and cofferdam 40c.
Package substrate 10c has the upper surface of base plate 11c and base lower surface 12c being oppositely arranged, base lower surface 12c's
There is several external pin 121c, package substrate 10c to have several through-hole 13c for side.
Here, package substrate 10c is the loading plate for carrying chip, and package substrate 10c can be print made of organic resin
Printed circuit board is also possible to glass substrate or ceramic substrate etc..
External pin 121c can be ball grid array (Ball Grid Array, BGA), pad etc., encapsulating structure 100c
It can be electrically connected with realizations such as other chips or substrates by external pin 121c, here, external pin 121c is with ball bar battle array
For arranging 121c, external pin 121c protrudes out the lower surface of encapsulating structure 100c.
Filter chip 20c has the chip upper surface 21c and chip lower surface 22c being oppositely arranged, chip lower surface 22c
It is arranged face-to-face with upper surface of base plate 11c, chip lower surface 22c has several electrode 221c.
Here, filter chip 20c can be surface acoustic wave filter chip (Surface Acoustic Wave, SAW)
Or bulk acoustic wave filter chip (Bulk Acoustic Wave, BAW), but not limited to this, the surface filter chip 20c
Active region (Active Zone) needs to work normally under the contact of no foreign object or coverage condition, that is to say, that needs
A cavity is formed in the lower section of filter chip 20c to protect the active region.
Electrode 221c protrudes out chip lower surface 22c towards the direction far from chip upper surface 21c, and but not limited to this.
In general, the size of filter chip 20c is less than the size of package substrate 10c.
Several metal-layer structure 32c pass through several through-hole 13c and several electrode 221c and several external pin 121c are connected.
It should be noted that " several metal-layer structure 32c pass through several through-hole 13c " refers to metal-layer structure 32c extremely
Small part structure passes through corresponding through-hole 13c, to realize the interconnection of electrode 221c and external pin 121c.
Cofferdam 40c includes positioned at the first cofferdam 41c of the inside of several through-hole 13c and on the outside of several through-hole 13c
Second cofferdam 42c, the first cofferdam 41c and chip lower surface 22c and upper surface of base plate 11c cooperate and enclose to set to form cavity S, the sky
The active region on the surface chamber S respective filter chip 20c.
Present embodiment by setting cofferdam 40c formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20c in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100c.
Present embodiment by setting cofferdam 40c formed cavity S, it is possible to prevente effectively from encapsulating structure manufacturing process or
It is that external substance enters the normal use for inside cavity S and influencing filter chip 20c in encapsulating structure use process, thus
Improve the overall performance of encapsulating structure 100c.
In addition, since cofferdam 40c has certain height, it, may can not when the lower surface area of cofferdam 40c is too small
The cofferdam 40c of the height is supported, collapsing phenomenon occurs so as to cause cofferdam 40c, if the cofferdam 40c of present embodiment includes being located at
The first cofferdam 41c on the inside of dry through-hole 13c and the second cofferdam 42c on the outside of several through-hole 13c, cofferdam 40c have enough
Big lower surface improves the stability of entire cofferdam 40c；In addition the upper surface cofferdam 40c can be with filter chip 20c following table
Filter chip 20c lower surface whole region outside the region cavity S of face combines, and further increases the forming stability of cavity S.
In conjunction with Figure 14, several through-hole 13c in array distribution in upper surface of base plate 11c, and between having between adjacent through-holes 13c
Every there is a space, the first cofferdam 41c is located in the space, i.e. the first cofferdam 41c is located at several lead between two column through-hole 13c
The inside of hole 13c, the second cofferdam 42c are located at outside the space, and the second cofferdam 42c is located at the outside of several through-hole 13c.
That is, several through-hole 13c, which enclose, sets the Internal periphery to be formed the first cofferdam 41c of connection, several through-hole 13c, which enclose, sets shape
At outer profile connect the second cofferdam 42c.
It should be noted that can be independent from each other between the first cofferdam 41c and the second cofferdam 42c, such as first encloses
Weir 41c is the first cyclic structure, and the first cyclic structure connects the inside of several through-hole 13c, and the second cofferdam 42c is the second cyclic annular knot
Structure, the second cyclic structure connect the outside of several through-hole 13c.
Certainly, be also possible between the first cofferdam 41c and the second cofferdam 42c it is interconnected, at this point, the first cofferdam 41c
Between the second cofferdam 42c by third cofferdam 43c realize interconnection, third cofferdam 43c between adjacent through-hole 13c or
It is other regions, that is to say, that cofferdam 40c at this time is covered with cavity S periphery, and cofferdam 40c is covered with through-hole 13c periphery.
In the present embodiment, chip lower surface 22c cover the first cofferdam 41c upper surface, and chip lower surface 22c with
The upper surface portion of second cofferdam 42c is overlapped, and upper surface of base plate 11c covers lower surface and the second cofferdam 42c of the first cofferdam 41c
Lower surface.
Second cofferdam 42c extends up to the lateral border and encapsulation base of the second cofferdam 42c towards the direction far from the first cofferdam 41c
The lateral border of plate 10c flushes.
Cofferdam 40c is made of photaesthesia insulating materials, and but not limited to this.
In the present embodiment, encapsulating structure 100c further includes coating the second cofferdam 42c simultaneously to be exposed to outer upper surface
The plastic packaging layer 50c of region and filter chip 20c, and plastic packaging layer 50c is located at package substrate 10c far from base lower surface 12c's
Side.
That is, plastic packaging layer 50c is located at the top of the second cofferdam 42c at this time, plastic packaging layer 50c coats filter chip
All open areas around 20c.
Plastic packaging layer 50c can be EMC (Expoy Molding Compound) plastic packaging layer, enclose since present embodiment utilizes
Weir 40c can stop external substance to enter cavity S, without considering whether plastic packaging layer 50c can influence cavity S because of problem of materials
Interior protection zone, therefore, the range of choice of plastic packaging layer 50c material expand significantly, and then can evade specific capsulation material
Selection is substantially widened plastic packaging making technology window and is effectively reduced cost.
In the present embodiment, encapsulating structure 100c further includes being set to base lower surface 12c and exposing external pin
The soldermask layer 60c of 121c.
Continue to join Figure 13 and Figure 14, in the present embodiment, metal-layer structure 32c includes metal layer 321c and conducting metal
The plating seed layer 322c of layer 321c and electrode 221c, metal-layer structure 32c filling through-hole 13c interior zone simultaneously extend to substrate
Lower surface 12c, and the lower section of metal layer 321c connects external pin 121c.
Plating seed layer 322c and the outer profile of metal layer 321c are mutually matched, and plating seed layer 322c is along through-hole 13c
Wall extends to base lower surface 12c, and metal layer 321c fills through-hole 13c and extends along base lower surface 12c, metal layer 321c's
Lower surface is plane.
It is Full connected, i.e. plating seed layer 322c between the upper surface of metal-layer structure 32c and the lower surface of electrode 221c
Upper surface be in the same plane, between plating seed layer 322c and electrode 221c for face face completely attach to.
It should be noted that base lower surface 12c is also equipped with plating seed layer 322c, gold far from the region of through-hole 13c
Belong to layer 321c and external pin 121c.
Here, metal layer 321c is layers of copper 321c, and plating seed layer 322c can be Ti/Cu layers, and but not limited to this.
Plating seed layer 322c is as between electrode 221c and layers of copper 321c, between layers of copper 321c and package substrate 10c
The molding difficulty of layers of copper 321c can be effectively reduced in transition zone, improves molding, the fixed effect of layers of copper 321c, and electricity can be improved
Electrical transmission performance between pole 221c and layers of copper 321c.
Here, the electrical property of electrode 221c and external pin 121c are directly realized by plating seed layer 322c and layers of copper 321c
Connection, it is advantageous that: electrode 221c and the connection structure of external pin 121c are simple, and the difficulty of packaging technology can be effectively reduced
Degree, improves efficiency.
In the present embodiment, the upper surface area of metal-layer structure 32c is less than the surface area of electrode 221c.
Metal-layer structure 32c connects the first cofferdam 41c close to the side of cavity S, and metal-layer structure 32c is far from cavity S's
Side connects the second cofferdam 42c, at this point, metal-layer structure 32c periphery does not have plastic packaging layer 50c.
An embodiment of the present invention also provides a kind of production method of encapsulating structure, in conjunction with saying for aforementioned encapsulation structure 100c
Bright and Figure 15, Figure 16 a to Figure 16 p, production method comprising steps of
S1: ginseng Figure 16 a provides filter chip 20c, has the chip upper surface 21c being oppositely arranged and chip following table
Face 22c, chip lower surface 22c have several electrode 221c；
S2: ginseng Figure 16 b provides package substrate 10c, has the upper surface of base plate 11c and base lower surface being oppositely arranged
12c；
S3: ginseng Figure 16 c, in forming several through-hole 13c on package substrate 10c；
S4: ginseng Figure 16 d to Figure 16 e, cofferdam 40c is formed in upper surface of base plate 11c, cofferdam 40c includes being located at several through-holes
The first cofferdam 41c on the inside of 13c and the second cofferdam 42c on the outside of several through-hole 13c；
It specifically includes:
Join Figure 16 d, lays photaesthesia insulating film 80c in upper surface of base plate 11c；
Join Figure 16 e, exposure and imaging forms cofferdam 40c, and cofferdam 40c includes first enclosing on the inside of several through-hole 13c
Weir 41c and the second cofferdam 42c on the outside of several through-hole 13c.
It should be noted that being formed since independent package substrate 10c can be divided by the large substrates of wafer scale, molding is enclosed
When the 40c of weir, can on large substrates the multiple cofferdam 40c of straight forming, then carry out the segmentation of large substrates again and obtain having single
The single package substrate 10c of a cofferdam 40c, in this way, being greatly improved packaging efficiency, certainly, cofferdam 40c is also plastic to be filtered
On device chip 20c.
Filter chip 20c is assembled to package substrate 10c, chip lower surface 22c and upper surface of base plate by S5: ginseng Figure 16 f
11c is arranged face-to-face, and the first cofferdam 41c is located at the inside of several through-hole 13c, and the second cofferdam 42c is located at the outer of several through-hole 13c
Side, and the first cofferdam 41c and chip lower surface 22c and upper surface of base plate 11c cooperates and encloses and set to form cavity S；
S6: ginseng Figure 16 g and Figure 16 m forms the metal-layer structure 32c of conduction electrode 221c, metal-layer structure 32c is at least
Part passes through through-hole 13c；
It specifically includes:
Join Figure 16 g, forms plastic packaging layer 50c far from the side of base lower surface 12c in package substrate 10c, plastic packaging layer 50c is same
When coat the second cofferdam 42c and be exposed to outer surface area and filter chip 20c, several electrode 221c and be directed at several through-holes
13c；
Join Figure 16 h, forms continuous plating seed layer along base lower surface 12c, through-hole 13c inner wall and electrode 221c
322c；
Join Figure 16 i, forms the second photoresist film 90c in the lower section of plating seed layer 322c；
Join Figure 16 j, forms several second hole 91c in the second photoresist film 90c exposure and imaging, the second hole 91c is sudden and violent
Reveal through-hole 13c and plating seed layer 322c；
Join Figure 16 k, in plating fill copper layer 321c in several second hole 91c；
Join Figure 16 l, removes the second photoresist film 90c；
Join Figure 16 m, removal is exposed to outer plating seed layer 322c.
S7: ginseng Figure 16 n to Figure 16 p forms external pin 121c below metal-layer structure 32c.
It specifically includes:
Join Figure 16 n, in base lower surface 12c formed soldermask layer 60c, soldermask layer 60c coat simultaneously base lower surface 12c and
Layers of copper 321c；
Join Figure 16 o, forms several third hole 61c, third hole 61c exposure copper in soldermask layer 60c exposure and imaging
Layer 321c；
Join Figure 16 p, in formation ball grid array 121c in several third hole 61c.
Other explanations of the production method of the encapsulating structure of present embodiment can saying with reference to above-mentioned encapsulating structure 100c
Bright, details are not described herein.
Cofferdam 40 (and 40a, 40b) of the invention is located at the inside and outside of through-hole 13, and the outside in the second cofferdam 42
Edge is flushed with the lateral border of package substrate 10, and in other embodiments, cofferdam 40 may be alternatively located at the inside of through-hole 13, alternatively,
The lateral border in the second cofferdam 42 can be flushed with the lateral border of filter chip 20, or be, the lateral border in the second cofferdam 42
Between the lateral border of filter chip 20 and the lateral border of package substrate 10 etc..
To sum up, present embodiment forms cavity S by setting cofferdam 40, it is possible to prevente effectively from encapsulating structure manufacturing process
In or external substance enters the normal use for inside cavity S and influencing filter chip 20 in encapsulating structure use process,
To improve the overall performance of encapsulating structure 100；In addition, there are many forms for the interconnection structure 30 of present embodiment, it can be effective
Electrical transmission performance is improved, the stability of entire encapsulating structure 100 can also be effectively improved.
It should be appreciated that although this specification is described in terms of embodiments, but not each embodiment only includes one
A independent technical solution, this description of the specification is merely for the sake of clarity, and those skilled in the art should will say
As a whole, the technical solution in each embodiment may also be suitably combined to form those skilled in the art can for bright book
With the other embodiments of understanding.
The series of detailed descriptions listed above only for feasible embodiment of the invention specifically
Protection scope bright, that they are not intended to limit the invention, it is all without departing from equivalent implementations made by technical spirit of the present invention
Or change should all be included in the protection scope of the present invention.
Claims (11)
1. a kind of with the encapsulating structure for extending double cofferdam, metal column and scolding tin characterized by comprising
Package substrate, has upper surface of base plate and base lower surface to setting, and the side of the base lower surface has several
External pin；
Filter chip has the chip upper surface being oppositely arranged and chip lower surface, the chip lower surface and the substrate
Upper surface is arranged face-to-face, and the chip lower surface has several electrodes；
Several interconnection structures, for several electrodes and several external pins to be connected；
Cofferdam；
Wherein, the package substrate has several through-holes passed through for several interconnection structures, and the cofferdam includes being located at several lead to
The first cofferdam on the inside of hole and the second cofferdam on the outside of several through-holes, first cofferdam and the chip lower surface and institute
It states upper surface of base plate cooperation and encloses to set to form cavity, the interconnection structure includes metal column structures, scolding tin and electroplated layer structure, institute
It states metal column structures and the electrode is connected, the external pin is connected in the electroplated layer structure, and the scolding tin is described for being connected
Metal column structures and the electroplated layer structure.
2. encapsulating structure according to claim 1, which is characterized in that the metal column structures include metal column and conducting institute
The UBM layer of metal column and the electrode is stated, the electroplated layer structure includes being covered in the through-hole wall and extending to the base
Plate upper surface, the base lower surface plating seed layer and be located at the plating seed layer it is outer and with the plating seed layer phase
Mutual matched electroplated layer, the scolding tin coat the metal column and extend to the through-hole and the described of the through-hole wall is connected
Electroplated layer.
3. encapsulating structure according to claim 2, which is characterized in that the upper surface of the electroplated layer structure and the electrode
Lower surface between with overlapping region and have gap.
4. encapsulating structure according to claim 2, which is characterized in that the scolding tin connects the lower surface of the electrode and same
When coat the UBM layer and the metal column.
5. encapsulating structure according to claim 4, which is characterized in that the electroplated layer structure and the scolding tin are close to described
The side of cavity connects described in the side connection of first cofferdam, the electroplated layer structure and the scolding tin far from the cavity
Second cofferdam.
6. encapsulating structure according to claim 5, which is characterized in that first cofferdam and the electroplated layer structure division
Overlapping, and second cofferdam is Chong Die with the electroplated layer structure division.
7. encapsulating structure according to claim 1, which is characterized in that several through-holes, which enclose, to be set described in the Internal periphery to be formed connection
First cofferdam, several through-holes, which enclose, sets the outer profile to be formed connection second cofferdam, first cofferdam and second cofferdam
It is interconnected.
8. encapsulating structure according to claim 1, which is characterized in that second cofferdam is towards far from first cofferdam
The lateral border that direction extends up to second cofferdam is flushed with the lateral border of the package substrate.
9. encapsulating structure according to claim 1, which is characterized in that the encapsulating structure further includes being located at the encapsulation base
The plastic packaging layer of side of the plate far from the base lower surface, the plastic packaging layer coat simultaneously second cofferdam be exposed to it is outer upper
Surface region and the filter chip, and the encapsulating structure further includes being set to the base lower surface and exposing described
The soldermask layer of external pin.
10. a kind of production method with the encapsulating structure for extending double cofferdam, metal column and scolding tin, which is characterized in that including step
It is rapid:
S1: providing filter chip, has the chip upper surface being oppositely arranged and chip lower surface, the chip following table mask
There are several electrodes；
S2: metal column structures are formed in the lower surface of the electrode；
S3: providing package substrate, has the upper surface of base plate and base lower surface being oppositely arranged；
S4: in forming several through-holes on the package substrate；
S5: electroplated layer structure is formed in the upper surface of base plate of the through-hole wall and the connection through-hole wall, base lower surface；
S6: cofferdam is formed in the upper surface of base plate, the cofferdam includes the first cofferdam being located on the inside of several through-holes and is located at
The second cofferdam on the outside of several through-holes；
S7: the filter chip is assembled to the package substrate, the chip lower surface is faced with the upper surface of base plate
Face setting, first cofferdam are located on the inside of several through-holes, and second cofferdam is located on the outside of several through-holes, and described first encloses
Weir and the chip lower surface and the upper surface of base plate cooperate and enclose and set to form cavity；
S8: the scolding tin that the metal column structures and the electroplated layer structure are connected is formed in the metal column structures periphery；
S9: external pin is formed below the electroplated layer structure.
11. the production method of encapsulating structure according to claim 10, which is characterized in that
Step S2 is specifically included:
UBM layer and metal column are formed in the lower surface of the electrode；
Step S5 is specifically included:
Plating kind is formed in the part substrate upper surface of the through-hole wall and the connection through-hole wall, whole base lower surfaces
Sublayer；
The second photoresist film is formed in the lower section of the plating seed layer of the base lower surface, and in second photoresist
Film exposure and imaging forms several second holes, and second hole exposes the through-hole and plating seed layer；
Electroplated layer is formed in being exposed on outer plating seed layer；
Remove the second photoresist film；
Removal is exposed to outer plating seed layer.
Step S8, S9 is specifically included:
Plastic packaging layer is formed far from the side of the base lower surface in the package substrate, the plastic packaging layer coats described the simultaneously
Two cofferdam are exposed to outer surface area and the filter chip, several metal columns and extend towards several through-holes；
Scolding tin is formed in the periphery of the metal column and the UBM layer, the scolding tin connects the electrode, and the scolding tin extends
Electroplated layer to the through-hole and with the conducting through-hole wall；
Soldermask layer is formed in base lower surface, the soldermask layer coats the base lower surface, the electroplated layer and described simultaneously
Scolding tin；
Several third holes are formed in the soldermask layer exposure and imaging, the third hole exposes the electroplated layer；
In forming ball grid array in several third holes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810910184.3A CN109004081A (en) | 2018-08-10 | 2018-08-10 | With the double cofferdam of extension, metal column and encapsulating structure of scolding tin and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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