CN108970657B - Preparation method of microfluid array controller - Google Patents
Preparation method of microfluid array controller Download PDFInfo
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- CN108970657B CN108970657B CN201810818385.0A CN201810818385A CN108970657B CN 108970657 B CN108970657 B CN 108970657B CN 201810818385 A CN201810818385 A CN 201810818385A CN 108970657 B CN108970657 B CN 108970657B
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- B01L3/00—Containers or dishes for laboratory use, e.g. laboratory glassware; Droppers
- B01L3/50—Containers for the purpose of retaining a material to be analysed, e.g. test tubes
- B01L3/502—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures
- B01L3/5027—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip
- B01L3/502715—Containers for the purpose of retaining a material to be analysed, e.g. test tubes with fluid transport, e.g. in multi-compartment structures by integrated microfluidic structures, i.e. dimensions of channels and chambers are such that surface tension forces are important, e.g. lab-on-a-chip characterised by interfacing components, e.g. fluidic, electrical, optical or mechanical interfaces
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Abstract
The invention relates to a preparation method of a microfluid array controller, belongs to the technical field of microfluid control, and solves the problem that large-scale microfluid array control is difficult to realize in the prior art. The preparation method disclosed by the invention comprises the following steps of: preparing a microfluid control unit, wherein the microfluid control unit comprises a microfluid channel device, a thin film transistor device and a capacitor; selecting a power supply 1 and a power supply 2 according to a preset requirement; and arranging M × N microfluidic control units into an M × N array, and performing line connection. The M multiplied by N array prepared by the invention only needs M + N +2 lead wires, and the microfluid control voltage only needs about 20V. The preparation method can realize large-scale microfluid array control, greatly reduce the difficulty of large-scale microfluid array control, reduce the number of leads and provide a new technical approach for the practicability of the microfluid control chip.
Description
Technical Field
The invention relates to the technical field of microfluid control, in particular to a preparation method of a microfluid array controller.
Background
The microfluid control is a control technology for controlling operations such as movement, segmentation and fusion of pigment droplets by using voltage signals, and is one of core technologies for realizing micro electrochemistry, chemistry, medical treatment and biochips.
Microfluidic controllers made by existing methods typically use arrayed control electrodes to achieve microfluidic control. However, the existing microfluidic controller is limited by the number of interconnection leads, the scale of the electrode array of the existing microfluidic controller is far from the use requirement, and the popularization and application of the microfluidic control chip are seriously hindered.
The structure of the microfluidic array controller prepared by the existing method is shown in fig. 1, and if the array scale is M × N, M × N +1 outgoing lines need to be led out in order to apply voltage to each microfluidic channel device. By adopting the method, along with the increase of the array scale, the number of the leads is increased in a geometric multiple, so that the difficulty of array preparation is increased, and a peripheral control circuit is complicated and large in size. In addition, the microfluid control needs higher voltage, generally more than 50V, and the existing microfluid array control preparation technology cannot meet the requirements.
The existing methods for preparing microfluidic array controllers face the following challenges: the control electrode array with a large scale has a large number of electrodes, and in order to realize the control of the pigment droplets, a large number of interconnection leads need to be configured, so that the difficulty in array preparation is increased, and a peripheral control circuit is complex and large in size, which is not beneficial to the batch application of the preparation method.
Disclosure of Invention
In view of the foregoing analysis, embodiments of the present invention provide a method for manufacturing a microfluidic array controller, so as to solve the problem that the prior art is not easy to implement large-scale fluid array control.
In one aspect, an embodiment of the present invention provides a method for manufacturing a microfluidic array controller, including the following steps:
preparing a microfluidic control unit, wherein the microfluidic control unit comprises a microfluidic channel device, a thin film transistor device and a capacitor;
selecting a power supply 1 and a power supply 2 according to a preset requirement;
arranging the M multiplied by N micro-fluid control units into an M multiplied by N array, wherein in each row, the gate electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; in each row, the source electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; the drain electrodes of all thin film transistor devices are connected to a power supply 1 via the corresponding microfluidic channel device and to a power supply 2 via the corresponding capacitor.
The beneficial effects of the above technical scheme are as follows: the working state of the microfluidic channel device in each manufactured microfluidic control unit can be accurately controlled through the row control signal and the column control signal, specifically, one row is gated through a gate electrode lead of the thin film transistor device in the row direction, and a voltage value is written into the target microfluidic channel device through a source electrode lead of the thin film transistor device in the column direction. The voltage value in the whole array is set through sequential gating of the grid leads, so that microfluid control is realized. For an mxn array, the leads are only M + N +2, which is a significant reduction in the number of leads compared to the existing microfluidic array controllers described in the background. When M is 100 and N is 100, the number of leads is only 202, which is much smaller than 10001 in the existing microfluidic array control method. Obviously, the method can realize large-scale microfluid array control by creatively combining the microfluid channel device, the thin film transistor device and the capacitor, and provides a new technical approach for the practicability of the microfluid control chip.
In another embodiment based on the above method, the step of preparing the microfluidic control unit comprises:
preparing a control layer of a microfluidic control unit on a silicon wafer or a first glass substrate, wherein the control layer comprises a thin film transistor device and a capacitor;
preparing a passivation layer on the control layer, and manufacturing a through hole at a preset position on the passivation layer;
preparing a microfluidic channel layer of a microfluidic control unit on the passivation layer, the microfluidic channel layer including a microfluidic channel device; the bottom electrode of the microfluidic channel device is electrically connected with the top electrode of the capacitor and the drain electrode of the thin film transistor device through the through hole;
injecting a liquid into a channel region of the microfluidic channel device.
The beneficial effects of the above technical scheme are: the thin film transistor device, the capacitor and the microfluidic channel device can be integrated into a whole by using the preparation method, and the thin film transistor device, the capacitor and the microfluidic channel device can be electrically connected without being connected by a lead.
Further, the step of preparing the control layer of the microfluidic control unit on the silicon wafer or the first glass substrate comprises:
preparing a gate electrode of the thin film transistor device and a ground electrode of the capacitor on a silicon wafer or a first glass substrate;
preparing an insulating layer on the gate electrode and the ground electrode, wherein the part of the insulating layer corresponding to the gate electrode of the thin film transistor device is a gate insulating layer, and the part of the insulating layer corresponding to the ground electrode of the capacitor is the insulating layer of the capacitor;
preparing a semiconductor layer of the thin film transistor device on the gate insulating layer;
preparing a source electrode and a drain electrode of the thin film transistor device on the semiconductor layer; the source electrode and the drain electrode are arranged on two sides of the semiconductor layer and are in contact with the semiconductor layer; and preparing a top electrode of the capacitor on the insulating layer of the capacitor, wherein the drain electrode is electrically connected with the top electrode.
The beneficial effects of the further scheme are as follows: the above structure can control the voltage on the microfluidic channel device by using the on-off state of the thin film transistor, i.e., the thin film transistor plays a role of gating.
Further, the step of preparing the microfluidic channel layer of the microfluidic control unit includes:
preparing a bottom electrode of the microfluidic channel device on the passivation layer using a metal; the metal penetrates through the through hole, so that the bottom electrode is electrically connected with the top electrode of the capacitor and the drain electrode of the thin film transistor device;
preparing an insulating layer of a microfluidic channel device on the bottom electrode;
preparing a bottom hydrophobic layer on an insulating layer of the microfluidic channel device;
preparing a top electrode on a second glass substrate, and preparing a top hydrophobic layer on the top electrode to obtain a top structure of the microfluidic channel device;
and suspending the top structure above the bottom hydrophobic layer from bottom to top according to the sequence of the top hydrophobic layer, the top electrode and the glass substrate, so that a channel area is formed between the top hydrophobic layer and the bottom hydrophobic layer.
The beneficial effects of the further scheme are as follows: by designing and preparing the insulating layer of the microfluidic channel device, the microfluidic control voltage of the invention is reduced to about 20V, compared with 50V in the prior art, the control voltage is obviously reduced, and the use requirement can be met.
Further, the preparation method of the microfluidic array controller further comprises the following steps:
preparing a window overlapping the area of the semiconductor layer on the top electrode above the semiconductor layer;
preparing a side wall made of a hydrophilic insulating material at the edge of the channel area; and the side wall of the hydrophilic insulating material is not in contact with the top hydrophobic layer.
The beneficial effects of the further scheme are as follows: the window is used to reduce possible interference of higher voltage on the top electrode on the switching state of the thin film transistor and to reduce leakage current and leakage voltage drop on the capacitor and microfluidic channel device. The side wall of the hydrophilic insulating material prepared in the edge channel region can play a role in limiting the position of liquid in the microfluidic channel.
Further, the process for preparing the passivation layer is chemical vapor deposition or physical vapor deposition, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride and parylene, and the thickness is 100 nm-2 μm;
the process for manufacturing the through hole on the passivation layer is photoetching and etching;
the height of the channel region of the microfluidic channel device is less than 120 μm.
The liquid is at least one of silicone oil, water or an organic material.
The beneficial effects of the further scheme are as follows: because the working voltage of the microfluidic channel device is relatively high, the dielectric layer with higher quality, namely the insulating layer of the microfluidic channel device, can improve the pressure resistance of the passivation layer. The parylene material can be grown at room temperature, thus reducing the fabrication temperature of the microfluidic array controller. The aluminum oxide, the titanium oxide, the hafnium oxide and the silicon oxide can be prepared by using a chemical vapor deposition method, such as plasma vapor deposition, atomic layer deposition and the like, have high processing quality and uniformity, can reduce the electric leakage characteristic of the passivation layer, and can improve the pressure resistance of the passivation layer. Through experimental optimization, the height of a channel region of the microfluidic channel device needs to be lower than 120 μm, otherwise, the movement efficiency of liquid in the microfluidic channel device is greatly reduced, and even the liquid cannot be driven. Besides water solution, organic matters such as silicon oil or n-dodecane are filled in the microfluidic channels, so that the viscous resistance of the liquid during movement can be greatly reduced, the driving voltage of the microfluidic array controller is reduced, and the liquid driving efficiency is improved.
Further, the process for preparing the gate electrode and the ground electrode is a physical vapor deposition process and a photoetching process, the used materials are metals, and the thicknesses of the two are 50-300 nm respectively;
the process for preparing the gate insulating layer and the insulating layer of the capacitor is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide and silicon nitride, and the thickness is 50 nm-1 mu m;
the process for preparing the semiconductor layer is a physical vapor deposition process or a chemical vapor deposition process, and a photoetching process, the used material is at least one of amorphous silicon, indium gallium zinc oxide, tin oxide and polycrystalline silicon, and the thickness of the material is 10-100 nm;
the process for preparing the source electrode and the drain electrode is a physical vapor deposition process and a photoetching process, the used materials are the same metal, and the distance between the two is 1-50 mu m; the width and the length of the top electrode are respectively 10-1500 mu m, and the thickness is 50-300 nm.
The beneficial effects of the further scheme are as follows: in order to ensure the driving capability of the thin film transistor device to the capacitor and the microfluidic channel device, the driving capability of the thin film transistor device needs to be improved. The optimization shows that the channel length of the thin film transistor, namely the distance between the source electrode and the drain electrode, is within the range of 1-50 microns, the driving capability of the device is reduced when the channel length is larger than 50 microns, the driving capability of the device is reduced when the channel length is smaller than 1 micron, the electric leakage of the thin film transistor is possibly deteriorated, and the driving efficiency of the micro-fluid array controller is reduced.
Further, the process for preparing the bottom electrode and the top electrode is a physical vapor deposition process and a photoetching process, and the used material is metal; the distance between the top hydrophobic layer and the bottom hydrophobic layer is 1-120 mu m;
the process for preparing the insulating layer of the microfluidic channel device is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride, parylene and SU8 photoresist, and the thickness is 30 nm-10 mu m;
the process for preparing the bottom hydrophobic layer and the top hydrophobic layer is a chemical vapor deposition process or a spin coating process, the used material is an organic hydrophobic material or a micro-nano scale super-hydrophobic material, and the thickness of the organic hydrophobic material and the thickness of the micro-nano scale super-hydrophobic material are respectively 1-200 nm.
The beneficial effects of the further scheme are as follows: and a better driving efficiency can be obtained by keeping the distance between the top hydrophobic layer and the bottom hydrophobic layer between 1-120 mu m. The insulating layer of the microfluidic channel device is used to ensure the electrical insulating property between the top electrode and the droplet, reducing the possibility of electrode leakage and electrolytic reaction of the electrode. The top hydrophobic layer and the bottom hydrophobic layer can reduce viscous resistance when the liquid moves and reduce the driving voltage of the microfluidic channel device.
Further, the process for preparing the window is a photoetching process and an etching process; the window overlaps with the semiconductor layer;
the process for preparing the side wall of the hydrophilic insulating material comprises a spin coating process and a photoetching process, wherein the hydrophilic insulating material comprises at least one of photoresist, oxide and parylene.
The beneficial effects of the further scheme are as follows: the window can reduce the influence of higher voltage of the top electrode on the lower-layer thin film transistor, reduce leakage current and prolong the holding time of voltage on the microfluidic channel device and the capacitor. And the hydrophilic material is added, so that the functions of positioning in the microfluidic channel and limiting liquid drops can be realized, and the accurate positioning of the liquid drops in array control is facilitated.
Further, the physical vapor deposition process comprises at least one of sputtering and evaporation;
the chemical vapor deposition process comprises at least one of plasma vapor deposition, low-pressure vapor deposition and atomic layer deposition;
the metal comprises at least one of aluminum, aluminum-silicon alloy, gold, platinum, molybdenum, copper, titanium and ITO.
The beneficial effects of the further scheme are as follows: by utilizing the microelectronic process, namely the physical vapor deposition process and the chemical vapor deposition process, the microfluidic channel device and the control layer below the microfluidic channel device can be integrated to form an integrated microfluidic control unit. The micro-electronic process can also reduce the size of the micro-fluid array controller, improve the control precision, reduce the manufacturing cost of the large-scale micro-fluid array controller in the prior art and improve the consistency and the repeatability of manufacturing.
In the invention, the technical schemes can be combined with each other to realize more preferable combination schemes. Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
Drawings
The drawings are only for purposes of illustrating particular embodiments and are not to be construed as limiting the invention, wherein like reference numerals are used to designate like parts throughout.
FIG. 1 is a schematic diagram of a prior art microfluidic array controller;
FIG. 2 is a schematic view of the preparation process of example 1 of the present invention;
FIG. 3 is a structural diagram of a microfluidic control unit fabricated by the fabrication method of example 1 of the present invention;
FIG. 4 is a diagram showing the structure of a microfluidic array controller prepared by the preparation method of example 1 of the present invention;
FIG. 5 is a schematic view of a method for producing a microfluidic control unit according to example 2 of the present invention;
FIG. 6 is a schematic view of a method for preparing a control layer of a microfluidic control unit according to example 2 of the present invention;
FIG. 7 is a schematic view of a method for preparing a microfluidic channel layer of a microfluidic control unit according to example 2 of the present invention;
FIG. 8 is a structural view of a microfluidic control unit fabricated by a fabrication method according to example 2 of the present invention;
fig. 9 is a schematic diagram of a window formed on the top electrode in embodiment 2 of the present invention.
Reference numerals:
11-a top electrode; 12-a top hydrophobic layer; 13-a channel region; 14-bottom water transfer layer; 15-an insulating layer of the microfluidic channel device; 16-a bottom electrode; 130-a liquid; 21-a source electrode; 22-a drain electrode; 23-a semiconductor layer; 24-a gate insulating layer; 25-a gate electrode; 31-top electrode of capacitance; 32-insulating layer of capacitance; 33-ground electrode of the capacitance; 4-a passivation layer; 40-through holes; 5-glass or silicon wafer substrate; 6-glass.
Detailed Description
The accompanying drawings, which are incorporated in and constitute a part of this application, illustrate preferred embodiments of the invention and together with the description, serve to explain the principles of the invention and not to limit the scope of the invention.
Example 1
As shown in fig. 2, one embodiment of the present invention discloses a method for preparing a microfluidic array controller, comprising the following steps:
s1, preparing a microfluid control unit, wherein the microfluid control unit comprises a microfluid channel device, a thin film transistor device and a capacitor.
S2, selecting the power supply 1 and the power supply 2 according to preset requirements.
S3, arranging the M multiplied by N micro-fluid control units into an M multiplied by N array, wherein in each row, the gate electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; in each row, the source electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; the drain electrodes of all thin film transistor devices are connected to a power supply 1 via the corresponding microfluidic channel device and to a power supply 2 via the corresponding capacitor.
The microfluidic control unit prepared by the preparation method is shown in fig. 3, and comprises a microfluidic channel device, a thin film transistor device and a capacitor. Wherein the drain electrode of the microfluidic channel device is connected to the top electrode of the capacitor and to the bottom electrode of the microfluidic channel device (bottom electrode is shown facing upwards in the figure).
The microfluid array controller prepared by the preparation method is shown in fig. 4, and in the array, the gate electrodes of all the thin film transistor devices in each row are connected and connected with external corresponding row control signals; in each column, the source electrodes of all the thin film transistor devices are connected and are connected with external corresponding column control signals; the drain electrodes of all thin film transistor devices are connected to a power supply 1 via the corresponding microfluidic channel device and to a power supply 2 via the corresponding capacitor.
In implementation, because each microfluidic channel device of the microfluidic controller prepared by the preparation method is provided with liquid, the thin film transistor device gates the microfluidic channel device of the unit under the combined action of the corresponding external row control signal and the column control signal, and the liquid can be moved, divided, fused and the like in the microchannel of the microfluidic channel device.
Specifically, one row is gated through a gate electrode lead in the row direction, and then a voltage value is written into the target microfluidic channel device through a source electrode lead in the column direction. The voltage value in the whole array is set through sequential gating of the grid leads, so that microfluid control is realized.
Compared with the prior art, the microfluidic array controller prepared by the method provided by the embodiment can accurately control the working state of the microfluidic channel device in each control unit through the row control signal and the column control signal, and for an M × N array, the number of leads is only M + N +2, so that the number of the leads is obviously reduced compared with the existing microfluidic array controller in the background art. When M is 100 and N is 100, the number of leads is only 202, which is much smaller than 10001 in the existing microfluidic array control method. Obviously, the method can realize large-scale microfluidic array control, and provides a new technical approach for the practicability of the microfluidic control chip.
Example 2
As shown in fig. 5, the optimization is performed based on the above embodiment, and the step of preparing the microfluidic control unit includes:
s11, preparing a control layer of the microfluidic control unit on a silicon wafer or a first glass substrate, wherein the control layer comprises a thin film transistor device and a capacitor.
S12, preparing a passivation layer on the control layer, and manufacturing a through hole at a preset position on the passivation layer. The passivation layer is prepared by chemical vapor deposition or physical vapor deposition, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride and parylene, and the thickness is 100 nm-2 μm. The process of making the through hole on the passivation layer is a photoetching and etching process. The preset position of the through hole is above the drain electrode of the thin film transistor.
S13, preparing a micro-fluid channel layer of the micro-fluid control unit on the passivation layer, wherein the micro-fluid channel layer comprises a micro-fluid channel device; the bottom electrode of the microfluidic channel device is electrically connected to the top electrode of the capacitor and the drain electrode of the thin film transistor device through the via. In this embodiment, the bottom electrode, the top electrode, and the drain electrode are connected together. The height of the channel region of the microfluidic channel device is less than 120 μm. Simulation verification proves that better driving efficiency can be obtained by keeping the top hydrophobic layer and the bottom hydrophobic layer between 1-120 mu m, the height of a channel area is too high, and the moving efficiency of liquid in a microfluidic channel device is greatly reduced and even cannot be driven.
S14, preparing a window overlapped with the area of the semiconductor layer on the top electrode of the microfluidic channel device above the semiconductor layer of the thin film transistor device, and using the window to reduce leakage current and improve the voltage holding time of the microfluidic channel device and the capacitor. The process for preparing the window comprises a photoetching process and an etching process. The window and the semiconductor layer position should overlap in top view. This window may reduce the effect of higher steering voltages on the underlying semiconductor layer, as shown in fig. 9.
S15, preparing a side wall made of a hydrophilic insulating material at the edge of the channel area; the side walls of the hydrophilic insulating material are not in contact with the top hydrophobic layer. By adding the hydrophilic material, the function of positioning and limiting liquid drops in the microfluidic channel can be achieved, and the liquid drops can be accurately positioned during array control. The process for preparing the side wall of the hydrophilic insulating material comprises a spin coating process and a photoetching process, wherein the hydrophilic insulating material comprises at least one of photoresist, oxide and parylene, and can also be other hydrophilic insulating materials. The hydrophilic insulating material can be at least one of rectangular, circular, oval, diamond and hexagonal according to the requirement of practical application.
And S16, injecting liquid into a channel region of the microfluidic channel device. The liquid is at least one of silicone oil, water or organic material, and can be a combination of a plurality of kinds, and other liquids can be adopted. And organic matters such as silicon oil or n-dodecane are filled, so that the viscous resistance of the liquid during movement can be greatly reduced, the driving voltage of the microfluid array controller is reduced, and the liquid driving efficiency is improved.
As shown in fig. 6, the step of preparing the control layer of the microfluidic control unit on a silicon wafer or glass substrate includes:
and S111, preparing a gate electrode of the thin film transistor device and a ground electrode of the capacitor on the silicon wafer or the first glass substrate. The process for preparing the gate electrode and the ground electrode is a physical vapor deposition process and a photoetching process, the used material is metal, and the thickness of the metal are the same and are 50-300 nm. Specifically, a layer of metal is deposited on a silicon wafer or a first glass substrate by using a physical vapor deposition process, and then the metal is patterned by using a photolithography process to form a gate electrode and a capacitor ground electrode.
And S112, preparing an insulating layer on the gate electrode and the ground electrode, wherein the part of the insulating layer corresponding to the gate electrode of the thin film transistor device is a gate insulating layer, and the part of the insulating layer corresponding to the ground electrode of the capacitor is an insulating layer of the capacitor. The process for preparing the gate insulating layer and the insulating layer of the capacitor is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide and silicon nitride, and the thickness is 50 nm-1 μm.
And S113, preparing a semiconductor layer of the thin film transistor device on the gate insulating layer. The process for preparing the semiconductor layer is a physical vapor deposition process, a chemical vapor deposition process and a photoetching process, the used material is at least one of amorphous thin film materials such as amorphous silicon, indium gallium zinc oxide, tin oxide, polycrystalline silicon and the like, or other materials, and the thickness is 10-100 nm. Specifically, a layer of semiconductor thin film material is deposited by using a physical vapor deposition or chemical vapor deposition process, and then the semiconductor thin film material is patterned by using a photoetching process to prepare a semiconductor layer, so that the semiconductor layer is positioned above the gate electrode.
S114, preparing a source electrode and a drain electrode of the thin film transistor device on the semiconductor layer; the source electrode and the drain electrode are arranged on two sides of the semiconductor layer and are in contact with the semiconductor layer; and preparing a top electrode of the capacitor on the insulating layer of the capacitor, wherein the drain electrode is electrically connected with the top electrode. The process for preparing the source electrode and the drain electrode is a physical vapor deposition process and a photoetching process, the used materials are the same metal, and the distance between the two is 1-50 mu m; the top electrode has a width and a length of 10-1500 μm and a thickness of 50-300 nm. Specifically, a layer of metal is deposited using a physical vapor deposition process, and the metal is patterned using a photolithography process into two parts, one part serving as a source electrode and the other part serving as a drain electrode and a capacitor top electrode.
As shown in fig. 7, the step of preparing the microfluidic channel layer of the microfluidic control unit includes:
s131, preparing a bottom electrode of the microfluidic channel device on the passivation layer by adopting metal; the metal through via electrically connects the bottom electrode to the top electrode of the capacitor and the drain electrode of the thin film transistor device. The process for preparing the bottom electrode is a physical vapor deposition process and a photoetching process, and the used material is metal. Specifically, a layer of metal is deposited using physical vapor deposition and the metal is patterned using photolithography to form the bottom electrode. The bottom electrode is electrically connected to the top electrode of the capacitor through the via.
S132, preparing an insulating layer of the microfluidic channel device on the bottom electrode. The insulating layer of the microfluidic channel device is used to ensure the electrical insulating property between the top electrode and the droplet, reducing the possibility of electrode leakage and electrolytic reaction of the electrode. The insulating layer of the microfluidic channel device can improve the pressure resistance of the passivation layer. The process for preparing the insulating layer of the microfluidic channel device is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride, parylene and SU8 photoresist or other materials, and the thickness is 30 nm-10 mu m.
S133, preparing a bottom hydrophobic layer on an insulating layer of the microfluidic channel device. The process for preparing the bottom hydrophobic layer is a chemical vapor deposition process or a spin coating process, the material of the bottom hydrophobic layer is an organic hydrophobic material or a structural hydrophobic material, such as polytetrafluoroethylene, teflon, parylene and the like, polytetrafluoroethylene is adopted in the embodiment, and the thickness of the polytetrafluoroethylene is 1-200 nm. The insulating and hydrophobic layers of the microfluidic channel device function to electrically insulate and reduce the resistance to liquid flow. Preferably, the bottom hydrophobic layer and the insulating layer of the microfluidic channel device may be made of the same material having insulating and surface superhydrophobic properties.
S134, preparing a top electrode on the second glass substrate, and preparing a top hydrophobic layer on the top electrode to obtain the top structure of the microfluidic channel device. The process for preparing the top electrode comprises a physical vapor deposition process and a photoetching process, the used material is metal, and the thickness is 10-300 nm. The top hydrophobic layer is prepared by a chemical vapor deposition process or a spin coating process, the top hydrophobic layer is made of an organic hydrophobic material or a structural hydrophobic material, such as polytetrafluoroethylene, teflon and the like, and is made of a multilayer material with surface hydrophobic characteristics and formed by other insulating materials, and the thickness of the multilayer material is 1-200 nm. In this embodiment, the top electrode is made of ITO, which is a transparent conductive material. The top hydrophobic layer and the bottom hydrophobic layer can reduce viscous resistance when the liquid moves and reduce the driving voltage of the microfluidic channel device.
And S135, suspending the top structure above the bottom hydrophobic layer from bottom to top according to the sequence of the top hydrophobic layer, the top electrode and the glass substrate, so that a channel area is formed between the top hydrophobic layer and the bottom hydrophobic layer. The distance between the top hydrophobic layer and the bottom hydrophobic layer is 1-120 mu m. And a better driving efficiency can be obtained by keeping the distance between the top hydrophobic layer and the bottom hydrophobic layer between 1-120 mu m.
Preferably, the physical vapor deposition process comprises at least one of sputtering, evaporation. The chemical vapor deposition process includes at least one of plasma vapor deposition (PECVD), low pressure vapor deposition (LPCVD), Atomic Layer Deposition (ALD), and others. The metal comprises at least one of aluminum, aluminum-silicon alloy, gold, platinum, molybdenum, copper, titanium and ITO.
The microfluidic control unit prepared by the above preparation method is shown in fig. 8. The prepared microfluidic control units are arranged into an M × N array, and each control unit comprises a microfluidic channel layer and a control layer positioned below the microfluidic channel layer. The control layer is positioned below the microfluidic channel layer and used for controlling the upper microfluidic channel layer so as to realize the function of microfluidic control.
And under the combined action of the corresponding row control signal and the column control signal, the thin film transistor device gates the microfluidic channel device of the microfluidic control unit, and the liquid can flow in the microchannel of the microfluidic channel device.
In each control unit, as shown in fig. 8, the microfluidic channel device sequentially includes, from bottom to top, a bottom electrode, an insulating layer, a bottom hydrophobic layer, a channel region, a top hydrophobic layer, and a top electrode. The thin film transistor comprises a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode and a drain electrode, wherein the gate insulating layer is positioned above the gate electrode, the semiconductor layer is positioned on the gate insulating layer, and the source electrode and the drain electrode are positioned on two sides of the semiconductor layer and are connected with the semiconductor layer. The capacitor comprises a top electrode, an insulating layer and a ground electrode, wherein the insulating layer and the gate insulating layer are in the same layer and made of one material. The capacitor top electrode is connected with the drain electrode of the thin film transistor. The bottom electrode of the microfluidic channel device is electrically connected with the capacitor fixed electrode through the through hole.
In practice, a channel region is formed between the top hydrophobic layer and the bottom hydrophobic layer. According to the control requirement, the following conditions can be adopted in the channel region:
case 1: and filling the water solution with water as a solvent, and controlling the behavior of the water solution by controlling the voltage of the top electrode.
Case 2: and silicone oil is filled in the gaps, so that the flow resistance of the aqueous solution is reduced.
Case 3: and forming a patterned side wall region in the gap, wherein the side wall region is not in contact with the top hydrophobic layer, and other regions in the channel region are filled with a mixed solution or a multilayer solution formed by an aqueous solution and an oily liquid. The sidewall spacer can be, but is not limited to, an inorganic oxide, an organic material, such as parylene, photoresist, and the like.
Case 4: and forming a patterned side wall region at the edge inside the gap, wherein the side wall plays a role of supporting the top structure and is connected with the top hydrophobic layer. The sidewall spacer can be, but is not limited to, an inorganic oxide, an organic material, such as parylene, photoresist, and the like.
The microfluidic controller can be formed by periodically arranging the microfluidic control units in an array, and the number of rows and columns of the array can be expanded at will. When the array works, the control voltage range between the grid lead and the source lead is +/-100V.
Compared with the embodiment 1, the microfluidic array controller prepared by the method provided by the embodiment creatively arranges a window on the top electrode, can reduce the influence of the top high voltage on the performance of the thin film transistor device, and can enable the thin film transistor device to be applied in the voltage environment of up to 200V. At the same time, through the inventive design and optimization of parameters, relevant parameters enable the top electrode to operate in a high voltage range consistent with microfluidic control. In addition, by arranging the insulating layer of the microfluidic channel device, the microfluidic control voltage of the invention is reduced to about 20V, compared with 50V in the prior art, the control voltage is obviously reduced, and the actual use requirement can be met.
Those skilled in the art will appreciate that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware, and the program may be stored in a computer-readable storage medium. The computer readable storage medium is a magnetic disk, an optical disk, a read-only memory or a random access memory.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present invention are included in the scope of the present invention.
Claims (7)
1. A method for preparing a microfluidic array controller is characterized by comprising the following steps:
preparing a microfluidic control unit, wherein the microfluidic control unit comprises a microfluidic channel device, a thin film transistor device and a capacitor;
selecting a power supply 1 and a power supply 2 according to a preset requirement;
arranging the M multiplied by N micro-fluid control units into an M multiplied by N array, wherein in each row, the gate electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; in each row, the source electrodes of all the thin film transistor devices are connected and are connected with corresponding row control signals; the drain electrodes of all the thin film transistor devices are connected with a power supply 1 through corresponding microfluidic channel devices and connected with a power supply 2 through corresponding capacitors;
the step of preparing the microfluidic control unit comprises:
preparing a control layer of a microfluidic control unit on a silicon wafer or a first glass substrate, wherein the control layer comprises a thin film transistor device and a capacitor; the thin film transistor device comprises a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode and a drain electrode, wherein the gate insulating layer is positioned above the gate electrode, the semiconductor layer is positioned above the gate insulating layer, the source electrode and the drain electrode are positioned on two sides of the semiconductor layer and are connected with the semiconductor layer, and a window overlapped with the semiconductor layer in area is prepared on a top electrode of the microfluidic channel device above the semiconductor layer; the capacitor comprises a top electrode, an insulating layer and a ground electrode; the top electrode of the capacitor is connected with the drain electrode of the thin film transistor;
preparing a passivation layer on the control layer, and manufacturing a through hole at a preset position on the passivation layer;
preparing a microfluidic channel layer of a microfluidic control unit on the passivation layer, the microfluidic channel layer including a microfluidic channel device; the bottom electrode of the microfluidic channel device is electrically connected with the top electrode of the capacitor and the drain electrode of the thin film transistor device through the through hole; arranging a side wall made of a hydrophilic insulating material at the edge of the channel area, wherein the side wall is not in contact with the top hydrophobic layer;
injecting a liquid into a channel region of the microfluidic channel device;
the step of preparing the microfluidic channel layer of the microfluidic control unit includes:
preparing a bottom electrode of the microfluidic channel device on the passivation layer using a metal; the metal penetrates through the through hole, so that the bottom electrode is electrically connected with the top electrode of the capacitor and the drain electrode of the thin film transistor device;
preparing an insulating layer of a microfluidic channel device on the bottom electrode;
preparing a bottom hydrophobic layer on an insulating layer of the microfluidic channel device;
preparing a top electrode on a second glass substrate, and preparing a top hydrophobic layer on the top electrode to obtain a top structure of the microfluidic channel device;
and suspending the top structure above the bottom hydrophobic layer from bottom to top according to the sequence of the top hydrophobic layer, the top electrode and the glass substrate, so that a channel area is formed between the top hydrophobic layer and the bottom hydrophobic layer.
2. The method of claim 1, wherein the step of fabricating the control layer of the microfluidic control unit on a silicon wafer or a first glass substrate comprises:
preparing a gate electrode of the thin film transistor device and a ground electrode of the capacitor on a silicon wafer or a first glass substrate;
preparing an insulating layer on the gate electrode and the ground electrode, wherein the part of the insulating layer corresponding to the gate electrode of the thin film transistor device is a gate insulating layer, and the part of the insulating layer corresponding to the ground electrode of the capacitor is the insulating layer of the capacitor;
preparing a semiconductor layer of the thin film transistor device on the gate insulating layer;
preparing a source electrode and a drain electrode of the thin film transistor device on the semiconductor layer; the source electrode and the drain electrode are arranged on two sides of the semiconductor layer and are in contact with the semiconductor layer; and preparing a top electrode of the capacitor on the insulating layer of the capacitor, wherein the drain electrode is electrically connected with the top electrode.
3. The method of claim 1, wherein the passivation layer is formed by chemical vapor deposition or physical vapor deposition, and is made of at least one material selected from the group consisting of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride, and parylene, and has a thickness of 100nm to 2 μm;
the process for manufacturing the through hole on the passivation layer is photoetching and etching;
the height of the channel region of the microfluidic channel device is less than 120 μm;
the liquid is at least one of water or an organic material.
4. The method for preparing a microfluidic array controller according to claim 2, wherein the processes for preparing the gate electrode and the ground electrode are a physical vapor deposition process and a photolithography process, the materials are metals, and the thicknesses of the materials are 50-300 nm respectively;
the process for preparing the gate insulating layer and the insulating layer of the capacitor is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide and silicon nitride, and the thickness is 50 nm-1 mu m;
the process for preparing the semiconductor layer is a physical vapor deposition process or a chemical vapor deposition process, and a photoetching process, the used material is at least one of amorphous silicon, indium gallium zinc oxide, tin oxide and polycrystalline silicon, and the thickness of the material is 10-100 nm;
the process for preparing the source electrode and the drain electrode is a physical vapor deposition process and a photoetching process, the used materials are the same metal, and the distance between the two is 1-50 mu m; the width and the length of the top electrode are respectively 10-1500 mu m, and the thickness is 50-300 nm.
5. The method of claim 2, wherein the bottom electrode and the top electrode are formed by physical vapor deposition and photolithography, and the material is metal; the distance between the top hydrophobic layer and the bottom hydrophobic layer is 1-120 mu m;
the process for preparing the insulating layer of the microfluidic channel device is a chemical vapor deposition process, the used material is at least one of silicon oxide, hafnium oxide, aluminum oxide, titanium oxide, silicon nitride, parylene and SU8 photoresist, and the thickness is 30 nm-10 mu m;
the process for preparing the bottom hydrophobic layer and the top hydrophobic layer is a chemical vapor deposition process or a spin coating process, the used material is an organic hydrophobic material or a structural hydrophobic material, and the thickness of the organic hydrophobic material or the structural hydrophobic material is 1-200 nm respectively.
6. The method of claim 3, wherein the process of preparing the window is a photolithography process and an etching process;
the process for preparing the side wall of the hydrophilic insulating material comprises a spin coating process and a photoetching process, wherein the hydrophilic insulating material comprises at least one of photoresist, oxide and parylene.
7. The method of manufacturing a microfluidic array controller according to any one of claims 3-5, wherein the physical vapor deposition process comprises at least one of sputtering, evaporation;
the chemical vapor deposition process comprises at least one of plasma vapor deposition, low-pressure vapor deposition and atomic layer deposition;
the metal comprises at least one of aluminum, aluminum-silicon alloy, gold, platinum, molybdenum, copper, titanium and ITO.
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