CN108964639A - A kind of two-way hysteresis comparator - Google Patents
A kind of two-way hysteresis comparator Download PDFInfo
- Publication number
- CN108964639A CN108964639A CN201810576510.1A CN201810576510A CN108964639A CN 108964639 A CN108964639 A CN 108964639A CN 201810576510 A CN201810576510 A CN 201810576510A CN 108964639 A CN108964639 A CN 108964639A
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- pmos tube
- connects
- phase inverter
- drain electrode
- tube
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- 101150070189 CIN3 gene Proteins 0.000 claims description 4
- 101150110971 CIN7 gene Proteins 0.000 claims description 2
- 101100286980 Daucus carota INV2 gene Proteins 0.000 claims description 2
- 101100508840 Daucus carota INV3 gene Proteins 0.000 claims description 2
- 101150110298 INV1 gene Proteins 0.000 claims description 2
- 101100397044 Xenopus laevis invs-a gene Proteins 0.000 claims description 2
- 101100397045 Xenopus laevis invs-b gene Proteins 0.000 claims description 2
- 238000000034 method Methods 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000009471 action Effects 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000007306 turnover Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
- H03K5/2472—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors
- H03K5/2481—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using field effect transistors with at least one differential stage
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Manipulation Of Pulses (AREA)
Abstract
The invention belongs to Analogous Integrated Electronic Circuits technical field, a kind of two-way hysteresis comparator.The present invention mainly realizes compared with traditional hysteresis comparator and does not introduce misalignment rate while hysteresis, and improves the response speed of circuit；Furthermore change circuit and also maintain stability and reliability.The two-way hysteresis comparator result is simple, easy to accomplish, has application value.
Description
Technical field
The invention belongs to Analogous Integrated Electronic Circuits technical fields, more particularly to rise overturning and decline overturning and all there is sluggish make
Comparator.
Background technique
Hysteresis comparator is very important basic circuit in field of analog integrated circuit, and under normal condition, sluggishness is relatively
Device only unidirectionally exist an amount of hysteresis, that is, rise or decline process.But this there are signal interferences in another direction can
Output can occur accidentally to touch, reduce circuit reliability.
Summary of the invention
The problem to be solved in the present invention is in view of the above problems, designing a hysteresis comparator with two-way stable, together
Shi Tigao anti-interference ability reduces imbalance.
Technical solution of the present invention is as shown, a kind of two-way hysteresis comparator, including the first PMOS tube MP1, the 2nd PMOS
Pipe MP2, third PMOS tube MP3, the 4th PMOS tube MP4, the first NMOS tube MN1, the second NMOS tube MN2, third NMOS tube MN3,
First phase inverter INV1, the second phase inverter INV2, third phase inverter INV3, the 4th phase inverter INV4；First PMOS tube MP1 source electrode
Power supply is connect, grid meets V1；Second PMOS tube MP2 source electrode connects power supply, and grid meets V1；Third PMOS tube MP3 source electrode connects power supply, grid
Pole connects the drain electrode of the first PMOS tube MP1；4th PMOS tube MP4 source electrode connects power supply, and grid connects the drain electrode of the second PMOS tube MP2；The
The drain electrode of one NMOS tube MN1 connects the drain electrode of the first PMOS tube MP1, and grid meets Va；；The drain electrode of second NMOS tube MN2 connects second
The drain electrode of PMOS tube MP2, grid meet Vb；Third NMOS tube MN3, which drains, connects the source of the first NMOS tube MN1, the second NMOS tube MN2
Pole, grid connect V2, source electrode ground connection；First phase inverter inputs the drain electrode for meeting the 4th PMOS tube MP4, and output meets third PMOS tube MP3
Drain electrode；Second phase inverter inputs the drain electrode for meeting third PMOS tube MP3, and output connects the drain electrode of the 4th PMOS tube MP4；Third reverse phase
Device inputs the drain electrode for meeting the 4th PMOS tube MP4, and output meets the 4th phase inverter INV4；It is defeated that the input of 4th phase inverter connects third phase inverter
Out, output meets out, is output end.
Detailed description of the invention
Fig. 1 is the invention patent integrated circuit.
Specific embodiment
To be more clear features described above and advantage of the invention, with reference to the accompanying drawing to a specific embodiment of the invention
It is described in detail.
Va and Vb is two input terminals of hysteresis comparator, turnover voltage Va-Vb=Vos.Output Vc control MP3's opens
It opens or ends, the unlatching or cut-off of output Vd control MP4, so that it is high or low for controlling output out.Flow through MP1, the electricity of MP2
I is flowed, the electric current nI of MN3 is flowed through, wherein 1 < n < 2, to determine the size of amount of hysteresis.In traditional comparator, n=1 is not present
Amount of hysteresis.MP1 is enabled, MP2 bias current I, β are the gain factor of MOSFET.
As Vb-Va > Vos1: Vd pulls down MP4 and opens, and Vout output is height, To realize lag function.
As Va-Vb > Vos2: Vc pull down MP3 open, Vout output be it is low, To realize lag function.
No matter Vb, which is greater than Va or Va, is greater than Vb, and circuit all has certain amount of hysteresis, and circuit is five basic pipes
Symmetric circuit, without introducing imbalance because of hysteresis；Vc, Vd belong to drop-down current potential, and drop-down speed is fast, for quickly ringing
Castering action can be had by answering the application of circuit；When Vc is height, MP3 shutdown, the electric leakage position of MP3 is hanging at this time, it is therefore desirable to by MP4's
Drain terminal is connected to MP3 drain terminal by a phase inverter, avoids influence of the interference potential therefore generated to output, improves circuit
Stability.
The above described is only a preferred embodiment of the present invention, being not intended to limit the present invention in any form.Appoint
What those skilled in the art, without departing from the scope of the technical proposal of the invention, all using the side of the disclosure above
Method and technology contents make many possible changes and modifications to technical solution of the present invention, or are revised as the equivalent reality of equivalent variations
Apply example.Therefore, anything that does not depart from the technical scheme of the invention according to the technical essence of the invention do above embodiments
Any simple modifications, equivalents, and modifications, all of which are still within the scope of protection of the technical scheme of the invention.
Claims (1)
1. a kind of two-way hysteresis comparator, including the first PMOS tube MP1, the second PMOS tube MP2, third PMOS tube MP3, the 4th
PMOS tube MP4, the first NMOS tube MN1, the second NMOS tube MN2, third NMOS tube MN3, the first phase inverter INV1, the second phase inverter
INV2, third phase inverter INV3, the 4th phase inverter INV4；First PMOS tube MP1 source electrode connects power supply, and grid meets V1；Second
PMOS tube MP2 source electrode connects power supply, and grid meets V1；Third PMOS tube MP3 source electrode connects power supply, and grid connects the leakage of the first PMOS tube MP1
Pole；4th PMOS tube MP4 source electrode connects power supply, and grid connects the drain electrode of the second PMOS tube MP2；The drain electrode of first NMOS tube MN1 connects
The drain electrode of one PMOS tube MP1, grid meet Va；；The drain electrode of second NMOS tube MN2 connects the drain electrode of the second PMOS tube MP2, and grid connects
Vb；Third NMOS tube MN3, which drains, connects the source electrode of the first NMOS tube MN1, the second NMOS tube MN2, and grid connects V2, source electrode ground connection；The
One phase inverter inputs the drain electrode for meeting the 4th PMOS tube MP4, and output connects the drain electrode of third PMOS tube MP3；The input of second phase inverter connects
The drain electrode of third PMOS tube MP3, output connect the drain electrode of the 4th PMOS tube MP4；The input of third phase inverter connects the 4th PMOS tube MP4's
Drain electrode, output meet the 4th phase inverter INV4；The input of 4th phase inverter connects the output of third phase inverter, and output meets out, is output end.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810576510.1A CN108964639A (en) | 2018-06-06 | 2018-06-06 | A kind of two-way hysteresis comparator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810576510.1A CN108964639A (en) | 2018-06-06 | 2018-06-06 | A kind of two-way hysteresis comparator |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108964639A true CN108964639A (en) | 2018-12-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810576510.1A Pending CN108964639A (en) | 2018-06-06 | 2018-06-06 | A kind of two-way hysteresis comparator |
Country Status (1)
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117706178A (en) * | 2024-02-05 | 2024-03-15 | 深圳市芯茂微电子有限公司 | Voltage monitoring circuit |
| CN117792361A (en) * | 2024-02-28 | 2024-03-29 | 芯聚威科技(成都)有限公司 | Power-on reset circuit and electronic equipment |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6172536B1 (en) * | 1998-07-07 | 2001-01-09 | Nec Corporation | Hysteresis comparator circuit |
| JP2003298408A (en) * | 2002-04-02 | 2003-10-17 | New Japan Radio Co Ltd | Level converting circuit |
| US20060109041A1 (en) * | 2004-11-23 | 2006-05-25 | Yuh-Kuang Tseng | Current comparator with hysteresis |
| CN101217059A (en) * | 2007-12-26 | 2008-07-09 | 中国航天时代电子公司第七七一研究所 | Self-timing SRAM access control circuit |
| US20100237908A1 (en) * | 2009-03-23 | 2010-09-23 | Atmel Corporation | Low current comparator with programmable hysteresis |
| CN204046133U (en) * | 2014-08-27 | 2014-12-24 | 淮安信息职业技术学院 | A kind of under-voltage protecting circuit with fast start circuit |
| CN104579260A (en) * | 2013-10-21 | 2015-04-29 | 上海华虹集成电路有限责任公司 | Hysteresis comparator for radio frequency identification |
| CN106374929A (en) * | 2016-12-02 | 2017-02-01 | 桂林电子科技大学 | Rapid-response dynamic latch comparator |
| CN206272588U (en) * | 2016-12-29 | 2017-06-20 | 福建亿芯源半导体股份有限公司 | Current comparator with lag function |
-
2018
- 2018-06-06 CN CN201810576510.1A patent/CN108964639A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6172536B1 (en) * | 1998-07-07 | 2001-01-09 | Nec Corporation | Hysteresis comparator circuit |
| JP2003298408A (en) * | 2002-04-02 | 2003-10-17 | New Japan Radio Co Ltd | Level converting circuit |
| US20060109041A1 (en) * | 2004-11-23 | 2006-05-25 | Yuh-Kuang Tseng | Current comparator with hysteresis |
| CN101217059A (en) * | 2007-12-26 | 2008-07-09 | 中国航天时代电子公司第七七一研究所 | Self-timing SRAM access control circuit |
| US20100237908A1 (en) * | 2009-03-23 | 2010-09-23 | Atmel Corporation | Low current comparator with programmable hysteresis |
| CN104579260A (en) * | 2013-10-21 | 2015-04-29 | 上海华虹集成电路有限责任公司 | Hysteresis comparator for radio frequency identification |
| CN204046133U (en) * | 2014-08-27 | 2014-12-24 | 淮安信息职业技术学院 | A kind of under-voltage protecting circuit with fast start circuit |
| CN106374929A (en) * | 2016-12-02 | 2017-02-01 | 桂林电子科技大学 | Rapid-response dynamic latch comparator |
| CN206272588U (en) * | 2016-12-29 | 2017-06-20 | 福建亿芯源半导体股份有限公司 | Current comparator with lag function |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN117706178A (en) * | 2024-02-05 | 2024-03-15 | 深圳市芯茂微电子有限公司 | Voltage monitoring circuit |
| CN117706178B (en) * | 2024-02-05 | 2024-04-26 | 深圳市芯茂微电子有限公司 | Voltage monitoring circuit |
| CN117792361A (en) * | 2024-02-28 | 2024-03-29 | 芯聚威科技(成都)有限公司 | Power-on reset circuit and electronic equipment |
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| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20191226 Address after: 644000 No.1, floor 11, building 1, No.2, Qinglong Street, chengbeixin District, Xuzhou District, Yibin City, Sichuan Province Applicant after: Yibin Xuxin Semiconductor Co.,Ltd. Address before: 611731 Chengdu province high tech Zone (West) West source Avenue, No. 2006 Applicant before: University of Electronic Science and Technology of China |
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| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20200520 Address after: 610000, No. 2006, West Avenue, Chengdu hi tech Zone (West District, Sichuan) Applicant after: University of Electronic Science and Technology of China Address before: 644000 No.1, floor 11, building 1, No.2, Qinglong Street, chengbeixin District, Xuzhou District, Yibin City, Sichuan Province Applicant before: Yibin Xuxin Semiconductor Co.,Ltd. |
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| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20181207 |