CN108962174B - Circuit for eliminating power-off flash, driving method thereof, display panel and display device - Google Patents
Circuit for eliminating power-off flash, driving method thereof, display panel and display device Download PDFInfo
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- CN108962174B CN108962174B CN201810871199.3A CN201810871199A CN108962174B CN 108962174 B CN108962174 B CN 108962174B CN 201810871199 A CN201810871199 A CN 201810871199A CN 108962174 B CN108962174 B CN 108962174B
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3685—Details of drivers for data electrodes
- G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
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Abstract
The invention discloses a circuit for eliminating shutdown flash, a driving method thereof, a display panel and a display device, wherein the circuit comprises: the device comprises a detection module, a comparison module and a driving module; the circuit can conduct the half-value analog voltage signal line and the data signal line in the shutdown process, so that the half-value analog voltage signal on the half-value analog voltage signal line and the data signal on the data signal line have the same power failure trend, and the power failure trend of the half-value analog voltage signal is similar to that of the common voltage signal in the prior art.
Description
Technical Field
The invention relates to the technical field of display, in particular to a circuit for eliminating shutdown flash, a driving method thereof, a display panel and a display device.
Background
A Liquid Crystal Display (LCD) panel has the advantages of light weight, thin thickness, low power consumption, easy driving, no harmful rays, and the like, and has been widely used in modern information devices such as televisions, notebook computers, mobile phones, personal digital assistants, and the like, and has a wide development prospect. And the large size and ultra high definition of the liquid crystal display panel is an important development direction of the display technology.
An Advanced Super Dimension Switch (ADS) lcd panel is a large-sized and high-definition lcd panel. However, the ADS LCD panel has a phenomenon of white flash when turned off. The specific reason is as follows: in the shutdown process, the power-down trend of the half-value analog voltage signal is close to that of the common voltage signal, but the power-down speed of the data signal is obviously higher than that of the half-value analog voltage signal and that of the common voltage signal, so that large pressure difference caused by the data signal and the common voltage signal exists at two ends of liquid crystal molecules, the duration is long, and human eyes can observe that the display panel flashes a white picture.
Disclosure of Invention
The embodiment of the invention provides a circuit for eliminating power-off flash, a driving method thereof, a display panel and a display device, which are used for avoiding the flash phenomenon in the power-off process.
The embodiment of the invention provides a circuit for eliminating shutdown flash, which comprises: the device comprises a detection module, a comparison module and a driving module;
the detection module is respectively connected with a digital voltage signal end and a first node and is used for determining the voltage of the first node according to a digital voltage signal of the digital voltage signal end;
the comparison module is respectively connected with the first node, the reference signal end and the second node and is used for writing a first signal into the second node when the reference signal of the reference signal end is determined to be greater than or equal to the voltage of the first node;
the driving module is respectively connected with the second node, the half-value analog voltage signal line and the data signal line and is used for conducting the half-value analog voltage signal line and the data signal line under the control of the first signal of the second node in the shutdown process.
In a possible implementation manner, in the circuit for eliminating shutdown flash, provided in an embodiment of the present invention, the comparing module is further configured to write a second signal into the second node when it is determined that a reference signal of the reference signal terminal is smaller than a voltage of the first node;
the driving module is further configured to disconnect the half-value analog voltage signal line from the data signal line under control of a second signal of the second node in a display process.
In a possible implementation manner, in the circuit for eliminating shutdown flash, provided in an embodiment of the present invention, the detecting module includes: a first resistor and a second resistor;
one end of the first resistor is connected with the digital voltage signal end, and the other end of the first resistor is connected with the first node;
one end of the second resistor is connected with the first node, and the other end of the second resistor is grounded.
In a possible implementation manner, in the circuit for eliminating shutdown flash, provided in an embodiment of the present invention, the comparing module includes: a voltage comparator and an amplifier;
the positive phase input end of the voltage comparator is connected with the first node, the negative phase input end of the voltage comparator is connected with the reference signal end, the output end of the voltage comparator is connected with the control end of the amplifier, the input end of the amplifier is connected with a power supply end through the second node, and the output end of the amplifier is grounded.
In a possible implementation manner, in the circuit for eliminating shutdown flash, provided by the embodiment of the present invention, the amplifier includes a third resistor, a triode, and a fourth resistor;
the base electrode of the triode is connected with the output end of the voltage comparator through the third resistor, the collector electrode of the triode is connected with the second node, and the emitter electrode of the triode is grounded;
one end of the fourth resistor is connected with the second node, and the other end of the fourth resistor is connected with the power supply end.
In a possible implementation manner, in the circuit for eliminating shutdown flash, provided by the embodiment of the present invention, the driving module includes a plurality of sequentially connected switching transistors, and the number of the switching transistors is the same as the number of the data signal lines;
the grid electrode of each switch transistor is connected with the second node;
a first pole of the first switch transistor is connected with the half-value analog voltage signal line, and a second pole of the last switch transistor is connected with the data signal line;
the first pole of each of the switching transistors and the second pole of the switching transistor adjacent thereto are connected to the same one of the data signal lines except for the first pole of the first switching transistor and the second pole of the last switching transistor.
Based on the same inventive concept, the embodiment of the invention also provides a display panel, which comprises the circuit for eliminating the shutdown flash.
In a possible implementation manner, the display panel provided in the embodiment of the present invention includes a timing control board and a source data driving chip; the detection module and the comparison module of the circuit for eliminating shutdown flash are located on the time sequence control board, and the driving module is located on the source data driving chip.
Based on the same inventive concept, the embodiment of the invention also provides a display device, which comprises the display panel.
Correspondingly, an embodiment of the present invention further provides a driving method of the circuit for eliminating shutdown flash, including:
the detection module determines the voltage of the first node according to the digital voltage signal of the digital voltage signal end;
the comparison module writes the first signal into the second node when determining that the reference signal of the reference signal end is greater than or equal to the voltage of the first node;
and the driving module conducts the half-value analog voltage signal line and the data signal line under the control of the first signal of the second node in the shutdown process.
The embodiment of the invention has the beneficial effects that:
the embodiment of the invention provides a circuit for eliminating shutdown flash, a driving method thereof, a display panel and a display device, wherein the circuit for eliminating the shutdown flash comprises the following components: the device comprises a detection module, a comparison module and a driving module; the detection module is respectively connected with the digital voltage signal end and the first node and is used for determining the voltage of the first node according to the digital voltage signal of the digital voltage signal end; the comparison module is respectively connected with the first node, the reference signal end and the second node and is used for writing the first signal into the second node when the reference signal of the reference signal end is determined to be greater than or equal to the voltage of the first node; the driving module is respectively connected with the second node, the half-value analog voltage signal line and the data signal line and used for conducting the half-value analog voltage signal line and the data signal line under the control of the first signal of the second node in the shutdown process.
The circuit can conduct the half-value analog voltage signal line and the data signal line in the shutdown process, so that the half-value analog voltage signal on the half-value analog voltage signal line and the data signal on the data signal line have the same power failure trend, and the power failure trend of the half-value analog voltage signal is similar to that of the common voltage signal in the prior art.
Drawings
Fig. 1 is a schematic structural diagram of a circuit for eliminating shutdown flash according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a circuit for eliminating shutdown flash shown in fig. 1 according to an embodiment of the present invention;
FIG. 3 is a flowchart of a driving method of a circuit for eliminating power-off flash according to an embodiment of the present invention;
fig. 4 is a timing diagram illustrating an operation of the circuit for eliminating the shutdown flash shown in fig. 2 according to an embodiment of the present invention.
Detailed Description
The following describes in detail specific embodiments of a circuit for eliminating power-off flash, a driving method thereof, a display panel, and a display device according to an embodiment of the present invention with reference to the accompanying drawings. It should be noted that the embodiments described in this specification are only a part of the embodiments of the present invention, and not all embodiments; and in case of conflict, the embodiments and features of the embodiments in the present application may be combined with each other; moreover, all other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative effort belong to the protection scope of the present invention.
The circuit for eliminating power-off flash white provided by the embodiment of the invention, as shown in fig. 1, includes: a detection module 101, a comparison module 102 and a driving module 103;
the detection module 101 is connected to the digital voltage signal terminal DVDD and the first node P1, respectively, and configured to determine a voltage of the first node P1 according to a digital voltage signal of the digital voltage signal terminal DVDD;
the comparing module 102 is respectively connected to the first node P1, the reference signal terminal VREF, and the second node P2, and configured to write the first signal into the second node P2 when it is determined that the reference signal of the reference signal terminal VREF is greater than or equal to the voltage of the first node P1;
the driving module 103 is connected to the second node P2, the half-value analog voltage signal HAVDD line, and the Data signal line Data, respectively, and is configured to turn on the half-value analog voltage signal HAVDD line and the Data signal line Data under the control of the first signal at the second node P2 during shutdown; the half-value analog voltage signal HAVDD line is used for outputting a half-value analog voltage signal, and the Data signal line Data is used for outputting a Data signal.
In the circuit for eliminating shutdown flash, which is provided by the embodiment of the invention, because the circuit can be used for conducting the half-value analog voltage signal HAVDD line and the Data signal line Data in the shutdown process, the power failure trends of the half-value analog voltage signal on the half-value analog voltage signal HAVDD line and the Data signal on the Data signal line Data are basically the same, and in the prior art, the power failure trends of the half-value analog voltage signal and the public voltage signal are similar, the power failure trends of the half-value analog voltage signal, the Data signal and the public voltage signal can be basically the same by adopting the technical scheme of the invention, so that the voltage difference caused by the Data signal and the public voltage signal does not exist at two ends of the liquid crystal any more, and the flash phenomenon in shutdown is effectively eliminated.
In addition, in the prior art, a large voltage difference (i.e., DC bias) between the data signal and the common signal exists at two ends of the liquid crystal molecules after the power-off, which easily causes polarization of the liquid crystal molecules for a long time, and causes defects such as Flicker drift and image sticking when the power-on display is performed again. The invention can eliminate DC bias voltage, thereby effectively avoiding the defects of Flicker drift, residual image and the like during startup display.
Further, in order to avoid that the half-value analog voltage signal interferes with the normal operation of the data signal in the display process, in the circuit for eliminating the shutdown flash, provided in the embodiment of the present invention, the comparing module 102 is further configured to write the second signal into the second node P2 when it is determined that the reference signal of the reference signal terminal VREF is less than the voltage of the first node P1;
the driving module 103 is also used to disconnect the half-value analog voltage signal HAVDD line from the Data signal line Data under the control of the second signal at the second node P2 during display.
In order to better understand the structure of the above-mentioned circuit for eliminating the shutdown flash, a specific embodiment is described in detail below.
Specifically, in the circuit for eliminating shutdown flash according to the embodiment of the present invention, as shown in fig. 2, the detecting module 101 includes: a first resistor R1 and a second resistor R2;
one end of the first resistor R1 is connected to the digital voltage signal terminal DVDD, and the other end is connected to the first node P1;
one end of the second resistor R2 is connected with the first node P1, and the other end is grounded;
the voltage at the first node P1 is DVDD × R2/(R1+ R2).
The comparison module 102 includes: a voltage comparator A and an amplifier;
the positive phase input end of the voltage comparator A is connected with the first node P1, the negative phase input end is connected with the reference signal end VREF, the output end is connected with the control end of the amplifier, the input end of the amplifier is connected with the power supply end VDD through the second node P2, and the output end is grounded. The amplifier comprises a third resistor R3, a triode Q and a fourth resistor R4;
the base electrode of the triode Q is connected with the output end of the voltage comparator A through a third resistor R3, the collector electrode of the triode Q is connected with a second node P2, and the emitting electrode of the triode Q is grounded;
the fourth resistor R4 has one terminal connected to the second node P2 and the other terminal connected to the power supply terminal VDD.
The driving module 103 includes a plurality of switching transistors M (n switching transistors, i.e., a first switching transistor M1, a second switching transistor M2, … …, and an n-th switching transistor Mn, are shown in fig. 2) connected in sequence, and the number of the switching transistors M is the same as the number of Data signal lines Data (n Data signal lines Data, i.e., a first Data signal line Data _1, a second Data signal line Data _2, a … …, and an n-th Data signal line Data _ n, are shown in fig. 2);
the gate of each switching transistor M is connected to the second node P2;
a first pole of the first switching transistor (i.e., the first switching transistor M1 shown in fig. 2) is connected to a half-value analog voltage signal HAVDD line, and a second pole of the last switching transistor (i.e., the nth switching transistor Mn shown in fig. 2) is connected to a Data signal line Data (i.e., the nth Data signal line Data _ n shown in fig. 2);
the first pole of each switching transistor and the second pole of its neighboring switching transistor except for the first pole of the first switching transistor (i.e., the first switching transistor M1 shown in fig. 2) and the second pole of the last switching transistor (i.e., the nth switching transistor Mn shown in fig. 2) are connected to the same data signal line; for example, a first pole of the first switching transistor M1 and a second pole of the second switching transistor M2 are connected to the first Data signal line Data _ 1.
It should be noted that the above is merely an example of the specific structure of each module in the circuit for eliminating shutdown flash, and actually, the specific structure of each module is not limited to the above structure provided in the embodiment of the present invention, and may be other structures known to those skilled in the art.
In addition, each switch Transistor mentioned in the above embodiments of the present invention may be a Thin Film Transistor (TFT), or may also be a Metal Oxide Semiconductor field effect Transistor (MOS), which is not limited herein; also, these switching transistors are all P-type transistors or N-type transistors. The first pole and the second pole of the transistors are respectively a source and a drain, and in practical application, the functions of the first pole and the second pole can be interchanged without specific distinction according to the types of the transistors and different input signals. Moreover, it can be understood that, when each switching transistor is an N-type transistor, the first signal output by the comparing module 102 is a high level signal, and the second signal is a low level signal; when each switching transistor is a P-type transistor, the first signal output by the comparing module 102 is a low level signal, and the second signal is a high level signal.
Correspondingly, the invention also provides a driving method for the circuit for eliminating shutdown flash white provided by the embodiment of the invention. As shown in fig. 3, the driving method may specifically include the following steps:
s301, the detection module determines the voltage of the first node according to the digital voltage signal of the digital voltage signal end;
s302, when the comparison module determines that the reference signal of the reference signal end is greater than or equal to the voltage of the first node, writing the first signal into the second node;
and S303, conducting the half-value analog voltage signal line and the data signal line by the driving module under the control of the first signal of the second node in the shutdown process.
For better understanding of the technical solution of the present invention, the specific operation principle of the circuit for eliminating the shutdown flash shown in fig. 2 will be described in detail below. Each switch transistor is an N-type transistor, and is switched on under the action of a high level and switched off under the action of a low level; the first signal is a high level signal and the second signal is a low level signal. The operation timing chart of fig. 2 is shown in fig. 4.
A starting-up stage: the digital voltage signal terminal DVDD starts to be powered up, and the power-up is completed by time t 1. During the power-up process, the voltage of the first node P1 is lower than the reference signal of the reference signal terminal VREF, so that the second node P2 writes the high level of the first signal; the first switching transistor M1, the second switching transistors M2, … …, and the nth switching transistor Mn are turned on by a high level of the first signal, so that the half-value analog voltage signal HAVDD line is conductively connected to the first Data signal line Data _1, the second Data signal lines Data _2, … …, and the nth Data signal line Data _ n. However, in the prior art, after the digital voltage signal terminal DVDD is powered up (at time t 1), the half-value analog voltage signal HAVDD line is powered up, and the Data signal line Data does not receive the digital voltage signal output by the source driver chip during the power-up process of the digital voltage signal terminal DVDD, so that even if the half-value analog voltage signal HAVDD line and the Data signal line Data are connected together during the power-on process, the stability of the power-on timing sequence can still be ensured.
A display stage: the half-value analog voltage signal HAVDD line starts to be powered up from time t1 and completes to be powered up at time t 2. And the Data signal line Data receives the digital voltage signal output by the source driving chip to realize the display function. At this stage, the voltage of the first node P1 is higher than VREF, and the second node P2 writes the low level of the second signal; the first switching transistor M1, the second switching transistors M2, … …, and the nth switching transistor Mn are turned off by a low level of the second signal, so that the half-value analog voltage signal HAVDD line is disconnected from the first Data signal line Data _1, the second Data signal line Data _2, … …, and the nth Data signal line Data _ n. Therefore, in the display stage, the half-value analog voltage signal of the half-value analog voltage signal HAVDD line cannot interfere the normal work of the Data signal line Data, and the normal display of the display panel is ensured.
A shutdown stage: at time t3, the digital voltage signal terminal DVDD, the half-value analog voltage signal HAVDD line, and the Data signal line Data start to be powered down, and the voltage of the first node P1 is lower than the reference signal of the reference signal terminal VREF, so that the second node P2 writes in the high level of the first signal; the first switching transistor M1, the second switching transistors M2, … …, and the nth switching transistor Mn are turned on by a high level of the first signal, so that the half-value analog voltage signal HAVDD line is conductively connected to the first Data signal line Data _1, the second Data signal lines Data _2, … …, and the nth Data signal line Data _ n. This makes the power down trends of the half-value analog voltage signal and the data signal the same, as shown in fig. 4. It should be noted that the thick dotted line on the Data signal line Data shown in fig. 4 shows the power-down trend of the Data signal without the circuit for eliminating the power-off flash provided by the present invention.
In summary, in the shutdown process, by using the circuit for eliminating shutdown flash, the half-value analog voltage signal and the data signal have the same power-down trend, and because the half-value analog voltage signal and the common voltage signal have the similar power-down trend in the prior art, the power-down trends of the half-value analog voltage signal, the common voltage signal and the data signal are basically the same, so that the voltage difference caused by the common voltage signal and the data signal does not exist at the two ends of the liquid crystal molecules any more, and the flash phenomenon does not occur in the shutdown process.
Based on the same inventive concept, an embodiment of the present invention further provides a display panel, including the circuit for eliminating power-off flash, where the principle of solving the problem of the display panel is similar to the principle of solving the problem of the circuit for eliminating power-off flash, so that reference may be made to the implementation of the circuit for eliminating power-off flash provided by the embodiment of the present invention for the implementation of the display panel provided by the embodiment of the present invention, and repeated details are not repeated. And it is understood that the display panel is a liquid crystal display panel; other essential components of the display panel (such as the timing control Board TCON Board and the source data driving chip S-IC) are understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention.
In addition, for the convenience of circuit design, in the display panel according to the embodiment of the present invention, the detecting module 101 and the comparing module 102 of the circuit for eliminating the power-off flash may be disposed on the timing control board, and the driving module 103 may be integrated on the source data driving chip.
Based on the same inventive concept, an embodiment of the present invention further provides a display device, including the display panel provided in the embodiment of the present invention, where the display device may be: any product or component with a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital camera, a navigator, an intelligent watch, a fitness wristband, a personal digital assistant, a self-service deposit/withdrawal machine, and the like. Other essential components of the display device should be understood by those skilled in the art, and are not described herein nor should they be construed as limiting the present invention. The display device can be implemented by referring to the above embodiments of the display panel, and repeated descriptions are omitted.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A circuit for eliminating power-off flash, comprising: the device comprises a detection module, a comparison module and a driving module;
the detection module is respectively connected with a digital voltage signal end and a first node and is used for determining the voltage of the first node according to a digital voltage signal of the digital voltage signal end;
the comparison module is respectively connected with the first node, the reference signal end and the second node and is used for writing a first signal into the second node when the reference signal of the reference signal end is determined to be greater than or equal to the voltage of the first node;
the driving module is respectively connected with the second node, the half-value analog voltage signal line and the data signal line and is used for conducting the half-value analog voltage signal line and the data signal line under the control of the first signal of the second node in the shutdown process.
2. The circuit for eliminating shutdown sparkle of claim 1, wherein the comparison module is further configured to write a second signal to the second node upon determining that the reference signal at the reference signal terminal is less than the voltage of the first node;
the driving module is further configured to disconnect the half-value analog voltage signal line from the data signal line under control of a second signal of the second node in a display process.
3. The circuit for eliminating shutdown flash according to claim 1 or 2, wherein the detecting module comprises: a first resistor and a second resistor;
one end of the first resistor is connected with the digital voltage signal end, and the other end of the first resistor is connected with the first node;
one end of the second resistor is connected with the first node, and the other end of the second resistor is grounded.
4. The circuit for eliminating shutdown sparkle of claim 1 or 2, wherein the comparison module comprises: a voltage comparator and an amplifier;
the positive phase input end of the voltage comparator is connected with the first node, the negative phase input end of the voltage comparator is connected with the reference signal end, the output end of the voltage comparator is connected with the control end of the amplifier, the input end of the amplifier is connected with the power supply end through the second node, and the output end of the amplifier is grounded.
5. The circuit for eliminating shutdown sparkle of claim 4, wherein the amplifier comprises a third resistor, a triode, and a fourth resistor;
the base electrode of the triode is connected with the output end of the voltage comparator through the third resistor, the collector electrode of the triode is connected with the second node, and the emitter electrode of the triode is grounded;
one end of the fourth resistor is connected with the second node, and the other end of the fourth resistor is connected with the power supply end.
6. The circuit for eliminating shutdown flash white according to claim 1 or 2, wherein the driving module includes a plurality of switching transistors connected in sequence, and the number of the switching transistors is the same as the number of the data signal lines;
the grid electrode of each switch transistor is connected with the second node;
a first pole of the first switch transistor is connected with the half-value analog voltage signal line, and a second pole of the last switch transistor is connected with the data signal line;
the first pole of each of the switching transistors and the second pole of the switching transistor adjacent thereto are connected to the same one of the data signal lines except for the first pole of the first switching transistor and the second pole of the last switching transistor.
7. A display panel comprising the circuit for eliminating power-off flash according to any one of claims 1 to 6.
8. The display panel of claim 7, comprising a timing control board and a source data driving chip; the circuit is characterized in that the detection module and the comparison module of the circuit for eliminating shutdown flash are positioned on the time sequence control board, and the driving module is positioned on the source data driving chip.
9. A display device characterized by comprising the display panel according to claim 7 or 8.
10. A driving method of a circuit for eliminating shutdown sparkle according to any one of claims 1 to 6, comprising:
the detection module determines the voltage of the first node according to the digital voltage signal of the digital voltage signal end;
the comparison module writes the first signal into the second node when determining that the reference signal of the reference signal end is greater than or equal to the voltage of the first node;
and the driving module conducts the half-value analog voltage signal line and the data signal line under the control of the first signal of the second node in the shutdown process.
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| CN109559702B (en) * | 2019-01-15 | 2021-09-14 | 合肥鑫晟光电科技有限公司 | Common electrode voltage control circuit, driving method and display panel |
| CN112614469B (en) * | 2020-12-24 | 2022-05-20 | 北京集创北方科技股份有限公司 | Electronic device, driving apparatus, power supply, and electronic apparatus |
| CN113129850A (en) * | 2021-04-16 | 2021-07-16 | 京东方科技集团股份有限公司 | Device and method for improving boot-strap afterimage and display device |
| CN113870807B (en) * | 2021-09-22 | 2023-03-10 | 惠州视维新技术有限公司 | Display, electronic device, and method for driving display |
| CN114267311B (en) * | 2021-12-29 | 2023-04-25 | 惠科股份有限公司 | Source electrode driving circuit, source electrode driving method and display panel |
| CN114708840B (en) * | 2022-03-31 | 2023-10-24 | 福州京东方光电科技有限公司 | Display driving method, driving circuit and display device |
| CN115953985B (en) * | 2022-12-28 | 2023-11-17 | 惠科股份有限公司 | Pixel unit, display panel and display device |
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| CN108962174A (en) | 2018-12-07 |
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