CN108932049A - 主板插槽供电电路 - Google Patents
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Abstract
一种主板插槽供电电路,包括电源模块、主控模块及多个插槽。所述电源模块电连接于所述多个插槽,所述多个插槽用于插接多个接口卡。所述主控模块电连接于所述多个插槽及所述电源模块,用于对所述多个插槽内所插接的接口卡定义优先权顺序。其中,所述电源模块还用于判断电源功耗是否大于一预设功耗,及在判断所述电源功耗大于所述预设功耗时输出控制信号;所述主控模块还用于在接收到所述控制信号时选择并控制优先权最低的接口卡降低其工作频率。上述主板插槽供电电路,其能在检测到主板电源功耗大于安全值时,根据插槽所插接的接口卡的优先权顺序来选择并降低接口卡的功耗,进而降低主板电源功耗,避免主板因为电源超负载工作而损坏。
Description
技术领域
本发明涉及电子设备技术领域,尤其涉及一种主板插槽供电电路。
背景技术
现有的主板通常都集成有多个插槽,例如满足总线和接口标准(PeripheralComponent Interface Express,PCIE)规范的PCIE插槽或者内存插槽,这些插槽可以用来插接独立显卡,声卡、网卡、内存条等来扩展电子设备性能。当每一插槽插接有显卡、声卡、网卡、内存条等接口卡时,将导致主板电源的功率消耗增加,一旦电源的功率消耗大于正常工作状态下所能提供的最大功率时,将导致电源因超负载而损坏,进而影响主板的性能。
发明内容
鉴于以上内容,有必要提供一种主板插槽供电电路,其能在检测到主板电源功耗大于安全值时,降低主板插槽所插接的接口卡的功耗,进而降低主板电源功耗。
本发明一实施方式提供一种主板插槽供电电路,包括电源模块、主控模块及与所述电源模块电连接的多个插槽,所述多个插槽用于插接多个接口卡。所述主控模块电连接于所述多个插槽及所述电源模块,用于对所述多个插槽内所插接的接口卡定义优先权顺序。其中,所述电源模块还用于判断电源功耗是否大于一预设功耗,及在判断所述电源功耗大于所述预设功耗时输出控制信号;所述主控模块还用于在接收到所述控制信号时选择并控制优先权最低的接口卡降低其工作频率。
本发明另一实施方式提供一种主板插槽供电电路,包括电源模块、主控模块及与所述电源模块电连接的多个插槽,所述多个插槽用于插接多个接口卡。所述主控模块电连接于所述多个插槽及所述电源模块,用于对所述多个插槽内所插接的接口卡定义优先权顺序。其中,所述电源模块还用于判断电源功耗是否大于一预设功耗,及在判断所述电源功耗大于所述预设功耗时输出控制信号;所述主控模块还用于在接收到所述控制信号时判断所述多个插槽是否插接有相同类型的接口卡,当判断所述多个插槽未插接有相同类型的接口卡时,所述主控模块选择并控制优先权最低的接口卡降低其工作频率,当判断所述多个插槽插接有相同类型的接口卡时,所述主控模块从具有相同类型的接口卡中选择并控制优先权最低的接口卡降低其工作频率。
与现有技术相比,上述主板插槽供电电路,其能在检测到主板电源功耗大于安全值时,根据插槽所插接的接口卡的优先权顺序来选择并降低接口卡的功耗,进而降低主板电源功耗,避免主板因为电源超负载工作而损坏。
附图说明
图1是本发明主板插槽供电电路的一较佳实施方式的功能模块图。
图2是本发明主板插槽供电电路的一较佳实施方式的电路图。
图3是本发明主板插槽供电电路的另一较佳实施方式的电路图。
主要元件符号说明
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参阅图1,本发明一实施方式提供一种主板插槽供电电路100。
主板插槽供电电路100可以设置在电子设备的主板(图未示)上,电子设备可以是电脑、电视、服务器等。
主板插槽供电电路100包括电源模块10、主控模块20及多个插槽。电源模块10电连接与多个插槽,电源模块10用于对主控模块20及多个插槽供电。多个插槽用于插接多个接口卡,插槽的数量在本实施方式中以四个插槽为例进行举例说明,即插槽30a、30b、30c、30d,插槽的数量可以多于四个或者少于四个。接口卡的的数量在本实施方式中同样以四个接口卡为例进行举例说明,即接口卡40a、40b、40c、40d,接口卡的数量可以多于四个或者少于四个。
在一实施方式中,插槽30a、30b、30c、30d可以是符合PCIE规范的PCIE插槽或者内存插槽,接口卡40a、40b、40c、40d可以是内存条、独立显卡、声卡、网卡等。
主控模块20电连接于多个插槽30a、30b、30c、30d及电源模块10,主控模块20用于对多个插槽30a、30b、30c、30d内所插接的接口卡40a、40b、40c、40d定义优先权顺序。举例而言,主控模块20定义接口卡40a(接口卡40a插接于插槽30a内)为第一顺序,主控模块20定义接口卡40b(接口卡40b插接于插槽30b内)为第二顺序,主控模块20定义接口卡40c(接口卡40c插接于插槽30c内)为第三顺序,主控模块20定义接口卡40d(接口卡40d插接于插槽30d内)为第四顺序。其中,第一顺序优先权最低,第四顺序优先权最高。
电源模块10还用于判断电源功耗是否大于一预设功耗,及在判断电源功耗大于预设功耗时输出控制信号。主控模块20还用于在接收到电源模块10输出的控制信号时选择并控制优先权最低的接口卡降低其工作频率,以降低电源模块10的电源功耗。当电源模块10判断电源功耗不大于预设功耗时,每一接口卡40a、40b、40c、40d正常工作。
举例而言,当电源模块10判断电源功耗大于预设功耗时,由于接口卡40a为第一顺序,其优先权最低。主控模块20选择并控制接口卡40a降低工作频率,进而可以降低电源模块10的功率消耗,避免电源模块10超负荷工作。
在一实施方式中,主控模块20还用于获取当前未被降低工作频率的接口卡数量,并在接收到电源模块10输出的控制信号时,从未被降低工作频率的接口卡中选择并控制优先权最低的接口卡降低其工作频率。
举例而言,当接口卡40a已被选择并控制降低工作频率,但电源功耗仍然大于预设功耗,此时需要继续选择接口卡来降低工作频率。而当前未被降低工作频率的接口卡包括三个接口卡40b、40c、40d。在接口卡40b、40c、40d中,接口卡40b的优先权最低,主控模块20选择并控制接口卡40b降低工作频率,以进一步降低电源模块10的功率消耗。
在一实施方式中,主控模块20还用于在接收到电源模块10输出的控制信号时判断多个插槽30a、30b、30c、30d是否插接有相同类型的接口卡40a、40b、40c、40d。当主控模块20判断多个插槽30a、30b、30c、30d未插接有相同类型的接口卡40a、40b、40c、40d时,主控模块选择并控制优先权最低的接口卡降低其工作频率,当判断多个插槽30a、30b、30c、30d插接有相同类型的接口卡40a、40b、40c、40d时,主控模块20从具有相同类型的接口卡40a、40b、40c、40d中选择并控制优先权最低的接口卡降低其工作频率。
举例而言,当接口卡40a、40b、40c、40d为不同类型的接口卡时,此时由于接口卡40a为第一顺序,其优先权最低。主控模块20选择并控制接口卡40a降低工作频率,以降低电源模块10的功率消耗。当接口卡40b、40c为同类型的接口卡时(例如:接口卡40b与40c均为独立显卡),此时虽然接口卡40a优先权最低,但接口卡40b属于两个接口卡40b、40c中优先权最低的接口卡,主控模块20选择并控制接口卡40b降低其工作频率。当接口卡40b、40c为同类型的接口卡且接口卡40a、40d亦为同类型的接口卡时,此时接口卡40a属于两个接口卡40a、40d中优先权最低的接口卡,接口卡40b属于两个接口卡40b、40c中优先权最低的接口卡,接口卡40a的优先权顺序低于接口卡40b,主控模块20选择并控制接口卡40a降低其工作频率。
图2为本发明一实施方式提供的一种主板插槽供电电路100的电路图。在本实施方式中,接口卡40a、40b与插槽30a、30b均以两个为例进行说明。主控模块20包括一主控芯片U1,主控芯片U1可以是超级输入/输出芯片(Super Input/Output,SIO)芯片。电源模块10包括供电芯片U2,供电芯片U2包括电源引脚VCC、第一通信引脚D1及第二通信引脚CLK1。主控芯片U1包括第三通信引脚D2、第四通信引脚CLK2、多个控制引脚及多个地址引脚。供电芯片U2的电源引脚VCC电连接于每一插槽30a、30b,以对每一接口卡40a、40b进行供电。供电芯片U2的第一通信引脚D1电连接于主控芯片U1的第三通信引脚D2,供电芯片U2的第二通信引脚CLK1电连接于主控芯片U1的第四通信引脚CLK2。主控芯片U1用于通过第三通信引脚D2及第四通信引脚CLK2来接收供电芯片U2输出的控制信号。
由于在本实施方式中,接口卡40a、40b与插槽30a、30b均以两个为例进行说明,主控芯片U1的控制引脚及地址引脚亦以两个为例。主控芯片U1包括第一控制引脚CTR1、第二控制引脚CTR2、第一地址引脚ID1及第二地址引脚ID2。每一插槽30a、30b均包括第一信号引脚A1、第二信号引脚A2。主控芯片U1的第一控制引脚CTR1电连接于插槽30a的第一信号引脚A1,主控芯片U1的第二控制引脚CTR2电连接于插槽30b的第一信号引脚A1。当主控芯片U1通过第一控制引脚CTR1输出控制信号至插槽30a的第一信号引脚A1时,选择并控制插槽30a降低其工作频率,以减少功率消耗,控制信号可以是高电平信号。主控芯片U1的第一地址引脚ID1电连接于插槽30a的第二信号引脚A2,主控芯片U1的第二地址引脚ID2电连接于插槽30a的第二信号引脚A2。主控芯片U1可以将第一地址引脚ID1的电平置为0(低电平),以表示插接于插槽30a的接口卡40a为第一顺序,主控芯片U1将第二地址引脚ID2的电平置为1(高电平),以表示插接于插槽30b的接口卡40b为第二顺序。
在一实施方式中,第一地址引脚ID1电连接于第一电阻R1的一端,第一电阻R1的另一端用于接收直流电压(优选为3.3V)。第二地址引脚ID2电连接于第二电阻R2的一端,第二电阻R2的另一端用于接收直流电压。供电芯片U2的电源引脚VCC输出的直流电压为12V。
图3为本发明另一实施方式提供的一种主板插槽供电电路100的电路图。图3中所揭示的主板插槽供电电路100的原理与图2基本相同。图3是以四个接口卡40a、40b、40c、40d与四个插槽30a、30b、30c、30d为例进行说明。
每一插槽30a、30b、30c、30d均包括第一信号引脚A1、第二信号引脚A2及第三信号引脚A3。主控芯片U1包括第三通信引脚D2、第四通信引脚CLK2、第一至第四控制引脚CTR1、CTR2、CTR3、CTR4及第一至第八地址引脚ID1、ID2、ID3、ID4、ID5、ID6、ID7、ID8。第一控制引脚CTR1电连接于插槽30a的第一信号引脚A1,第二控制引脚CTR2电连接于插槽30b的第一信号引脚A1,第三控制引脚CTR3电连接于插槽30c的第一信号引脚A1,第四控制引脚CTR4电连接于插槽30d的第一信号引脚A1。第一地址引脚ID1电连接于插槽30a的第二信号引脚A2,第二地址引脚ID2电连接于插槽30a的第三信号引脚A3。第三地址引脚ID3电连接于插槽30b的第二信号引脚A2,第四地址引脚ID4电连接于插槽30b的第三信号引脚A3。第五地址引脚ID5电连接于插槽30c的第二信号引脚A2,第六地址引脚ID6电连接于插槽30c的第三信号引脚A3。第七地址引脚ID7电连接于插槽30d的第二信号引脚A2,第八地址引脚ID8电连接于插槽30d的第三信号引脚A3。
主控芯片U1可以将第一地址引脚ID1及第二地址引脚ID2的电平置为“00”,以表示插接于插槽30a的接口卡40a为第一顺序。主控芯片U1将第三地址引脚ID3及第四地址引脚ID4的电平置为“01”,以表示插接于插槽30b的接口卡40b为第二顺序。主控芯片U1将第五地址引脚ID5及第六地址引脚ID6的电平置为“10”,以表示插接于插槽30c的接口卡40c为第三顺序。主控芯片U1将第七地址引脚ID7及第八地址引脚ID8的电平置为“11”,以表示插接于插槽30d的接口卡40d为第四顺序。
在一实施方式中,第一至第八地址引脚ID1、ID2...ID8分别电连接于第一至第八电阻R1、R2、R3、R4、R5、R6、R7、R8的一端,第一至第八电阻R1、R2...R8的另一端用于接收直流电压。
上述主板插槽供电电路,其能在检测到主板电源功耗大于安全值时,根据插槽所插接的接口卡的优先权顺序来选择并降低接口卡的功耗,进而降低主板电源功耗,避免主板因为电源超负载工作而损坏。
对本领域的技术人员来说,可以根据本发明的发明方案和发明构思结合生产的实际需要做出其他相应的改变或调整,而这些改变和调整都应属于本发明所公开的范围。
Claims (10)
1.一种主板插槽供电电路,包括电源模块及与所述电源模块电连接的多个插槽,所述多个插槽用于插接多个接口卡,其特征在于,所述主板插槽供电电路还包括:
主控模块,电连接于所述多个插槽及所述电源模块,用于对所述多个插槽内所插接的接口卡定义优先权顺序;
其中,所述电源模块还用于判断电源功耗是否大于一预设功耗,及在判断所述电源功耗大于所述预设功耗时输出控制信号;所述主控模块还用于在接收到所述控制信号时选择并控制优先权最低的接口卡降低其工作频率。
2.如权利要求1所述的主板插槽供电电路,其特征在于,所述主控模块还用于获取当前未被降低工作频率的接口卡数量,并在接收到所述控制信号时,从未被降低工作频率的接口卡中选择并控制优先权最低的接口卡降低其工作频率。
3.如权利要求1所述的主板插槽供电电路,其特征在于,所述主控模块包括一主控芯片,所述主控芯片包括第一通信引脚、第二通信引脚、多个控制引脚及多个地址引脚,所述第一通信引脚与所述第二通信引脚电连接于所述电源模块,用于与所述电源模块通信,所述多个控制引脚及所述多个地址引脚电连接于所述多个插槽。
4.如权利要求3所述的主板插槽供电电路,其特征在于,所述每一控制引脚电连接于所述每一插槽,用于输出所述控制信号至所述每一接口卡,所述多个地址引脚用于对所述多个插槽内所插接的接口卡定义优先权顺序。
5.如权利要求4所述的主板插槽供电电路,其特征在于,所述每一地址引脚还电连接于一电阻的一端,所述电阻的另一端用于接收一直流电压。
6.一种主板插槽供电电路,包括电源模块及与所述电源模块电连接的多个插槽,所述多个插槽用于插接多个接口卡,其特征在于,所述主板供电电路还包括:
主控模块,电连接于所述多个插槽及所述电源模块,用于对所述多个插槽内所插接的接口卡定义优先权顺序;
其中,所述电源模块还用于判断电源功耗是否大于一预设功耗,及在判断所述电源功耗大于所述预设功耗时输出控制信号;所述主控模块还用于在接收到所述控制信号时判断所述多个插槽是否插接有相同类型的接口卡,当判断所述多个插槽未插接有相同类型的接口卡时,所述主控模块选择并控制优先权最低的接口卡降低其工作频率,当判断所述多个插槽插接有相同类型的接口卡时,所述主控模块从具有相同类型的接口卡中选择并控制优先权最低的接口卡降低其工作频率。
7.如权利要求6所述的主板插槽供电电路,其特征在于,所述主控模块还用于获取当前未被降低工作频率的接口卡数量,并在接收到所述控制信号时,从未被降低工作频率的接口卡中选择并控制优先权最低的接口卡降低其工作频率。
8.如权利要求6所述的主板插槽供电电路,其特征在于,所述主控模块包括一主控芯片,所述主控芯片包括第一通信引脚、第二通信引脚、多个控制引脚及多个地址引脚,所述第一通信引脚与所述第二通信引脚电连接于所述电源模块,用于与所述电源模块通信,所述多个控制引脚及所述多个地址引脚电连接于所述多个插槽。
9.如权利要求8所述的主板插槽供电电路,其特征在于,所述每一控制引脚电连接于所述每一插槽,用于输出所述控制信号至所述每一接口卡,所述多个地址引脚用于对所述多个插槽内所插接的接口卡定义优先权顺序。
10.如权利要求9所述的主板插槽供电电路,其特征在于,所述每一地址引脚还电连接于一电阻的一端,所述电阻的另一端用于接收一直流电压。
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WD01 | Invention patent application deemed withdrawn after publication |