CN108877626A - Gate driving circuit - Google Patents
Gate driving circuit Download PDFInfo
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- CN108877626A CN108877626A CN201810766527.3A CN201810766527A CN108877626A CN 108877626 A CN108877626 A CN 108877626A CN 201810766527 A CN201810766527 A CN 201810766527A CN 108877626 A CN108877626 A CN 108877626A
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- film transistor
- thin film
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Shift Register Type Memory (AREA)
- Liquid Crystal Display Device Control (AREA)
Abstract
The present invention discloses a kind of gate driving circuit, and N grades of shift registers include pull-up unit, pull-up control unit, drop-down unit and drop-down control unit.Pull-up unit is to receive clock signal, and pull-up unit electrical connection nth node and output end；Pull-up control unit is electrically connected pull-up unit, and pull-up control unit receives and transmits control signal to nth node；Drop-down unit decides whether for output end to be pulled down to system low potential to receive N+1 grades of grid impulse signals, and according to N+1 grades of pulse signals；Drop-down control unit decides whether for nth node to be pulled down to system low potential to receive N+1 grades of grid impulse signals, and according to N+1 grades of grid impulse signals；Wherein pull-up control unit has first film transistor, and first film transistor is oxide thin film transistor, and to reduce leakage current, N is positive integer.Gate driving circuit of the invention has stronger output driving and lesser leakage current.
Description
Technical field
The present invention relates to a kind of gate driving circuits, more particularly to a kind of grid that can be reduced leakage current, improve fan-out capability
Pole driving circuit.
Background technique
Recently, the product of various displays is considerably popularized.Display includes display panel, and display panel has aobvious
Show area and the non-display area positioned at non-display area, the grid comprising multi-stage shift register is provided in non-display area and is driven
Dynamic circuit, every level-one shift register have output end, which is electrically connected with corresponding grid line, to provide grid arteries and veins
Rush signal.As the resolution of display panel is higher and higher, for row, the sub-pixel number that every a line is included is increasingly
More, region shared by each sub-pixel is smaller and smaller, and route is increasingly thinner etc., causes capacitance resistance load (RC loading) more next
Bigger, output driving required for shift register output grid impulse signal to corresponding grid line is increasing.
Summary of the invention
The purpose of the present invention is to provide a kind of gate driving circuits, with stronger output driving and lesser leakage
Electric current is so that there is shift register more stable electricity to show.
In order to achieve the above object, the present invention provides a kind of gate driving circuit, includes multi-stage shift register, the multistage
N grades of shift registers of shift register include：
Pull-up unit, to receive clock signal, which has nth node and output end, and on this
Unit is drawn to be electrically connected the nth node and the output end；
Pull-up control unit is electrically connected the nth node, which receives and transmit control signal to the N
Node；
Drop-down unit is electrically connected the output end, the drop-down unit to receive N+1 grades of grid impulse signals, and according to
The N+1 grades of grid impulse signals and decide whether for the output end to be pulled down to system low potential；
Drop-down control unit is electrically connected the nth node, and the drop-down control unit is to receive the N+1 grades of grid impulses
Signal, and decide whether for the nth node to be pulled down to the system low potential according to the N+1 grades of grid impulse signals；
Wherein, which has first film transistor, which is that sull is brilliant
Body pipe, to reduce leakage current, N is positive integer.
As optional technical solution, the grid of the first film transistor receives the control signal, and the first film is brilliant
The source electrode of body pipe is electrically connected the grid of the first film transistor, and the drain electrode of the first film transistor is electrically connected the nth node.
As optional technical solution, which has the second thin film transistor (TFT), which is low
Warm polycrystalline SiTFT.
As optional technical solution, the grid of second thin film transistor (TFT) is electrically connected the nth node, and second film is brilliant
The source electrode of body pipe receives the clock signal, and the drain electrode of second thin film transistor (TFT) is electrically connected the grid line.
As optional technical solution, which has third thin film transistor (TFT), the third thin film transistor (TFT)
For oxide thin film transistor.
As optional technical solution, the grid of the third thin film transistor (TFT) receives the N+1 grades of grid impulse signals, should
The source electrode of third thin film transistor (TFT) is electrically connected the nth node, and the drain electrode of the third thin film transistor (TFT) is electrically connected the system low potential.
As optional technical solution, which has the 4th thin film transistor (TFT), and the 4th thin film transistor (TFT) is low
Warm polycrystalline SiTFT.
As optional technical solution, the grid of the 4th thin film transistor (TFT) receives the N+1 grades of grid impulse signals, should
The source electrode of 4th thin film transistor (TFT) is electrically connected the output end, and the drain electrode of the 4th thin film transistor (TFT) is electrically connected the system low potential.
As optional technical solution, the thin film transistor (TFT) in the N grades of shift registers as switch is oxide
Thin film transistor (TFT).
As optional technical solution, the thin film transistor (TFT) in the N grades of shift registers as output is that low temperature is more
Polycrystal silicon film transistor.
Gate driving circuit of the invention plays the thin of output action with multi-stage shift register in shift register
Film transistor is low-temperature polysilicon film transistor so that shift register can output electric current with higher, improve displacement post
The thin film transistor (TFT) that the fan-out capability of storage can also reduce the size of thin film transistor (TFT), while play on-off action is oxide
Thin film transistor (TFT) reduces leakage current, it is ensured that the electricity of important node shows, and can simplify circuit structure, to reduce grid
Pole driving circuit occupies the space of display panel, has catered to the technological trend of narrow frame, high-res.
Below in conjunction with the drawings and specific embodiments, the present invention will be described in detail, but not as a limitation of the invention.
Detailed description of the invention
Fig. 1 is the schematic diagram of gate driving circuit of the invention；
Fig. 2 is the block diagram of N grades of shift registers of the invention；
Fig. 3 is the schematic diagram of the first embodiment of N grades of shift registers of the invention；
Fig. 4 is the schematic diagram of the second embodiment of N grades of shift registers of the invention.
Specific embodiment
Structural principle and working principle of the invention are described in detail with reference to the accompanying drawing：
Fig. 1 and Fig. 2 is please referred to, Fig. 1 is the schematic diagram of gate driving circuit of the invention, and Fig. 2 is N grades of shiftings of the invention
The schematic diagram of the first embodiment of bit register.The present invention relates to a kind of gate driving circuits, include multi-stage shift register, example
Such as posted comprising the 1st grade of shift register, N-1 grades of shift register SR [n-1] of the 2nd grade of shift register ..., N grades of displacements
Storage SR [n], N+1 grades of shift register SR [n+1] ... are illustrated by taking N grades of shift register SR [n] as an example below,
Wherein N is positive integer.
As shown in Fig. 2, N grades of shift register SR [n] include：Pull-up unit 110, pull-up control unit 120, drop-down are single
Member 130 and drop-down control unit 140.Wherein, N grades of shift register SR [n] have an output end out, output end out to
It is electrically connected corresponding gate lines G L [n], N grades of shift registers have nth node Q [n].In practical operation, pull-up unit 110
It can be used to receive clock pulse signal, while pull-up unit 110 is electrically connected nth node Q [n] and output end out.Pull-up control is single
120 electrical connection nth node Q [n] of member, pull-up control unit 120 receive and transmit control signal SP to nth node Q [n].Drop-down
Unit 130 is electrically connected nth node Q [n], and drop-down control unit 140 is electrically connected nth node Q [n].
In the present invention, pull-up unit 110 and drop-down unit 130 respectively have at least one thin film transistor (TFT), and it is above-mentioned extremely
A few thin film transistor (TFT) is low-temperature polysilicon film transistor (LTPS TFT).Since low-temperature polysilicon film transistor can have
Have higher mobility and output electric current so that the output electric current of the output end out of N grades of shift register SR [n] compared with
Greatly, make shift register that there is biggish fan-out capability.Conversely, if used herein is oxide thin film transistor, then by
It is smaller therefore longer by the RC retardation ratio time in the output electric current of oxide thin film transistor.If oxide thin film transistor
It is intended to obtain fan-out capability identical with low-temperature polysilicon film transistor, then its size needs to increase by 10 times, and works as film crystal
The size of pipe increases, it will the space for needing shift register increases, and the peripheral region of display panel increases, and is unfavorable for narrow side
The design of frame.
In the present invention, pull-up control unit 120 and drop-down control unit 140 respectively have at least one thin film transistor (TFT),
And at least one above-mentioned thin film transistor (TFT) is oxide thin film transistor (Oxide TFT).Since oxide thin film transistor can
With lower leakage current, it is ensured that the electricity performance of shift register is (especially when nth node Q [n] is in floating
(floating) when state).
Referring to FIG. 3, Fig. 3 is the schematic diagram of the first embodiment of N grades of shift register SR [n] of the invention.Such as Fig. 3
It is shown, there is first film transistor M1, the grid of first film transistor M1 is to receive control in pull-up control unit 120
The grid of the source electrode electrical connection first film transistor M1 of signal SP, first film transistor M1, first film transistor M1's
Drain electrode electrical connection nth node Q [n].In the present embodiment, first film transistor M1 is oxide thin film transistor (Oxide
TFT), have the characteristics that lower leakage current by oxide thin film transistor, be applied in pull-up control unit 120 and make
For the thin film transistor (TFT) of switch, it can be ensured that the electricity of shift register shows.Especially, when nth node Q [n] is high electricity
When flat and control signal SP is low level, nth node Q [n] is in floating (floating) state, first film transistor at this time
M1 is closed, since first film transistor M1 is oxide thin film transistor, with lesser leakage current, thus nth node Q
[n] can be maintained at high level, ensure that the electricity performance of nth node Q [n].
As shown in figure 3, the grid electricity in pull-up unit 110 with the second thin film transistor (TFT) M2, the second thin film transistor (TFT) M2
It connects nth node Q [n], the source electrode of the second thin film transistor (TFT) M2 receives clock signal CK, the drain electrode electricity of the second thin film transistor (TFT) M2
Connect output end out.N grades of shift register SR [n] are extremely right by output end out N grades of grid impulse signal S [n] of output
The gate lines G L [n] answered.In the present embodiment, the second thin film transistor (TFT) M2 is low-temperature polysilicon film transistor (LTPS TFT),
By low-temperature polysilicon film transistor mobility with higher (High mobility) and output electric current, as defeated
The fan-out capability of shift register can be improved in thin film transistor (TFT) out.
As shown in figure 3, drop-down control unit 140 is electrically connected nth node Q [n], drop-down control unit 140 is to receive N
+ 1 grade of grid impulse signal S [n+1], and decided whether according to N+1 grades of grid impulse signal S [n+1] by nth node Q [n]
It is pulled down to system low potential VSS.Specifically, having third thin film transistor (TFT) M3, third film crystal in drop-down control unit 140
The grid of pipe M3 is to receive N+1 grades of grid impulse signal S [n+1], the source electrode electrical connection N section of third thin film transistor (TFT) M3
The drain electrode electrical connection system low potential VSS of point Q [n], third thin film transistor (TFT) M3.When N+1 grades of gate drive signal S [n+1]
For when (high level), third thin film transistor (TFT) M3 is to save N according to N+1 grades of grid impulse signal S [n+1] during enable
Point Q [n] is pulled down to system low potential VSS.In the present embodiment, third thin film transistor (TFT) M3 is oxide thin film transistor (Oxide
TFT), have the characteristics that lower leakage current by oxide thin film transistor, it, can as the thin film transistor (TFT) of switch
To ensure the electricity performance of shift register.Especially, when nth node Q [n] is high level and N+1 grades of gate drive signal S
When [n+1] is low level, nth node Q [n] is in floating (floating) state at this time, and third thin film transistor (TFT) M3 is closed, by
In third thin film transistor (TFT) M3 be oxide thin film transistor, with lesser leakage current, so that nth node Q [n] can be tieed up
It is held in high level, ensures that the electricity performance of nth node Q [n].
As shown in figure 3, drop-down unit 130 is electrically connected output end out, drop-down unit 130 is to receive N+1 grades of grid arteries and veins
It rushes signal S [n+1], and is decided whether according to N+1 grades of grid impulse signal S [n+1] by N grades of shift register circuit SR
The level of the output end out of [n] is pulled down to system low potential VSS.Specifically, having the 4th film crystal in drop-down unit 130
The grid of pipe M4, the 4th thin film transistor (TFT) M4 are to receive N+1 grades of grid impulse signal S [n+1], the 4th thin film transistor (TFT) M4
Source electrode be electrically connected output end out, the drain electrode electrical connection system low potential VSS of the 4th thin film transistor (TFT) M4.When N+1 grades of grids
During driving signal S [n+1] is enable when (high level), the 4th thin film transistor (TFT) M4 according to N+1 grades of grid impulses to believe
The level of the output end out of N grades of shift register SR [n] is pulled down to system low potential VSS by number S [n+1].The present embodiment
In, the 4th thin film transistor (TFT) M4 is low-temperature polysilicon film transistor (LTPS TFT), by low-temperature polysilicon film transistor
Mobility (High mobility) with higher and output electric current can be improved as the thin film transistor (TFT) of output
The fan-out capability of shift register.
Referring to FIG. 4, Fig. 4 is the schematic diagram of the second embodiment of N grades of shift register SR [n] of the invention.This reality
It applies in example, pull-up control unit 120 ' has first film transistor T1 and the second thin film transistor (TFT) T2, first film transistor
The grid of T1 receives third clock pulse signal CK3, and the source electrode of first film transistor T1 receives N-1 grades of grid impulse signals
The source electrode of the second thin film transistor (TFT) T2 of drain electrode electrical connection of S [n-1], first film transistor T1, the second thin film transistor (TFT) T2's
Grid is electrically connected the grid of first film transistor T1, and the drain electrode of the second thin film transistor (TFT) T2 is electrically connected N grades of shift registers
The nth node Q [n] of SR [n].After regarding first film transistor T1 and the second thin film transistor (TFT) T2 as a combination, a combination thereof
Output end can be electrically connected with nth node Q [n], in the present embodiment, first film transistor T1 and the second thin film transistor (TFT) T2 are
Oxide thin film transistor (Oxide TFT), to reduce leakage current, it is ensured that the electricity of nth node Q [n] shows.Especially,
When nth node Q [n] is high level and third clock pulse signal CK3 is low level, nth node Q [n] is in floating at this time
(floating) state, first film transistor T1 and the second thin film transistor (TFT) T2 are closed, due to first film transistor T1 and
Second thin film transistor (TFT) T2 is oxide thin film transistor, with lesser leakage current, so that nth node Q [n] can be maintained
In high level, the electricity performance of nth node Q [n] is ensured that.
As shown in figure 4, pull-up unit 110 ' has third thin film transistor (TFT) T3, the grid of third thin film transistor (TFT) T3 is electrically connected
It connects nth node Q [n], the source electrode of third thin film transistor (TFT) T3 receives the first clock pulse signal CK1, first film transistor T3
Drain electrode be electrically connected N grades of shift register SR [n] output end out.In the present embodiment, third thin film transistor (TFT) T3 is low temperature
Polycrystalline SiTFT (LTPS TFT), so that output end out output electric current with higher, improves shift register
Fan-out capability.
As shown in figure 4, drop-down control unit 140 ' has first part 141 ', first part 141 ' includes that the 4th film is brilliant
The grid of body pipe T4 and the 5th thin film transistor (TFT) T5, the 4th thin film transistor (TFT) T4 receive second clock pulse signal CK2, and the 4th is thin
The source electrode of film transistor T4 is electrically connected the grid of the 4th thin film transistor (TFT) T4, and the drain electrode of the 4th thin film transistor (TFT) T4 is electrically connected control
The grid of node Qb, the 5th thin film transistor (TFT) T5 are electrically connected nth node Q [n], and the source electrode of the 5th thin film transistor (TFT) T5 is electrically connected control
The drain electrode electrical connection system low potential VGL of node Qb processed, the 5th thin film transistor (TFT) T5.As shown in figure 4, the 4th thin film transistor (TFT) T4
Control node Qb can be electrically connected with the 5th thin film transistor (TFT) T5, in the present embodiment, the 4th thin film transistor (TFT) T4 and the 5th film
Transistor T5 is oxide thin film transistor (Qxide TFT), to reduce leakage current, it is ensured that the electricity table of control node Qb
It is existing.Especially, when control node Qb is high level and nth node Q [n] and second clock pulse signal CK2 is low level, this
When control node Qb be in floating (floating) state, the 4th thin film transistor (TFT) T4 and the 5th thin film transistor (TFT) T5 are closed, by
In the 4th thin film transistor (TFT) T4 and the 5th thin film transistor (TFT) T5 be oxide thin film transistor, with lesser leakage current, from
And control node Qb can be maintained at high level, ensure that the electricity performance of control node Qb.Conversely, as low-temperature polysilicon
Silicon thin film transistor has biggish leakage current, causes voltage regulation result poor.
As shown in figure 4, drop-down control unit 140 ' also has second part 142 ', second part 142 ' includes the 6th film
The grid of transistor T6 and the 7th thin film transistor (TFT) T7, the 6th thin film transistor (TFT) T6 are electrically connected control node Qb, and the 6th film is brilliant
The source electrode of body pipe T6 is electrically connected nth node Q [n], the 7th thin film transistor (TFT) T7's of drain electrode electrical connection of the 6th thin film transistor (TFT) T6
The grid of source electrode, the 7th thin film transistor (TFT) T7 is electrically connected control node Qb, the drain electrode electrical connection system of the 7th thin film transistor (TFT) T7
Low potential VGL.As shown in figure 4, after regarding the 6th thin film transistor (TFT) T6 and the 7th thin film transistor (TFT) T7 as a combination, a combination thereof
Nth node Q [n] can be electrically connected.In the present embodiment, the 6th thin film transistor (TFT) T6 and the 7th thin film transistor (TFT) T7 are that oxide is thin
Film transistor (Oxide TFT), so as to reduce leakage current, it is ensured that the electricity of nth node Q [n] shows.Especially, work as control
When node Qb processed is low level and nth node Q [n] is high level, nth node Q [n] is in floating (floating) shape at this time
State, the 6th thin film transistor (TFT) T6 and the 7th thin film transistor (TFT) T7 are closed, due to the 6th thin film transistor (TFT) T6 and the 7th film crystal
Pipe T7 is oxide thin film transistor, with lesser leakage current, so that nth node Q [n] can be maintained at high level, from
And ensure the electricity performance of nth node Q [n].Conversely, if used herein is low-temperature polysilicon film transistor, due to low
Warm polycrystalline SiTFT has biggish leakage current, has when nth node Q [n] is in floating (floating) state
Electrical leakage problems.
As shown in figure 4, drop-down unit 130 ' has the 8th thin film transistor (TFT) T8, the grid of the 8th thin film transistor (TFT) T8 is electrically connected
Control node Qb is met, the source electrode of the 8th thin film transistor (TFT) T8 is electrically connected output end out, and the drain electrode of the 8th thin film transistor (TFT) T8 is electrically connected
Welding system low potential VGL.During control node Qb is enable when (high level), the 8th thin film transistor (TFT) T8 is to according to control
Nth node Q [n] is pulled down to system low potential VSS by node Qb.In the present embodiment, the 8th thin film transistor (TFT) T8 is low-temperature polysilicon
Silicon thin film transistor (LTPS TFT), so that output end out output electric current with higher, improves the defeated of shift register
Output capacity.
In the present embodiment, it is used as thin film transistor (TFT) (the concretely pull-up list of N grades of shift register SR [n] output
The 8th thin film transistor (TFT) T8 in third thin film transistor (TFT) T3 and drop-down unit 130 ' in member 110 ') it is low-temperature polysilicon film
Transistor (LTPS TFT) so that N grades of shift register SR [n] can output electric current with higher, improve displacement and post
The fan-out capability of storage.
In the present embodiment, it is connect with the important node (specially nth node Q [n]) in N grades of shift register SR [n]
Thin film transistor (TFT) (concretely the first film transistor T1 in pull-up control unit 120 ', the second thin film transistor (TFT) T2 with
And the 6th thin film transistor (TFT) T6, the 7th thin film transistor (TFT) T7 in drop-down control unit 140 ') it is oxide thin film transistor
(Oxide TFT), so that it is guaranteed that the electricity of nth node Q [n] shows.
In the present embodiment, with another important node (specially control node Qb) in N grades of shift register SR [n]
Thin film transistor (TFT) (concretely the 4th thin film transistor (TFT) T4 and the 5th thin film transistor (TFT) in drop-down control unit 140 ' of connection
It T5 is) oxide thin film transistor (Oxide TFT), so that it is guaranteed that the electricity of control node Qb shows.If being used here
Low-temperature polysilicon film transistor causes voltage regulation result poor since it is with biggish leakage current.
Gate driving circuit of the invention plays the film of output with multi-stage shift register in shift register
Transistor is low-temperature polysilicon film transistor so that shift register can output electric current with higher, improve shift LD
The fan-out capability of device can also reduce the size of thin film transistor (TFT), while the thin film transistor (TFT) for playing switch is sull
Transistor reduces leakage current, it is ensured that the electricity of important node shows, and can simplify circuit structure, to reduce grid drive
Dynamic circuit occupies the space of display panel, has catered to the technological trend of narrow frame, high-res.
Certainly, the present invention can also have other various embodiments, without deviating from the spirit and substance of the present invention, ripe
It knows those skilled in the art and makes various corresponding changes and modifications, but these corresponding changes and change in accordance with the present invention
Shape all should fall within the scope of protection of the appended claims of the present invention.
Claims (10)
1. a kind of gate driving circuit includes multi-stage shift register, which is characterized in that N grades of the multi-stage shift register
Shift register includes：
Pull-up unit, to receive clock signal, which has nth node and output end, and the pull-up list
Member is electrically connected the nth node and the output end；
Pull-up control unit is electrically connected the nth node, which receives and transmit control signal to the nth node；
Drop-down unit is electrically connected the output end, and the drop-down unit is to receive N+1 grades of grid impulse signals, and according to the N
+ 1 grade of grid impulse signal and decide whether the output end being pulled down to system low potential；And
Drop-down control unit is electrically connected the nth node, the drop-down control unit to receive the N+1 grades of grid impulse signals,
And decide whether for the nth node to be pulled down to the system low potential according to the N+1 grades of grid impulse signals；
Wherein, which has first film transistor, which is oxide thin film transistor,
To reduce leakage current, N is positive integer.
2. gate driving circuit according to claim 1, it is characterised in that：The grid of the first film transistor receives should
Signal is controlled, the source electrode of the first film transistor is electrically connected the grid of the first film transistor, the first film transistor
Drain electrode be electrically connected the nth node.
3. gate driving circuit according to claim 1, it is characterised in that：The pull-up unit has the second film crystal
Pipe, second thin film transistor (TFT) are low-temperature polysilicon film transistor.
4. gate driving circuit according to claim 3, it is characterised in that：The grid of second thin film transistor (TFT) is electrically connected
The nth node, the source electrode of second thin film transistor (TFT) receive the clock signal, and the drain electrode electrical connection of second thin film transistor (TFT) should
Output end.
5. gate driving circuit according to claim 1, it is characterised in that：The drop-down control unit has third film brilliant
Body pipe, the third thin film transistor (TFT) are oxide thin film transistor.
6. gate driving circuit according to claim 5, it is characterised in that：The grid of the third thin film transistor (TFT) receives should
N+1 grades of grid impulse signals, the source electrode of the third thin film transistor (TFT) are electrically connected the nth node, the third thin film transistor (TFT)
Drain electrode is electrically connected the system low potential.
7. gate driving circuit according to claim 1, it is characterised in that：The drop-down unit has the 4th film crystal
Pipe, the 4th thin film transistor (TFT) are low-temperature polysilicon film transistor.
8. gate driving circuit according to claim 7, it is characterised in that：The grid of 4th thin film transistor (TFT) receives should
N+1 grades of grid impulse signals, the source electrode of the 4th thin film transistor (TFT) are electrically connected the output end, the leakage of the 4th thin film transistor (TFT)
Pole is electrically connected the system low potential.
9. gate driving circuit according to claim 1, it is characterised in that：As switch in the N grades of shift registers
Thin film transistor (TFT) is oxide thin film transistor.
10. gate driving circuit according to claim 1, it is characterised in that：As output in the N grades of shift registers
Thin film transistor (TFT) is low-temperature polysilicon film transistor.
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| CN201810766527.3A CN108877626A (en) | 2018-07-12 | 2018-07-12 | Gate driving circuit |
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| CN201810766527.3A CN108877626A (en) | 2018-07-12 | 2018-07-12 | Gate driving circuit |
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| CN113936582A (en) * | 2021-10-19 | 2022-01-14 | 武汉华星光电技术有限公司 | Grid driving circuit and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| EP3843075A1 (en) * | 2019-12-23 | 2021-06-30 | Shenzhen Royole Technologies Co., Ltd | Goa circuit, display panel, and electronic device |
| US11315515B2 (en) | 2019-12-23 | 2022-04-26 | Shenzhen Royole Technologies Co., Ltd. | GOA circuit, display panel, and electronic device |
| US11404446B2 (en) | 2020-02-12 | 2022-08-02 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel, gate electrode driving circuit, and electronic device |
| WO2021159563A1 (en) * | 2020-02-12 | 2021-08-19 | 武汉华星光电技术有限公司 | Display panel, gate drive circuit, and electronic device |
| JP7278365B2 (en) | 2020-02-12 | 2023-05-19 | 武漢華星光電技術有限公司 | Display panel, gate drive circuit and electronic device |
| EP3886167A4 (en) * | 2020-02-12 | 2022-01-12 | Wuhan China Star Optoelectronics Technology Co., Ltd. | Display panel, gate drive circuit, and electronic device |
| CN111179742A (en) * | 2020-02-12 | 2020-05-19 | 武汉华星光电技术有限公司 | Display panel, grid drive circuit and electronic device |
| JP2022522556A (en) * | 2020-02-12 | 2022-04-20 | 武漢華星光電技術有限公司 | Display panel, gate drive circuit and electronic device |
| WO2023065388A1 (en) * | 2021-10-19 | 2023-04-27 | 武汉华星光电技术有限公司 | Gate driving circuit and display panel |
| CN113936582A (en) * | 2021-10-19 | 2022-01-14 | 武汉华星光电技术有限公司 | Grid driving circuit and display panel |
| CN113823213A (en) * | 2021-10-26 | 2021-12-21 | 京东方科技集团股份有限公司 | Gate drive circuit, display substrate and display device |
| CN113823213B (en) * | 2021-10-26 | 2024-01-26 | 京东方科技集团股份有限公司 | Gate driving circuit, display substrate and display device |
| WO2023108723A1 (en) * | 2021-12-15 | 2023-06-22 | Tcl华星光电技术有限公司 | Backlight module, display panel and display control method thereof, and display device |
| US11889600B2 (en) | 2021-12-15 | 2024-01-30 | Tcl China Star Optoelectronics Technology Co., Ltd. | Backlight module, display panel and display control method thereof, and display device |
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Application publication date: 20181123 |