CN108834263B - Voltage-adjustable dimming control circuit and system - Google Patents
Voltage-adjustable dimming control circuit and system Download PDFInfo
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- CN108834263B CN108834263B CN201810846477.XA CN201810846477A CN108834263B CN 108834263 B CN108834263 B CN 108834263B CN 201810846477 A CN201810846477 A CN 201810846477A CN 108834263 B CN108834263 B CN 108834263B
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- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
- H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
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Abstract
The invention belongs to the technical field of illumination, and mainly provides a voltage-adjustable dimming control circuit, the dimming control circuit is connected with an alternating current power supply and a display device, alternating current output by the alternating current power supply is rectified through a rectifying module to obtain a direct current signal, a power conversion module receives the direct current signal and converts the direct current signal to obtain a plurality of direct current voltage signals to supply power to the display device, a constant current driving module samples output signals of the display device and obtains feedback signals, the power conversion module regulates the plurality of direct current voltage signals according to the feedback signals, different voltages can be output to different lamp groups according to user requirements, and the problem that in the existing lamplight application, the lamplight control circuit can only output a single voltage to drive a lamp, cannot output different voltages according to different application environments and greatly limits the application range of the lamp is solved.
Description
Technical Field
The invention belongs to the technical field of illumination, and particularly relates to a voltage-adjustable dimming control circuit and a system.
Background
The dimmable lamp is used as an emerging product, different lighting requirements can be provided for people, and in the existing LED intelligent lighting lamp, lamp groups are formed by adopting various color lamp beads, and the various color lamp beads display different lighting effects according to different instructions.
However, in the existing lighting application, the lighting control circuit can only output a single voltage to drive the lamp, and cannot output different voltages according to different application environments, so that the application range of the lamp is greatly limited.
Disclosure of Invention
The invention provides a voltage-adjustable dimming control circuit and a voltage-adjustable dimming control system, which solve the problems that in the existing lamplight application, the lamplight control circuit can only output single voltage to drive a lamp, and can not output different voltages according to different application environments, so that the application range of the lamp is greatly limited.
The embodiment of the invention provides a voltage-adjustable dimming control circuit which is connected with an alternating current power supply and a display device, and comprises: the rectification module is connected with the alternating current power supply and used for rectifying an alternating current signal output by the alternating current power supply and outputting a direct current signal; the power conversion module is connected with the rectifying module and the display device and is used for receiving the direct current signals and outputting a plurality of direct current voltage signals to supply power to the display device; and the constant current driving module is connected with the display device and the power conversion module and is used for sampling the output signal of the display device and obtaining a plurality of sampling signals, and outputting a feedback signal according to the sampling signals so that the power conversion module can regulate the DC voltage signals according to the feedback signal.
Optionally, the dimming control circuit further includes: and the control module is connected with the constant current driving module and the power conversion module and is used for sending pulse width modulation control signals and logic control signals to the constant current driving module according to external control instructions and sending switching signals to the power conversion module.
The embodiment of the invention also provides a voltage-adjustable dimming control system, which comprises a display device and the dimming control circuit.
Optionally, the plurality of direct current voltage signals include a first direct current voltage signal and a second direct current voltage signal, and the display device includes a red light lamp set, a green light lamp set, a blue light lamp set and a white light lamp set;
the first end of the red light lamp set, the first end of the green light lamp set, the first end of the blue light lamp set and the first direct-current voltage signal output end of the power conversion module are connected together, the first end of the white light lamp set is connected with the second direct-current voltage signal output end of the power conversion module, the second end of the red light lamp set is connected with the first input end of the constant-current driving module, the green light lamp set is connected with the second input end of the constant-current driving module, the blue light lamp set is connected with the third input end of the constant-current driving module, and the second end of the white light lamp set is connected with the fourth input end of the constant-current driving module.
In the dimming control circuit with adjustable voltage provided by the embodiment of the invention, the dimming control circuit is connected with an alternating current power supply and a display device, the alternating current output by the alternating current power supply is rectified through the rectifying module to obtain a direct current signal, the power conversion module receives the direct current signal and converts the direct current signal to obtain a plurality of direct current voltage signals to supply power to the display device, the constant current driving module samples the voltage signals output by the display device to obtain sampling signals, and the feedback signals are output according to the sampling signals to enable the power conversion module to adjust the plurality of direct current voltage signals according to the feedback signals, so that different voltages can be output to different lamp groups according to user needs, the problem that in the existing lamplight application, the lamplight control circuit can only output a single voltage to drive a lamp, cannot output different voltages according to different application environments, and the application range of the lamp is greatly limited is solved.
Drawings
Fig. 1 is a schematic diagram of a first module structure of a voltage-adjustable dimming control circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a second module structure of a voltage-adjustable dimming control circuit according to an embodiment of the present invention;
Fig. 3 is a schematic diagram of a first circuit structure of a constant current driving module according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a second circuit structure of the constant current driving module according to the embodiment of the present invention;
fig. 5 is a schematic circuit diagram of a first sampling detection unit according to an embodiment of the present invention;
fig. 6 is a schematic circuit diagram of a second sampling detection unit according to an embodiment of the present invention;
fig. 7 is a schematic circuit diagram of a third sampling detection unit according to an embodiment of the present invention;
fig. 8 is a schematic circuit diagram of a fourth sampling detection unit according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of a register unit according to an embodiment of the present invention;
fig. 10 is a schematic diagram of a unit structure of a power conversion module according to an embodiment of the invention;
FIG. 11 is a schematic circuit diagram of a signal decomposition unit according to an embodiment of the present invention;
fig. 12 is a schematic circuit diagram of a pwm conversion unit according to an embodiment of the present invention;
fig. 13 is a signal diagram of a signal decomposition unit according to an embodiment of the present invention for decomposing a feedback signal input from an input terminal;
fig. 14 is a schematic circuit diagram of a pwm switching unit according to an embodiment of the present invention;
FIG. 15 is a schematic circuit diagram of a control module according to an embodiment of the present invention;
Fig. 16 is a schematic circuit diagram of a display device according to an embodiment of the application.
Detailed Description
The present application will be described in further detail with reference to the drawings and examples, in order to make the objects, technical solutions and advantages of the present application more apparent. It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the application. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
It should be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this specification and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
In order to illustrate the above technical solution of the present application, the following description will be made by specific examples.
Fig. 1 is a schematic diagram of a first module structure of a voltage-adjustable dimming control circuit according to an embodiment of the present application, as shown in fig. 1, the voltage-adjustable dimming control circuit in this embodiment is connected to an ac power source 10 and a display device 40, and the dimming control circuit includes: a rectifying module 20 connected to the ac power supply 10, for rectifying an input ac current and outputting a dc signal; the power conversion module 30 is connected with the rectifying module 20 and the display device 40, and is used for receiving the direct current signals and outputting a plurality of direct current voltage signals to supply power to the display device 40; and a constant current driving module 50 connected to the display device 40 and the power conversion module 30, for sampling the output signal of the display device 40 to obtain a plurality of sampling signals, and outputting a feedback signal according to the plurality of sampling signals, so that the power conversion module 30 adjusts the plurality of direct current voltage signals according to the feedback signal.
In this embodiment, the power conversion module 30 processes the dc signal output by the rectifying module 20 to output a plurality of dc voltage signals to supply power to different lamp groups in the display device 40, the constant current driving module 50 samples each lamp group in the display device 40, and outputs a feedback signal according to the sampled signals to regulate the plurality of dc voltage signals output by the power conversion module 30.
As an embodiment of the invention, the voltages of the dc voltage signals are different, where the dc voltage signals include a first dc voltage signal for providing a high voltage signal to drive the lighting lamp set and a second dc voltage signal for providing a low voltage signal to drive the monochromatic light lamp set, so as to meet the power supply requirements of the high voltage lamp set and the low voltage lamp set.
Fig. 2 is a schematic diagram of a second module structure of a voltage-adjustable dimming control circuit according to an embodiment of the present invention, as shown in fig. 2, where the dimming control circuit in this embodiment further includes: and the control module 60 is connected with the constant current driving module 50 and the power conversion module 30 and is used for sending pulse width modulation control signals and logic control signals to the constant current driving module 50 and sending switching signals to the power conversion module 30.
In this embodiment, the pulse width modulation control signal sent by the control module 60 to the constant current driving module 50 is used to control the on and off of each lamp group in the display device 40, the logic control signal sent by the control module 60 to the constant current driving module 50 is used to control the constant current driving module 50 to sample and detect the output voltage of each lamp group in the display device 40, and the control module 60 sends the switching signal to the power conversion module 30 to control the output of the power conversion module 30.
As an embodiment of the present invention, fig. 3 is a schematic diagram of a first circuit structure of a constant current driving module 50 according to an embodiment of the present invention, as shown in fig. 3, in this embodiment, the constant current driving module 50 includes: the first operational amplifier U1, the second operational amplifier U2, the third operational amplifier U3, the fourth operational amplifier U4, the first switching tube M1, the second switching tube M2, the third switching tube M3, the fourth switching tube M4, the first resistor unit 501, the second resistor unit 502, the third resistor unit 503 and the fourth resistor unit 504; and a pwm control unit 510 connected to the pwm control signal output terminal of the control module 60, for outputting a first pwm signal, a second pwm signal, a third pwm signal, and a fourth pwm signal according to the pwm control signal. Specifically, the current input end of the first switching tube M1 is connected to the first output end OUT1 of the display device 40 as the first input end of the constant current driving module 50, the current input end of the second switching tube M2 is connected to the second output end OUT2 of the display device 40 as the second input end of the constant current driving module 50, the current input end of the third switching tube M3 is connected to the third output end OUT3 of the display device 40 as the third input end of the constant current driving module 50, the current input end of the fourth switching tube M4 is connected to the fourth output end OUT4 of the display device 40 as the fourth input end of the constant current driving module 50, the control end of the first switching tube M1 is connected to the output end of the first operational amplifier U1, the control end of the second switching tube M2 is connected to the output end of the second operational amplifier U2, the control end of the third switching tube M3 is connected to the output end of the third operational amplifier U3, the control end of the fourth switching tube M4 is connected with the output end of the fourth operational amplifier U4, the second input end of the first operational amplifier U1, the current output end of the first switching tube M1 and the first end of the first resistor unit 501 are commonly connected, the second end of the first resistor unit 501 is grounded, the second input end of the second operational amplifier U2, the current output end of the second switching tube M2 and the first end of the second resistor unit 502 are commonly connected, the second end of the second resistor unit 502 is grounded, the second input end of the third operational amplifier U3, the current output end of the third switching tube M3 and the first end of the third resistor unit 503 are commonly connected, the second input end of the third resistor unit 503 is grounded, the second input end of the fourth operational amplifier U4, the current output end of the fourth switching tube M4 and the first end of the fourth resistor unit 504 are commonly connected, the second end of the fourth resistor unit 504 is grounded, the first input end of the first operational amplifier U1 is connected with the first output end of the pulse width modulation control unit 510, the first input end of the second operational amplifier U2 is connected with the second output end of the pulse width modulation control unit 510, the first input end of the third operational amplifier U3 is connected with the third input end of the pulse width modulation control unit 510, and the first input end of the fourth operational amplifier U4 is connected with the fourth input end of the pulse width modulation control unit 510. In this embodiment, the constant current driving module 50 outputs the first pulse width modulation signal, the second pulse width modulation signal, the third pulse width modulation signal and the fourth pulse width modulation signal according to the pulse width modulation control command output by the control module 60 to drive the corresponding lamp group in the display device 40 to be turned on or turned off.
As an embodiment of the present invention, the first switching tube M1, the second switching tube M2, the third switching tube M3 and the fourth switching tube M4 are all N-type MOS tubes, specifically, the gate of the N-type MOS tube is used as the control end of the first switching tube M1, the second switching tube M2, the third switching tube M3 and the fourth switching tube M4, the drain of the N-type MOS tube is used as the current input end of the first switching tube M1, the second switching tube M2, the third switching tube M3 and the fourth switching tube M4, and the source of the N-type MOS tube is used as the current output end of the first switching tube M1, the second switching tube M2, the third switching tube M3 and the fourth switching tube M4.
As an embodiment of the present invention, the first resistor unit 501, the second resistor unit 502 and the third resistor unit 503 may be resistors, in this embodiment, the first resistor unit 501, the second resistor unit 502 and the third resistor unit 503 are a resistor R1, a resistor R2 and a resistor R3, respectively, the first end of the resistor R1 is the first end of the first resistor unit 501, the second end of the resistor R1 is the second end of the first resistor unit 501, the first end of the resistor R2 is the first end of the second resistor unit 502, the second end of the resistor R2 is the second end of the second resistor unit 502, the first end of the resistor R3 is the first end of the third resistor unit 503, the second end of the resistor R3 is the second end of the third resistor unit 503, the first end of the resistor R4 is the first end of the fourth resistor unit 504, and the second end of the resistor R4 is the second end of the fourth resistor unit 504.
As an embodiment of the present invention, fig. 4 is a schematic diagram of a second circuit structure of the constant current driving module according to the embodiment of the present invention, as shown in fig. 4, in this embodiment, the constant current driving module 50 further includes: a logic control unit 520 connected to the logic control signal output terminal of the control module 60, and configured to output a first enable control signal, a second enable control signal, a third enable control signal, and a fourth enable control signal according to the logic control signal; the first sampling detection unit 521 is connected to the first output end of the logic control unit 520, and is configured to sample a first input end of the constant current driving module 50 to obtain a first sampling signal, and output a first logic signal and a first data signal according to the first sampling signal and the first enable control signal; a second sampling detection unit 522 connected to the second output end of the logic control unit 520, and configured to sample a second input end of the constant current driving module 50 to obtain a second sampling signal, and output a second logic signal and a second data signal according to the second sampling signal and the second enable control signal; a third sampling detection unit 523 connected to the third output end of the logic control unit 520, and configured to sample a third input end of the constant current driving module 50 to obtain a third sampling signal, and output a third logic signal and a third data signal according to the third sampling signal and a third enable control signal; a fourth sampling detection unit 524 connected to the fourth input end of the logic control unit 520, and configured to sample a signal at the fourth input end of the constant current driving module 50 to obtain a fourth sampling signal, and output a fourth logic signal and a fourth data signal according to the fourth sampling signal and a fourth enable control signal; and a register unit 530 connected to the first sampling detection unit 521, the second sampling detection unit 522, the third sampling detection unit 523, and the fourth sampling detection unit 524, respectively, for outputting a feedback signal according to the first logic signal, the first data signal, the second logic signal, the second data signal, the third logic signal, the third data signal, the fourth logic signal, and the fourth data signal.
As an embodiment of the present invention, fig. 5 is a schematic circuit diagram of a first sampling detection unit 521 according to an embodiment of the present invention, as shown in fig. 5, in this embodiment, the first sampling detection unit 521 includes: an eleventh comparator U11, a twelfth comparator U12, a first exclusive-or gate XOR1, a first AND gate AND1, an eleventh tri-state gate T11, AND a twelfth tri-state gate T11. Specifically, the first input terminal of the eleventh comparator U11, the first input terminal of the twelfth comparator U12, AND the first output terminal OUT1 of the display device 40 are commonly connected, the second input terminal of the eleventh comparator U11 is connected to an eleventh preset reference voltage source V11, the second input terminal of the twelfth comparator U12 is connected to the twelfth preset reference voltage source V12, the output terminal of the eleventh comparator U11, the first input terminal of the first exclusive-or gate XOR1, the first input terminal of the first AND gate AND1 are commonly connected, the output terminal of the twelfth comparator U12, the second input terminal of the first exclusive-or gate XOR1, AND the second input terminal of the first AND gate AND1 are commonly connected, the output terminal of the first exclusive-or gate XOR1 is connected to the input terminal of the eleventh tri-state gate T11, the output terminal of the first AND gate AND1 is connected to the input terminal of the twelfth tri-state gate T12, the control terminal of the eleventh tri-state gate T11 AND the control terminal of the twelfth tri-state gate T12 are commonly connected as the first enable control signal input terminal of the first sampling detection unit 521 to the first output terminal CH1 of the logic control unit 520, the output terminal of the eleventh tri-state gate T11 is connected as the logic signal output terminal of the first sampling detection unit 521 to the first logic signal input terminal out1_chg of the register unit 530, AND the output terminal of the twelfth tri-state gate T12 is connected as the logic signal output terminal of the first sampling detection unit 521 to the first data signal input terminal out1_dir of the register unit 530.
As an embodiment of the present invention, fig. 6 is a schematic circuit diagram of a second sampling detection unit 522 according to an embodiment of the present invention, as shown in fig. 6, in this embodiment, the second sampling detection unit 522 includes: twenty-first comparator U21, twenty-second comparator U22, second exclusive or gate XOR2, second AND gate AND2, twenty-first tri-state gate T21, AND twenty-second tri-state gate T22. Specifically, the first input terminal of the twenty-second comparator U21, the first input terminal of the twenty-second comparator U22, AND the second output terminal OUT2 of the display device 40 are commonly connected, the second input terminal of the twenty-second comparator U21 is connected to the twenty-second preset reference voltage source V21, the second input terminal of the twenty-second comparator U12 is connected to the twenty-second preset reference voltage source V22, the output terminal of the twenty-first comparator U21, the first input terminal of the second exclusive-or gate XOR2, the first input terminal of the second AND gate AND2 are commonly connected, the output terminal of the second comparator U22, the second input terminal of the second exclusive-or gate XOR2, AND the second input terminal OUT2 of the second AND gate AND2 are commonly connected, the output terminal of the second exclusive-or gate XOR2 is connected to the input terminal of the twenty-first tri-state gate T21, the output terminal of the second AND gate AND2 is connected to the input terminal of the second tri-state gate T22, the control terminal of the second AND the second tri-state gate T22 is connected to the control unit for tri-state detection unit T2, AND the output terminal of the second output unit OUT2 is connected to the second input terminal of the second input of the second gate output signal detection unit output unit 522 as the second signal of the tric gate input signal of the second input unit input signal of the second gate input unit output signal 522.
As an embodiment of the present invention, fig. 7 is a schematic circuit diagram of a third sampling detection unit 523 in the embodiment of the present invention, and as shown in fig. 7, in the embodiment, the third sampling detection unit 523 includes: a thirty-first comparator U31, a thirty-second comparator U32, a third exclusive-or gate XOR3, a third AND gate AND3, a thirty-first tri-state gate T31, AND a thirty-second tri-state gate T32. Specifically, the first input terminal of the thirty-second comparator U31, the first input terminal of the thirty-second comparator U32 AND the third output terminal OUT3 of the display device 40 are commonly connected, the second input terminal of the thirty-first comparator U31 is connected to the thirty-second preset reference voltage source V31, the second input terminal of the thirty-second comparator U32 is connected to the thirty-second preset reference voltage source V32, the output terminal of the thirty-first comparator U31, the first input terminal of the third exclusive-or gate XOR3, the first input terminal of the third AND gate AND3 are commonly connected, the output terminal of the thirty-second comparator U32, the second input terminal of the third exclusive-or gate XOR3 AND the second input terminal OUT3 are commonly connected, the output terminal of the third exclusive-or gate XOR3 is connected to the input terminal of the thirty-first tri-state gate T31, the output terminal of the third AND gate AND3 is connected to the input terminal of the third tri-state gate T32, the control terminal of the third AND gate T31 AND the control terminal of the third tri-state gate T32 are commonly connected to the third input terminal of the third gate AND3 as the three-state detection unit signal detection unit, the output terminal of the third gate AND3 is connected to the third input terminal of the third gate AND3 as the third input signal detection unit input terminal of the third gate AND 3.
As an embodiment of the present invention, fig. 8 is a schematic circuit diagram of a fourth sampling detection unit 524 according to an embodiment of the present invention, as shown in fig. 8, in this embodiment, the fourth sampling detection unit 524 includes: a forty-first comparator U41, a forty-second comparator U42, a fourth exclusive or gate XOR4, a fourth AND gate AND4, a forty-first tri-state gate T41, AND a forty-second tri-state gate T42. Specifically, the first input terminal of the forty-second comparator U41, the first input terminal of the forty-second comparator U42, AND the fourth output terminal OUT4 of the display device 40 are commonly connected, the second input terminal of the forty-first comparator U41 is connected to the forty-second preset reference voltage source V41, the second input terminal of the forty-second comparator U42 is connected to the forty-second preset reference voltage source V42, the output terminal of the forty-first comparator U41, the first input terminal of the fourth exclusive-or gate XOR4, the first input terminal of the fourth AND gate AND4 are commonly connected, the output terminal of the forty-second comparator U42, the second input terminal of the fourth exclusive-or gate XOR4, AND the second input terminal of the fourth AND gate AND4 are commonly connected, the output terminal of the fourth exclusive-or gate XOR4 is connected to the input terminal of the forty-first tri-state gate T41, the output terminal of the fourth AND gate AND4 is connected to the input terminal of the forty-two tri-state gate T42, the control terminal of the forty-one tri-state gate T41 AND the control terminal of the forty-two tri-state gate T42 are commonly connected as a first enable control signal input terminal of the fourth sampling detection unit 524 to be connected to the fourth output terminal CH4 of the logic control unit 520, the output terminal of the forty-one tri-state gate T41 is connected as a logic signal output terminal of the fourth sampling detection unit 524 to be connected to the fourth logic signal input terminal out4_chg of the register unit 530, AND the output terminal of the forty-two tri-state gate T42 is connected as a data signal output terminal of the fourth sampling detection unit 524 to be connected to the fourth data signal input terminal out4_dir of the register unit 530.
As an embodiment of the present invention, fig. 9 is a schematic diagram of a structure of a register unit 530 in an embodiment of the present invention, as shown in fig. 9, in this embodiment, the register unit 530 includes: a first OR gate OR1, a second OR gate OR2, and a register 531. Specifically, the first input terminal of the first OR gate OR1 is used as the first logic signal input terminal out1_chg of the register unit 530, the second input terminal of the first OR gate OR1 is used as the second logic signal input terminal out2_chg of the register unit 530, the third input terminal of the first OR gate OR1 is used as the third logic signal input terminal out3_chg of the register unit 530, the fourth input terminal of the first OR gate OR1 is used as the fourth logic signal input terminal out4_chg of the register unit 530, the first input terminal of the second OR gate OR2 is used as the first data signal input terminal out1_dir of the register unit 530, the second input terminal of the second OR gate OR2 is used as the second data signal input terminal out2_dir of the register unit 530, the third input terminal of the second OR gate OR2 is used as the third data signal input terminal out3_dir of the register unit 530, the fourth input terminal out4_r of the register unit 530, the first input terminal of the second OR gate OR2 is used as the fourth data signal input terminal out4_dir of the register unit 530, the first input terminal of the second OR2 is used as the output terminal of the output of the register 531 of the output unit 531 connected with the second output terminal of the output of the OR output of the register unit 531.
In this embodiment, the logic signal CH1 output by the first output terminal CH1 of the logic control unit 520 is used to turn on the first input terminal OUT1 of the constant current driving module 50, and the eleventh preset reference voltage source V11 and the twelfth preset reference voltage source V12 are both reference voltages built in the first sampling detection unit 521, where the eleventh preset reference voltage source V11 is greater than the twelfth preset reference voltage source V12. When the voltage input by the first input terminal OUT1 of the constant current driving module 50 is greater than the eleventh preset reference voltage source V11 and the twelfth preset reference voltage source V12, at this time, the current of the first input terminal OUT1 of the constant current driving module 50 is in a constant current state, and the voltage of the port is in an over-voltage state, so that the output voltage of the power conversion module 50 needs to be reduced, at this time, the OUT1 CHG signal output by the logic signal output terminal of the first sampling detection unit 521 is 1, the OUT1 DIR signal output by the data signal output terminal of the first sampling detection unit 521 is 1, the register 531 processes the received signal to obtain a feedback signal for reducing the voltage, and the power conversion module 30 receives the reduced feedback signal to perform the voltage reduction processing on the output direct current voltage signal. When the voltage input by the first input terminal OUT1 of the constant current driving module 50 is lower than the eleventh preset reference voltage source V11 and the twelfth preset reference voltage source V12, at this time, the current of the first input terminal OUT1 of the constant current driving module 50 is in a non-constant current state, and the voltage of the port is in a low voltage state, so that the output voltage of the power conversion module 30 needs to be boosted, at this time, the signal OUT1_chg output by the logic signal output terminal of the first sampling detection unit 521 is 1, the signal OUT1_dir output by the data signal output terminal of the first sampling detection unit 521 is 0, the register 531 processes the received signal to obtain a feedback signal of the boosted voltage, and the power conversion module 30 receives the boosted feedback signal to boost the output dc voltage signal. When the voltage input by the first input terminal OUT1 of the constant current driving module 50 is lower than the eleventh preset reference voltage source V11 and greater than the twelfth preset reference voltage source V12, at this time, the current of the first input terminal OUT1 of the constant current driving module 50 is in a constant current state, at this time, the signal OUT1_chg output by the logic signal output terminal of the first sampling detection unit 521 is 0, the signal OUT1_dir output by the data signal output terminal of the first sampling detection unit 521 is negligible, and the register 531 processes the received signal to obtain a feedback signal for outputting the holding voltage, that is, the voltage output by the power conversion module 30 is within the preset voltage range at this time, and no adjustment is needed for the direct current voltage signal output by the power conversion module 30.
In the present embodiment, the working principles of the second sampling detection unit 522, the third sampling detection unit 523 and the fourth sampling detection unit 524 are the same as those of the first sampling detection unit 521, and will not be described herein.
As an embodiment of the present invention, fig. 10 is a schematic block diagram of a power conversion module 30 according to an embodiment of the present invention, and as shown in fig. 10, the power conversion module 30 according to the embodiment includes: a signal decomposition unit 310 connected to the constant current driving module 50, for performing signal decomposition processing on the feedback signal, and outputting a first delay signal and a second delay signal; a pulse width modulation conversion unit 320 connected to the signal decomposition unit 310 for outputting a pulse width modulation signal according to the first delay signal and the second delay signal; and a pulse width modulation switching unit 330 connected to the pulse width modulation conversion unit 320 for outputting a plurality of direct current voltage signals according to the pulse width modulation signal and the direct current signal.
As an embodiment of the present invention, fig. 11 is a schematic circuit diagram of a signal decomposition unit 310 in the embodiment of the present invention, as shown in fig. 11, in this embodiment, the signal decomposition unit 310 includes: the input end of the first signal delay 311, the second input end of the third hundred-thirteen comparator U313 and the second signal delay 312 are commonly connected to the input end S1 of the signal decomposition unit 310 and connected to the constant current driving module 50, for receiving the feedback signal output by the constant current driving module 50, the output end of the first signal delay 311 is connected to the first input end of the third hundred-thirteen comparator U313, the output end of the third hundred-thirteen comparator U313 is used as the first output end S2 of the signal decomposition unit 310 to output the first delay signal, the output end of the third hundred-thirteen comparator U313 is also connected to the input end of the second signal delay 312, and the output end S3 of the second signal delay 312 is used as the second output end S3 of the signal decomposition unit 310 to output the second delay signal.
As an embodiment of the present invention, fig. 12 is a schematic circuit diagram of a pwm conversion unit 320 according to an embodiment of the present invention, and as shown in fig. 12, in this embodiment, the pwm conversion unit 320 includes: the first constant current source 323, the first level switch K1, the second level switch K2, the third level switch K3, the first signal buffer 321, the second signal buffer 322, the first capacitor C1, the second capacitor C2, the third capacitor C3, and the twentieth comparator U20. Specifically, the first end of the first level switch K1 is connected to the first end of the first constant current source 323, the second end of the first level switch K1, the first end of the first capacitor C1, the third level switch K3, and the input end of the first signal buffer 321 are commonly connected, the output end of the first signal buffer 321 is connected to the first end of the second level switch K2, the second end of the second level switch K2, the first end of the second capacitor C2, and the input end of the second signal buffer 322 are commonly connected, the second end of the first constant current source 323, the second end of the first capacitor C1, the second end of the third level switch K3, the second end of the second capacitor C2, and the second end of the third capacitor C3 are commonly connected to the ground, the output end of the second signal buffer 322 is connected to the second input end of the twentieth comparator U20, and the output end of the twentieth comparator U20 serves as the output end of the pulse width modulation conversion unit 320.
In this embodiment, fig. 13 is a signal diagram of signal decomposition performed on a feedback signal input by an input terminal S1 by a signal decomposition unit 310, where a pulse width represents a signal to be adjusted, as shown in fig. 13, the feedback signal is delayed by a first signal delay 311, a delay time of the first signal delay 311 is t1, the delayed signal reaches a first input terminal of a third hundred thirteen comparator U313, the first input terminal is a positive phase input terminal of the comparator, and then the first input terminal is compared with a signal input by a negative phase input terminal of the comparator to obtain a first delayed signal, the first delayed signal is delayed by a second signal delay 312 to obtain a second delayed signal, and a time of the second signal delay 312 is t2.
As an embodiment of the present invention, the pwm conversion unit 320 converts the received feedback signal, the first delay signal, and the second delay signal into pwm signals, where the pwm signals are used to control pwm switches in the pwm switch unit, specifically, when the feedback signal received at the input terminal S1 of the signal decomposition unit 310 is at a high level, the feedback signal controls the first level switch K1 to be turned off, the first constant current source 323 charges the first capacitor C1, when the feedback signal is at a low level, the voltage at the second terminal a of the first level switch K1 is linearly increased, and when the feedback signal is at a low level, the first level switch K1 is turned off, at this time, the second delay signal is increased by a high level signal, the high level signal controls the second level switch K2 to be turned off, the second capacitor C2 is charged, the voltage at the second terminal a of the first level switch K1 is Va, the second delay signal is decreased to be a low level signal, and when the third delay signal is at a high level, the first capacitor C1 is discharged.
As an embodiment of the present invention, fig. 14 is a schematic circuit diagram of a pwm switching unit 330 according to an embodiment of the present invention, and as shown in fig. 14, the pwm switching unit 330 according to the present embodiment includes: pulse width modulation switch 331, first transformer T1, fourth diode D4, fifth diode D5, fifth capacitor C5, and sixth capacitor C6. Specifically, the first input end of the first transformer T1 is connected to the output end of the rectifying module 20, the first end of the pulse width modulation switch 331 is connected to the output end of the pulse width modulation converting unit 320, the second end of the pulse width modulation switch 331 is connected to the second input end of the first transformer T1, the first positive output end of the first transformer T1 is connected to the positive electrode of the fourth diode D4, the cathode of the fourth diode D4 is commonly connected to the first end of the fifth capacitor C5 as the first dc voltage signal output end of the power converting module 30, the second positive output end of the first transformer T1 is connected to the anode of the fifth diode D5, and the cathode of the fifth diode D5 is commonly connected to the first end of the sixth capacitor C6 as the second dc voltage signal output end of the power converting module 30, the first negative output end of the first transformer T1, the second end of the fifth capacitor C5, the second negative output end of the first transformer T1, and the second end of the sixth capacitor C6 are commonly grounded.
In this embodiment, when the pwm switching unit 330 receives the pwm signal with the increased voltage, the voltage of the one or more dc voltage signals is controlled to increase simultaneously, and when the pwm switching unit 330 receives the pwm signal with the decreased voltage, the voltage of the one or more dc voltage signals is controlled to decrease simultaneously.
As an embodiment of the present invention, the pwm switching unit 330 may be a BUCK topology circuit, which includes a plurality of BUCK converters, and the BUCK converters are configured to output a plurality of dc voltage signals according to a pwm signal and a dc signal.
In this embodiment, the BUCK topology circuit is configured to receive the dc signal output by the rectifying module and output a plurality of dc voltage signals, and meanwhile, when the plurality of dc voltage signals are received by the display device 40 and then collected by the constant current driving module 50 to obtain a plurality of sampling signals, the constant current driving module 50 obtains a feedback signal according to the plurality of sampling signals, the pulse width modulation converting unit 320 obtains a pulse width modulation signal according to the feedback signal, and the BUCK topology circuit is configured to regulate the dc voltage signal corresponding to the pulse width modulation signal according to the pulse width modulation signal, for example, if the voltage signal output by the white light lamp set in the display device 40 is lower, the constant current driving module 50 outputs a feedback signal for boosting the dc voltage signal of the white light lamp set according to the sampling signal, the pulse width modulation converting unit 320 obtains a pulse width modulation signal for boosting the dc voltage signal of the white light lamp set according to the feedback signal for boosting the dc voltage signal of the white light lamp set, and the BUCK topology circuit outputs a voltage boost for driving the dc voltage signal of the white light lamp set. As an embodiment of the present invention, fig. 15 is a schematic circuit diagram of a control module 60 in the embodiment of the present invention, as shown in fig. 15, in this embodiment, the control module 60 includes a communication unit 610 and a microprocessor unit 620, and the microprocessor unit 620 receives a manipulation instruction sent by a user through the communication unit 610 and sends an adjustment control signal to the power conversion module 30 and the constant current driving module according to the manipulation instruction.
Further, the control module 60 is further configured to control the power conversion module 30 to output a corresponding dc voltage signal, for example, when the user only needs white light illumination, the control module 60 outputs a control command to the power conversion module 30 to control the power conversion module 30 to only output the dc voltage signal for driving the white light lamp set, and then other dc voltage signal outputs of the power conversion module 30 are in a standby state.
In this embodiment, the communication unit 610 may be bluetooth or a signal antenna. The microprocessor unit 620 may be a central processing unit (Central Processing Unit, CPU) that may also be other general purpose processors, digital signal processors (Digital Signal Processor, DSP), application specific integrated circuits (Application Specific Integrated Circuit, ASIC), field-programmable gate arrays (Field-Programmable Gate Array, FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, or the like. The microprocessor unit 620 is configured to send a first pulse width modulation signal to the constant current driving module 50 to control the on and off of the lamp set in the display device 40, and send a feedback signal output by the constant current driving module 50 to the power conversion module 30 to adjust the first dc voltage signal and the second dc voltage signal output by the power conversion module.
As an embodiment of the present invention, a voltage-adjustable dimming control system is provided in this embodiment, and the dimming control system includes a display device 40 and a dimming control circuit according to any of the above embodiments.
As an embodiment of the present invention, fig. 16 is a schematic circuit diagram of a display device 40 according to an embodiment of the present invention, in the present embodiment, a plurality of dc voltage signals output by a power conversion module 30 include a first dc voltage signal and a second dc voltage signal, and as shown in fig. 16, the display device 40 according to the present embodiment includes a red light lamp set 401, a green light lamp set 402, a blue light lamp set 403 and a white light lamp set 404; the first end of the red light lamp set 401, the first end of the green light lamp set 402, the first end of the blue light lamp set 403 and the first direct current voltage signal output end of the power conversion module 30 are commonly connected, the first end of the white light lamp set 404 is connected with the second direct current voltage signal output end of the power conversion module 30, the second end of the red light lamp set 401 is connected with the first input end of the constant current driving module 50, the green light lamp set 402 is connected with the second input end of the constant current driving module 50, the blue light lamp set 403 is connected with the third input end of the constant current driving module 50, and the second end of the white light lamp set 404 is connected with the fourth input end of the constant current driving module 50.
In this embodiment, by inputting a lower first dc voltage signal to the red light lamp set 401, the green light lamp set 402 and the blue light lamp set 403 and inputting a higher second dc voltage signal to the white light lamp set 404, the power efficiency of the display device 40 is improved by using different bead characteristics of the red light lamp set 401, the green light lamp set 402 and the blue light lamp set 403 and the white light lamp set 404, and when the white light lamp set 404 is used as the main light source, the second dc voltage signal is set to be a high voltage signal, so as to increase the driving voltage of the white light lamp set 404, so that the user can fully utilize the light emitting characteristic of the white light, and the cost performance of the display device 40 is increased.
Further, when the white light lamp set 404 is used as the main light source, the second dc voltage signal is a high voltage signal, and the user can send a control command to the control module 60 to control the power conversion module 30 to stop outputting the first dc voltage signal according to the need, at this time, the port of the power conversion module 30 for outputting the first dc voltage signal is in a standby state, so that the user can save the power consumption of the display device when using the white light lamp set for illumination. In this embodiment, in order to enable the driving voltages of the lamp groups to be freely combined according to the user, the first switching tube M1, the second switching tube M2, the third switching tube M3 and the fourth switching tube M4 in the constant current driving module may be set as high voltage MOS tubes, so as to avoid burning out the constant current driving module 50 when the lamp groups are driven at high voltage.
In the dimming control circuit with adjustable voltage provided by the embodiment of the application, the dimming control circuit is connected with an alternating current power supply and a display device, the alternating current output by the alternating current power supply is rectified through the rectifying module to obtain a direct current signal, the power conversion module receives the direct current signal and converts the direct current signal to obtain a plurality of direct current voltage signals to supply power to the display device, the constant current driving module samples the signal output by the display device and outputs a feedback signal according to the sampled signal so that the power conversion module can adjust the plurality of direct current voltage signals according to the feedback signal, different voltages can be output to different lamp groups according to user needs, the problem that in the existing lamplight application, the lamplight control circuit can only output a single voltage to drive a lamp, cannot output different voltages according to different application environments, and the application range of the lamp is greatly limited is solved.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (8)
1. A voltage-adjustable dimming control circuit connected to an ac power source and a display device, the dimming control circuit comprising:
the rectification module is connected with the alternating current power supply and used for rectifying an alternating current signal output by the alternating current power supply and outputting a direct current signal;
the power conversion module is connected with the rectifying module and the display device and is used for receiving the direct current signals and outputting a plurality of direct current voltage signals to supply power to the display device; and
the constant current driving module is connected with the display device and the power conversion module and is used for sampling output signals of the display device and obtaining a plurality of sampling signals, and outputting feedback signals according to the plurality of sampling signals so that the power conversion module can regulate a plurality of direct current voltage signals according to the feedback signals; the voltages of the plurality of direct-current voltage signals are different;
the control module is connected with the constant current driving module and the power conversion module and is used for sending pulse width modulation control signals and logic control signals to the constant current driving module according to external control instructions and sending switching signals to the power conversion module;
The constant current driving module includes:
the logic control unit is connected with the logic control signal output end of the control module and is used for outputting a first enabling control signal, a second enabling control signal, a third enabling control signal and a fourth enabling control signal according to the logic control signal;
the first sampling detection unit is connected with the first output end of the logic control unit and is used for sampling signals of the first input end of the constant current driving module to obtain a first sampling signal and outputting a first logic signal and a first data signal according to the first sampling signal and the first enabling control signal;
the second sampling detection unit is connected with the second output end of the logic control unit and is used for sampling a second input end of the constant current driving module to obtain a second sampling signal and outputting a second logic signal and a second data signal according to the second sampling signal and the second enabling control signal;
the third sampling detection unit is connected with the third output end of the logic control unit and is used for sampling signals of the third input end of the constant current driving module to obtain a third sampling signal and outputting a third logic signal and a third data signal according to the third sampling signal and the third enabling control signal;
The fourth sampling detection unit is connected with the fourth input end of the logic control unit and is used for sampling signals of the fourth input end of the constant current driving module to obtain a fourth sampling signal and outputting a fourth logic signal and a fourth data signal according to the fourth sampling signal and the fourth enabling control signal; and
and the register unit is respectively connected with the first sampling detection unit, the second sampling detection unit, the third sampling detection unit and the fourth sampling detection unit and is used for outputting the feedback signals according to the first logic signals, the first data signals, the second logic signals, the second data signals, the third logic signals, the third data signals, the fourth logic signals and the fourth data signals.
2. The dimming control circuit of claim 1, wherein the constant current drive module further comprises: the first operational amplifier, the second operational amplifier, the third operational amplifier, the fourth operational amplifier, the first switching tube, the second switching tube, the third switching tube, the fourth switching tube, the first resistor unit, the second resistor unit, the third resistor unit and the fourth resistor unit; and
The pulse width modulation control unit is connected with the pulse width modulation control signal output end of the control module and used for outputting a first pulse width modulation signal, a second pulse width modulation signal, a third pulse width modulation signal and a fourth pulse width modulation signal according to the pulse width modulation control signal;
the current input end of the first switching tube is used as the first input end of the constant current driving module, the current input end of the second switching tube is used as the second input end of the constant current driving module, the current input end of the third switching tube is used as the third input end of the constant current driving module, the current input end of the fourth switching tube is used as the fourth input end of the constant current driving module, the control end of the first switching tube is connected with the output end of the first operational amplifier, the control end of the second switching tube is connected with the output end of the second operational amplifier, the control end of the third switching tube is connected with the output end of the third operational amplifier, the control end of the fourth switching tube is connected with the output end of the fourth operational amplifier, the second input end of the first switching tube, the current output end of the first switching tube and the first end of the first resistor unit are connected in common, the second end of the first resistor unit is grounded, the second end of the second switching tube is connected with the second input end of the first resistor unit, the second input end of the fourth switching tube is connected with the fourth resistor unit, the fourth input end of the fourth resistor is connected with the fourth resistor unit in common mode, the first input end of the second operational amplifier is connected with the second output end of the pulse width modulation control unit, the first input end of the third operational amplifier is connected with the third input end of the pulse width modulation control unit, and the first input end of the fourth operational amplifier is connected with the fourth input end of the pulse width modulation control unit.
3. The dimming control circuit of claim 1, wherein the first sample detection unit comprises: an eleventh comparator, a twelfth comparator, a first exclusive-or gate, a first and gate, an eleventh tri-state gate, and a twelfth tri-state gate;
the first input end of the eleventh comparator, the first input end of the twelfth comparator and the first output end of the display device are commonly connected, the second input end of the eleventh comparator is connected with an eleventh preset reference voltage source, the second input end of the twelfth comparator is connected with a twelfth preset reference voltage source, the output end of the eleventh comparator, the first input end of the first exclusive-or gate and the first input end of the first and gate are commonly connected, the output end of the twelfth comparator, the second input end of the first exclusive-or gate and the second input end of the first and gate are commonly connected, the output end of the first exclusive-or gate is connected with the input end of the eleventh tri-state gate, the output end of the first and gate is connected with the input end of the twelfth gate, the control end of the eleventh gate and the control end of the twelfth gate are commonly connected as a first enabling control signal of the first tri-state sampling detection unit, the output end of the eleventh gate is used as a tri-state logic tri-state detection unit, and the output end of the first tri-state detection unit is used as a first sampling signal of the output end of the third logic detection unit.
4. The dimming control circuit of claim 1, wherein the power conversion module comprises:
the signal decomposition unit is connected with the constant current driving module and is used for performing signal decomposition processing on the feedback signal and outputting a first delay signal and a second delay signal;
the pulse width modulation conversion unit is connected with the signal decomposition unit and is used for outputting a pulse width modulation signal according to the first delay signal and the second delay signal; and
and the pulse width modulation switch unit is connected with the pulse width modulation conversion unit and is used for outputting a plurality of direct-current voltage signals according to the pulse width modulation signals and the direct-current signals.
5. The dimming control circuit of claim 4, wherein the pulse width modulation conversion unit comprises: the device comprises a first constant current source, a first level switch, a second level switch, a third level switch, a first signal buffer, a second signal buffer, a first capacitor, a second capacitor, a third capacitor and a twentieth comparator;
the first end of the first level switch is connected with the first end of the first constant current source, the second end of the first level switch, the first end of the first capacitor, the third level switch and the input end of the first signal buffer are commonly connected, the output end of the first signal buffer is connected with the first end of the second level switch, the second end of the second level switch, the first end of the second capacitor and the input end of the second signal buffer are commonly connected, the second end of the first constant current source, the second end of the first capacitor, the second end of the third level switch, the second end of the second capacitor and the second end of the third capacitor are commonly grounded, the output end of the second signal buffer is connected with the second input end of the twenty-second comparator, and the output end of the twenty-second comparator serves as the output end of the pulse width modulation conversion unit.
6. The dimming control circuit of claim 4, wherein the pulse width modulation switching unit is a BUCK topology circuit comprising a plurality of BUCK converters for outputting a plurality of the dc voltage signals in accordance with the pulse width modulation signal and the dc signal.
7. A voltage-adjustable dimming control system comprising an ac power source, a display device, and a dimming control circuit as claimed in any one of claims 1 to 6.
8. The dimming control system of claim 7, wherein the plurality of dc voltage signals comprises a first dc voltage signal and a second dc voltage signal, and the display device comprises a red light set, a green light set, a blue light set, and a white light set;
the first end of the red light lamp set, the first end of the green light lamp set, the first end of the blue light lamp set and the first direct-current voltage signal output end of the power conversion module are connected together, the first end of the white light lamp set is connected with the second direct-current voltage signal output end of the power conversion module, the second end of the red light lamp set is connected with the first input end of the constant-current driving module, the green light lamp set is connected with the second input end of the constant-current driving module, the blue light lamp set is connected with the third input end of the constant-current driving module, and the second end of the white light lamp set is connected with the fourth input end of the constant-current driving module.
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