CN108807587B - Silicon-based chip with function of enhancing mid-infrared spectrum signal and preparation method thereof - Google Patents
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Abstract
The invention discloses a silicon-based chip with a function of enhancing mid-infrared spectrum signals, which comprises a silicon substrate, wherein a Ge buffer layer and a heavily doped Ge layer are sequentially arranged on the silicon substrate, and a sub-wavelength microstructure array is etched on the heavily doped Ge layer. The invention also discloses a preparation method of the silicon-based chip with the function of enhancing the mid-infrared spectrum signal. Compared with a III-V group semiconductor, the silicon-based chip with the function of enhancing the mid-infrared spectrum signal has the characteristic of weak lattice absorption and is more suitable for serving as a molecular sensor chip material; silicon is used as a substrate, so that monolithic integration with an electronic device is facilitated, and the stability and the mass production of the device are greatly improved.
Description
Technical Field
The invention relates to the field of silicon photoelectronics, in particular to a silicon-based chip with a function of enhancing mid-infrared spectrum signals and a preparation method thereof.
Background
Fourier transform infrared spectroscopy (FTIR) has important application in the fields of biomolecule detection, chemical harmful gas monitoring and the like. Specifically, we can identify the type and concentration of a molecule by testing the infrared spectrum of the molecule to identify the unique vibrational fingerprint region of the molecule (i.e., the characteristic vibrational absorption peak of the molecule, which is typically located in the mid-infrared band with a wavelength range of 4-25 μm). For example, in the medical testing field, infrared of normal and cancerous tissues is foundThe spectra are obviously different, and the symmetric stretching vibration peak (1080 cm) of the phosphodiester group in the nucleic acid molecule of the cancerous tissue-1) Is significantly increased over the band intensity of normal tissue.
When the content or concentration of the molecules is below a certain limit, limited to the resolution of the infrared spectrometer, the vibrational absorption peaks of the molecules will be swamped by the background noise. For the trace detection of molecules and the improvement of the resolution of infrared spectrum near the molecular fingerprint region, a silicon-based chip taking local surface plasmons (LRPs) as an important mechanism is produced. The LPRs can limit electromagnetic waves in a sub-wavelength structure, enhance the intensity of electromagnetic fields near the structure, and enable molecules near the structure to multiply the interaction with the electromagnetic waves. Thus, originally very weak molecular signals are amplified and resolved in the infrared spectrum.
To generate the LPRs effect, a suitable mid-infrared plasma material must be found, and the plasma frequency omega of the material is enabled to bep(ωp∞(n/me)0.5Where n is the material carrier concentration, meElectron effective mass) happens to fall in the vicinity of the molecular fingerprint region. In fact, heavily doped semiconductors, due to their electrical doping concentration of-1018-1020cm-3Adjustable in range (corresponding to a plasma frequency range of 400 and 2500 cm)-1) And the interband transition loss is very small, so that the method is an ideal choice for the substrate material of the mid-infrared plasma sensor.
In 2012, tapered array microchips prepared with heavily doped GaAs as the base material and using nanosphere lithography were used to enhance molecular fingerprint spectrum signals. However, this III-V semiconductor has dipole activated optical phonons, which absorb mid-infrared radiation and may overlay the weak signal of the molecular spectrum if it is used to fabricate molecular sensors. And the dipole activated optical phonon can also accelerate the recombination of light-excited carriers, so that the light modulation of the nano antenna sensor is not facilitated. In addition, III-V semiconductors are also not compatible with current Si-COMS processes.
Disclosure of Invention
The invention provides a silicon-based chip with a function of enhancing mid-infrared spectrum signals, wherein a substrate is silicon, so that monolithic integration with an electronic device is facilitated, and the stability and the mass production of the device are greatly improved.
The invention provides the following technical scheme:
a silicon-based chip with a function of enhancing mid-infrared spectrum signals comprises a silicon substrate, wherein a Ge (germanium) buffer layer and a heavily doped Ge layer are sequentially arranged on the silicon substrate, and a sub-wavelength microstructure array is etched on the heavily doped Ge layer.
Epitaxial growth of heavily doped germanium films directly on silicon substrates has certain difficulties because of both the lattice mismatch of Si and Ge and the impact of the doping source on the epitaxial quality. Therefore, an undoped Ge buffer layer should be first epitaxial on the silicon substrate, and then a heavily doped germanium film should be epitaxial on the Ge buffer layer.
The strain created by the Ge and Si lattice mismatch needs to be relieved in the form of threading dislocations, which can adversely affect a range of silicon-based optoelectronic devices. In order to suppress the generation of threading dislocation and confine it near the interface of Ge and Si, it is necessary to grow a germanium buffer layer on a silicon substrate by a low and high temperature two-step epitaxial method.
Preferably, the Ge buffer layer comprises a low-temperature Ge layer of 30-70 nm and a high-temperature Ge layer of 500 nm-1 mu m, and the low-temperature Ge layer is close to the silicon substrate;
the growth temperature of the low-temperature Ge layer is 300-380 ℃, and the growth temperature of the high-temperature Ge layer is 550-650 ℃.
The low temperature Ge layer will relax most of the strain in the form of threading dislocations and maintain high surface flatness. And raising the temperature of the substrate to grow the high-temperature Ge layer. Since most of the threading dislocation is limited at the interface of the low-temperature Ge layer and the silicon substrate, the high-temperature Ge layer has very low threading dislocation density (1 multiplied by 10)6cm-2)。
Preferably, the thickness of the heavily doped Ge layer is 1-2 μm; the doping source is antimony (Sb) or phosphorus (P).
Preferably, in the heavily doped Ge layer, the doping concentration of the doping source is 1018cm-3～1020cm-3。
The electrical doping concentration of the doping source can be controlled by controlling the substrate temperature and the doping flow rate of the doping source.
Preferably, when the heavily doped Ge layer is prepared, the substrate temperature of the heavily doped Ge layer is 150-350 ℃, and the flow of a doping source is 1.0 multiplied by 1011～2.9×1012cm-2S-1。
It is further preferable that, in the preparation of the heavily doped Ge layer, the flow of the doping source is controlled to be 1.0 × 10 when the substrate temperature of the heavily doped Ge layer is 250 ℃11～2.9×1012cm-2S-1；
Or, when the flow rate of the doping source is 1.4X 1012cm-2S-1And controlling the substrate temperature of the heavily doped Ge layer to be 150-350 ℃.
Preferably, the sub-wavelength microstructure array is a bow-tie antenna structure array, the period of the bow-tie antenna structure in the horizontal direction is 3.7-5.4 μm, and the period of the bow-tie antenna structure in the vertical direction is 2-3 μm;
the single bow-tie antenna structure consists of two isosceles triangular prism structures with opposite vertex angles; the height of the isosceles triangular prism is 0.6-1.4 mu m; the top angle of the triangle on the top surface of the isosceles triangular prism is 30-75 DEG, and the height is 1.3-2 mu m; the gap between two opposite isosceles triangular prism structures is 100-400 nm.
The horizontal direction is parallel to the connecting line of the vertex angles of the two equal-waist triangular prisms.
Preferably, the sub-wavelength microstructure array is a cuboid dipole antenna structure array, the period of the cuboid dipole antenna structure in the long edge direction is 5-7 μm, and the period of the cuboid dipole antenna structure in the short edge direction is 2 μm;
the single cuboid dipole antenna structure consists of two cuboid prisms opposite to each other in the long edge direction; the length of the rectangular prism is 2-3 μm, the width is 0.8 μm, and the height is 1-1.5 μm; the gap between two opposing rectangular prisms was 0.3 μm.
Preferably, the sub-wavelength microstructure array is a cylindrical structure array, and the period of the cylindrical structure array is 3-4 μm;
each cylinder has a height of 0.5 to 2 μm and a diameter of 2 to 3 μm.
The invention also discloses a preparation method of the silicon-based chip with the function of enhancing the mid-infrared spectrum signal, which comprises the following steps:
(1) cleaning the silicon wafer by an RCA cleaning method, drying and then carrying out pretreatment;
(2) growing a Ge buffer layer on the pretreated silicon wafer by adopting a molecular beam epitaxy method or a metal organic chemical vapor deposition method;
(3) growing a heavily doped Ge layer on the Ge buffer layer;
(4) and preparing the sub-wavelength microstructure array on the heavily doped Ge layer by adopting electron beam lithography and reactive ion etching.
Preferably, the cleaning of the silicon wafer by the RCA cleaning method comprises the following steps:
(1-1) ultrasonically cleaning a silicon wafer for 5-20 minutes by using an acetone solution, and repeatedly washing the silicon wafer by using deionized water to remove organic matter residues on the surface of the silicon wafer;
(1-2) putting the silicon wafer into an isopropanol solution, ultrasonically cleaning for 5-20 minutes, and repeatedly washing with deionized water to remove acetone residues on the surface of the silicon wafer;
(1-3) putting the silicon wafer into a mixed solution of ammonia water, hydrogen peroxide and water, boiling for 10-20 minutes, and repeatedly washing with deionized water to remove attached particles on the surface of the silicon wafer;
the volume ratio of ammonia water, hydrogen peroxide and water is 1: 5;
(1-4) soaking the silicon wafer in an HF solution with the mass percent of 4% for 1 minute, and then repeatedly washing the silicon wafer with deionized water to remove a natural oxidation layer on the surface of the silicon wafer;
(1-5) putting the silicon wafer into a mixed solution of hydrogen peroxide and concentrated sulfuric acid, boiling for 10-20 minutes, and repeatedly washing with deionized water;
the volume ratio of the hydrogen peroxide to the concentrated sulfuric acid is 1: 3;
(1-6) repeating the steps (4) and (5) for more than 2 times.
Preferably, in step (1), the pretreatment comprises:
(a) raising the temperature of the silicon wafer to 200-400 ℃ to remove water on the surface of the silicon wafer;
(b) and raising the temperature of the silicon wafer to 900-1000 ℃ to remove residual oxides on the surface of the silicon wafer.
Preferably, the step (4) comprises the following steps:
(4-1) coating photoresist on the heavily doped Ge layer and baking at 80-100 ℃;
(4-2) manufacturing a pre-designed sub-wavelength microstructure array on the photoresist by adopting electron beam lithography equipment, and developing;
(4-3) placing the silicon-based chip after photoetching into a reactive ion etching machine, and adopting SF6And C4F8Etching gas is used;
and (4-4) cleaning the photoresist to obtain the silicon-based chip with the function of enhancing the mid-infrared spectrum signal.
Compared with the prior art, the invention has the following beneficial effects:
(1) compared with a III-V group semiconductor, the silicon-based chip with the function of enhancing the mid-infrared spectrum signal has the characteristic of weak lattice absorption and is more suitable for serving as a molecular sensor chip material;
(2) silicon is used as a substrate, so that monolithic integration with an electronic device is facilitated, and the stability and the mass production of the device are greatly improved;
(3) germanium is extended on a silicon substrate and used as a mid-infrared spectrum signal enhancement chip material, and compared with silicon, the effective electron mass of the germanium is smaller, so that under the same plasma frequency, the doping concentration required by the germanium is smaller, and the free carrier absorption is also smaller; the carrier mobility of germanium is higher than that of silicon, so that the material loss of germanium is smaller; the epitaxial growth technology of germanium on the silicon substrate is developed more mature, a silicon-based germanium epitaxial film with complete structure, high crystallization quality and less defect concentration can be obtained, and the material has small lattice scattering rate and low loss.
Drawings
FIG. 1 is a schematic structural diagram of a silicon-based chip with FTIR signal enhancement function according to the present invention;
fig. 2 is a schematic layout diagram of an array of the bowtie antenna structure according to embodiment 1;
FIG. 3 is a schematic diagram of an array of a rectangular dipole antenna structure according to embodiment 2;
FIG. 4 is a schematic diagram of the arrangement of a cylindrical structure array in example 3;
FIG. 5 is a schematic diagram of the electromagnetic field distribution of the cylindrical structured array in example 3.
Detailed Description
As shown in FIG. 1, a silicon-based chip with FTIR signal enhancement function comprises a silicon substrate, wherein a Ge buffer layer and a heavily doped Ge layer are sequentially grown on the silicon substrate, and a sub-wavelength microstructure array is etched on the heavily doped Ge layer.
The Ge buffer layer is composed of an undoped low-temperature Ge layer and an undoped high-temperature Ge layer, and the low-temperature Ge layer is close to the silicon substrate.
The heavily doped Ge layer is a heavily doped germanium layer with antimony as an n-type dopant. And manufacturing the sub-wavelength microstructure array on the heavily doped Ge layer by using electron beam lithography and reactive ion etching technology.
Example 1
A method for manufacturing a silicon-based chip with an enhanced FTIR signal comprises the following steps:
(1) cleaning the silicon wafer by using a standard RCA cleaning method, wherein the specific RCA cleaning method comprises the following steps:
(1-1) ultrasonically cleaning the silicon wafer by using an acetone solution for 5-20 minutes, and repeatedly washing the silicon wafer by using deionized water to remove organic matter residues on the surface of the silicon wafer;
(1-2) putting the silicon wafer into an isopropanol solution, ultrasonically cleaning for 5-20 minutes, and repeatedly washing with deionized water to remove acetone residues on the surface of the silicon wafer;
(1-3) putting the silicon wafer into a mixed solution of ammonia water, hydrogen peroxide and water (the volume ratio is 1: 5) to boil for 10-20 minutes, repeatedly washing the silicon wafer with deionized water, and removing particles attached to the surface of the silicon wafer in the mixed solution;
(1-4) soaking the silicon wafer in an HF solution with the mass percent of 4% for 1 minute, and then repeatedly washing with deionized water. Removing a natural oxidation layer on the surface of the silicon wafer;
(1-5) putting the silicon wafer into a mixed solution of hydrogen peroxide and concentrated sulfuric acid (the volume ratio of the hydrogen peroxide to the concentrated sulfuric acid is 1: 3), boiling for 10-20 minutes, and repeatedly washing with deionized water;
(1-6) repeating the steps (4) and (5) to make the surface of the final Si sheet as hydrophobic as possible.
(2) The cleaned silicon substrate was transferred to a pretreatment chamber, and the substrate temperature was raised to 300 ℃ and maintained for 30min to remove water vapor. Then, the substrate was transferred to a coating chamber, and the temperature of the substrate was raised to 950 ℃ and maintained for 5 minutes, thereby removing the residual oxide on the surface. Growing a low-temperature intrinsic germanium layer by molecular beam epitaxy with vacuum degree superior to 2 × 10-8Pa, growth rate of germanium layer of
The thickness of the film layer is 30nm, and the temperature of the substrate is 380 ℃.
(3) Growing a high-temperature germanium layer on the low-temperature germanium layer for inhibiting the generation of the threading dislocation due to the lattice mismatch so as to improve the epitaxial quality of the germanium layer, wherein the growth conditions are as follows: the growth rate of the germanium layer is
The thickness of the film layer is 1 μm, and the substrate temperature is 600 ℃.
(4) And growing a doped layer on the high-temperature germanium layer. The substrate temperature of the doped layer was 150 ℃ and the growth rate was
The thickness of the film layer is 1 mu m, the doping source is antimony simple substance, and the flow rate is 1.4 multiplied by 1012cm-2S-1。
(5) A bow-tie antenna structure array (as shown in fig. 2) is fabricated on the doped layer, and the preparation method of the bow-tie antenna structure array comprises the following steps:
electron beam lithography: MaN2410 photoresist is firstly spin-coated on a silicon-based heavily doped germanium film, the spin-coating rotation speed is 2000rpm, the spin-coating time is 3 seconds, then the speed is increased to 4000rpm, the spin-coating time is 29 seconds, and the silicon-based heavily doped germanium film is baked for 5 minutes at 90 ℃. Fabricating a microstructure array on the photoresist using an electron beam lithography apparatus with a base dose of 130 μ C/cm2. Thereafter, the sample was placed in the Ma-D532 developer for 300 seconds and then in deionized water for 60 seconds.
Reactive ion etching: placing the photoetched sample into a reactive ion etching machine, selecting SF6And C4F8By adjusting the ratio of these two gases (8 ppm: 8ppm in this example) for the etching gases, the balance of the etching and passivation processes can be maintained.
Finally, the MaN2410 photoresist was washed off with NMP (N-methylpyrrolidone) solution.
Finally etching 5X 5mm on the heavily germanium-doped film2The array of bowtie antenna structures. The single bowknot type antenna structure is composed of two triangular prism structures with opposite vertex angles, the height of a triangle on the top surface of each triangular prism is 1.8 mu m, the gap between the triangular prisms is 200nm, the height of each triangular prism is 1 mu m, and the vertex angle of each triangular prism is 45 degrees. The period of the bowtie antenna structure in the horizontal direction is 4.8 μm, and the period in the vertical direction is 2.5 μm.
The silicon-based chip with the enhanced FTIR signal enhancement prepared by the embodiment has the advantages that the local plasma resonance wavelength of the bow-tie antenna structure array is 7.8 mu m, and the electric field intensity near the energy density hot spot of the electromagnetic field is 38 times of the initial incident electric field intensity.
Example 2
A silicon-based chip with the function of enhancing FTIR signals is prepared by the same process as in example 1, except that the sub-wavelength microstructure array to be etched is changed from a bow-tie antenna structure array (shown in FIG. 2) to a cuboid dipole antenna structure array (shown in FIG. 3). The single dipole antenna structure consists of two cuboid structures which are opposite in the long edge direction, the length of the cuboid is 3 mu m, the width of the cuboid is 0.8 mu m, the height of the cuboid is 1.5 mu m, the period in the long edge direction is 9.3 mu m, the period in the short edge direction is 2 mu m, and the gap between the cuboids is 0.3 mu m.
The silicon-based chip with enhanced FTIR signal enhancement prepared in example 2 has a local plasma resonance wavelength of 9.4 μm in a dipole antenna structure array, and the electric field intensity in the vicinity of an electromagnetic field energy density hot spot is 31 times of the initial incident electric field intensity.
Example 3
The specific preparation process of the silicon-based chip with the function of enhancing the FTIR signals is the same as that in the embodiment 1, except that the sub-wavelength microstructure array to be etched is changed from a bow-tie antenna structure array (shown in FIG. 2) to a cylindrical structure array (shown in FIG. 4). Each cylinder had a height of 1 μm, a diameter of 2 μm and a period of 2.2. mu.m.
The electromagnetic field of the silicon-based chip with enhanced FTIR signal enhancement prepared in example 3 is respectively shown in FIG. 5, the local plasmon resonance wavelength of the cylindrical structure array is 8.0 μm, and the electric field intensity near the energy density hot spot of the electromagnetic field is 13 times of the initial incident electric field intensity.
From the embodiments 1 to 3, the water caltrops and the tips in the sub-wavelength microstructure array (bowknot antenna or dipole antenna) can more effectively localize the electromagnetic field energy, and the field enhancement effect is much larger than that of a round cylindrical structure.
Claims (7)
1. A silicon-based chip with the function of enhancing mid-infrared spectrum signals is characterized by comprising a silicon substrate, wherein a Ge buffer layer and a heavily doped Ge layer are sequentially arranged on the silicon substrate, and a sub-wavelength microstructure array is etched on the heavily doped Ge layer;
the sub-wavelength microstructure array is a bow-tie antenna structure array, and a single bow-tie antenna structure consists of two isosceles triangular prism structures with opposite vertex angles; the height of the isosceles triangular prism is 0.6-1.4 mu m; the top angle of the triangle on the top surface of the isosceles triangular prism is 30-75 DEG, and the height of the triangle is 1.3-2 mu m; the gap between the two opposite isosceles triangular prism structures is 100-400 nm;
the period of the bow-tie antenna structure in the horizontal direction is 3.7-5.4 mu m, and the period in the vertical direction is 2-3 mu m; the horizontal direction is parallel to the connecting line of the vertex angles of the two equal-waist triangular prisms.
2. The silicon-based chip with the function of enhancing the mid-infrared spectrum signal according to claim 1, wherein the Ge buffer layer comprises a low-temperature Ge layer of 30-70 nm and a high-temperature Ge layer of 500 nm-1 μm, and the low-temperature Ge layer is close to the silicon substrate;
the growth temperature of the low-temperature Ge layer is 300-380 ℃, and the growth temperature of the high-temperature Ge layer is 550-650 ℃.
3. The silicon-based chip with the function of enhancing the mid-infrared spectrum signal according to claim 1, wherein the heavily doped Ge layer is 1-2 μm thick; the doping source is antimony or phosphorus.
4. The silicon-based chip with the function of enhancing mid-infrared spectral signals of claim 3, wherein the doping concentration of the doping source in the heavily doped Ge layer is 1018cm-3~1020cm-3。
5. A method for preparing a silicon-based chip with the function of enhancing mid-infrared spectrum signals according to any one of claims 1 to 4, which is characterized by comprising the following steps:
(1) cleaning the silicon wafer by an RCA cleaning method, drying and then carrying out pretreatment;
(2) growing a Ge buffer layer on the pretreated silicon wafer by adopting a molecular beam epitaxy method or a metal organic chemical vapor deposition method;
(3) growing a heavily doped Ge layer on the Ge buffer layer;
(4) and preparing the sub-wavelength microstructure array on the heavily doped Ge layer by adopting electron beam lithography and reactive ion etching.
6. The method for preparing a silicon-based chip with the function of enhancing mid-infrared spectrum signals according to claim 5, wherein in the step (1), the pretreatment comprises:
(a) raising the temperature of the silicon wafer to 200-400 ℃ to remove water on the surface of the silicon wafer;
(b) and raising the temperature of the silicon wafer to 900-1000 ℃ to remove residual oxides on the surface of the silicon wafer.
7. The method for preparing a silicon-based chip with the function of enhancing mid-infrared spectrum signals according to claim 5, wherein the step (4) comprises the following steps:
(4-1) coating photoresist on the heavily doped Ge layer and baking at 80-100 ℃;
(4-2) manufacturing a pre-designed sub-wavelength microstructure array on the photoresist by adopting electron beam lithography equipment, and developing;
(4-3) placing the silicon-based chip after photoetching into a reactive ion etching machine, and adopting SF6And C4F8Etching gas is used;
and (4-4) cleaning the photoresist to obtain the silicon-based chip with the function of enhancing the mid-infrared spectrum signal.
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