CN108807530A - Heterojunction field effect transistor and preparation method thereof - Google Patents

Heterojunction field effect transistor and preparation method thereof Download PDF

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CN108807530A
CN108807530A CN201810628897.0A CN201810628897A CN108807530A CN 108807530 A CN108807530 A CN 108807530A CN 201810628897 A CN201810628897 A CN 201810628897A CN 108807530 A CN108807530 A CN 108807530A
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algan
effect transistor
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CN108807530B (en
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刘新科
王磊
敖金平
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Guixi crossing Photoelectric Technology Co.,Ltd.
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Shenzhen University
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28575Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising AIIIBV compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT

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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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  • Junction Field-Effect Transistors (AREA)

Abstract

The invention belongs to technical field of semiconductors, and in particular to a kind of heterojunction field effect transistor and preparation method thereof.The preparation method, includes the following steps:Substrate is provided;AlGaN/GaN epitaxially deposited layers are prepared over the substrate;Source electrode and drain electrode is prepared on the AlGaN/GaN epitaxially deposited layers;Using magnetron sputtering method on the AlGaN/GaN epitaxially deposited layers depositing p-type oxide, p-type oxide grid is made.The preparation method is simple for process, it both can be contaminated to avoid p-type oxide, it may be implemented to prepare the p-type oxide grid of higher concentration again, and also ensuring positive regulation ability to GaN base heterojunction field effect transistor threshold voltage, the device power of the final heterojunction field effect transistor is significantly improved.

Description

Heterojunction field effect transistor and preparation method thereof
Technical field
The invention belongs to technical field of semiconductors, and in particular to a kind of heterojunction field effect transistor and preparation method thereof.
Background technology
Cuprous oxide (Cu2O) it is a kind of I-IV races semi-conducting material haveing excellent performance, because it is direct with 2.1eV Band gap and very high visible absorption coefficient, along with it has many advantages, such as nontoxic, low price, abundant raw material, therefore mostly by Preparation applied to solar cell and photodetector components.Meanwhile Cu2O has photocatalytic activity, can directly utilize The cracking that visible light carrys out catalytic water generates hydrogen, becomes the preferred material that energy conservation and environmental protection generates hydrogen area research.In addition, due to Cu2The presence in the vacancy Cu, Cu in O crystal structures2O is assertive evidence p-type semiconductor, because of Cu2O has high mobility, so also often doing It is combined with n-type semiconductor for channel material, is used for the preparation of thin film transistor (TFT) (TFTs).Therefore, Cu2O will be one kind in electricity The thin-film material of, optics, semiconductor applications with particularly significant application prospect.By its film nano structure so that manufacture More small dimension, more high energy efficiency semiconductor chip are possibly realized, it is made to be widely used in nanoelectronic component field.In addition, Cu2O also has important application value in gas-monitoring field.In semiconductor optoelectronic growing today, Cu2O is even more conduct Natural p-type electric-conducting material is shown one's talent.
After practical first generation Ge, the Si base device of development and second generation SiC, InP-base device, using GaN base as the of representative The research and development of three generations's semiconductor material with wide forbidden band cause the attention of scientists.GaN base LED has completely passed into industrialization at present Stage, and GaN base material relies on its energy gap EgGreatly, the features such as electron saturation velocities are high, and thermal conductivity is good and capable of being formed has The AlGaN/GaN heterojunction structures of the two-dimensional electron gas (2DEG) of high concentration make GaN base power electronic devices especially suitable for height The evils such as temperature, high frequency, high-power, radioresistance omit environment.
In technical field of semiconductors, traditional p-type Cu2The preparation method of O films is usually to pass through hot oxygen using metallic copper Change method grows p-type Cu2O.Although this technology can form p-type Cu by Low temperature regulation oxidate temperature2O, but have Very fatal disadvantage, after to be prepared for subsequent technique by photoetching process, Cu during this2O can be oxidized to aoxidize Copper (CuO) and its surface also can be contaminated or introduce defect, and with traditional thermal oxidation method come the p-type Cu that grows2O is past It is less than 1 × 10 toward its hole concentration16cm-3
Invention content
It is an object of the invention to overcome the above-mentioned deficiency of the prior art, provide a kind of heterojunction field effect transistor and its Preparation method, it is intended to solve the technology that existing GaN heterojunction field effect transistor threshold voltage ability of regulation and control is poor, power is low and ask Topic.
For achieving the above object, the technical solution adopted by the present invention is as follows:
One aspect of the present invention provides a kind of preparation method of heterojunction field effect transistor, includes the following steps:
Substrate is provided;
AlGaN/GaN epitaxially deposited layers are prepared over the substrate;
Source electrode and drain electrode is prepared on the AlGaN/GaN epitaxially deposited layers;
Using magnetron sputtering method on the AlGaN/GaN epitaxially deposited layers depositing p-type oxide, be made p-type oxide Grid.
The preparation method of heterojunction field effect transistor provided by the invention, it is different in AlGaN/GaN using magnetron sputtering method P-type oxide grid is made in depositing p-type oxide on matter epitaxial layer;The preparation method is simple for process, can both be aoxidized to avoid p-type Object is contaminated, and may be implemented to prepare the p-type oxide grid of higher concentration, and also ensures and imitated to GaN base heterojunction field The positive regulation ability of transistor threshold voltage is answered, the device power of the final heterojunction field effect transistor is significantly carried It is high.
Another aspect of the present invention provides a kind of heterojunction field effect transistor, including AlGaN/GaN epitaxially deposited layers, described It is provided with source electrode and drain electrode on AlGaN/GaN epitaxially deposited layers;It is additionally provided with p on the AlGaN/GaN epitaxially deposited layers The p-type oxide grid cap layer structure of type oxide composition.
Heterojunction field effect transistor provided by the invention is GaN base heterojunction field effect transistor, is provided with p-type The p-type oxide grid cap layer structure of oxide composition;Compared with traditional schottky metal gate electrode, p-type oxide is direct The characteristics such as the regulatable hole concentration of bandgap semiconductor material and energy gap more can effectively adjust GaN base heterostructure band knot Structure, and then regulate and control threshold voltage, to realize the GaN base heterojunction field effect transistor of enhanced (threshold voltage is more than 0 volt) Power device;The heterojunction field effect transistor can reduce unnecessary power attenuation and the device count of secondary circuit, carry High integration, to realizing that application of the GaN base heterojunction field effect transistor in power electronics conversion is of great significance.
Description of the drawings
Fig. 1 is the hole current-carrying of cuprous oxide film in radical heterojunction field effect transistor prepared by the embodiment of the present invention 1 Sub- concentration (hole carrier density) and resistivity (resistivity) and sputtering power (sputtering power) Graph of relation;
Fig. 2 possesses p-type Cu for prepared by the embodiment of the present invention 12The GaN hetero junction field effect crystal of O grid cap layer structures The transfer characteristic comparison diagram of pipe and tradition GaN heterojunction field effect transistor.
Specific implementation mode
In order to make technical problems, technical solutions and advantageous effects to be solved by the present invention be more clearly understood, below in conjunction with Embodiment, the present invention will be described in further detail.It should be appreciated that specific embodiment described herein is only used to explain The present invention is not intended to limit the present invention.
On the one hand, an embodiment of the present invention provides a kind of preparation methods of heterojunction field effect transistor, including walk as follows Suddenly:
S01:Substrate is provided;
S02:AlGaN/GaN epitaxially deposited layers are prepared over the substrate;
S03:Source electrode and drain electrode is prepared on the AlGaN/GaN epitaxially deposited layers;
S04:Using magnetron sputtering method on the AlGaN/GaN epitaxially deposited layers depositing p-type oxide, p-type oxygen is made Compound grid.
The preparation method of heterojunction field effect transistor provided in an embodiment of the present invention, using magnetron sputtering method in AlGaN/ P-type oxide grid is made in depositing p-type oxide on GaN epitaxially deposited layers;The preparation method is simple for process, both can be to avoid p Type oxide is contaminated, and may be implemented to prepare the p-type oxide grid of higher concentration, and also ensures heterogeneous to GaN base The device power of the positive regulation ability of junction field effect transistor threshold voltage, the final heterojunction field effect transistor is shown It writes and improves.
Further, in above-mentioned steps S01:Substrate can be sapphire (Sapphire), and main component is aluminium oxide.
Further, in above-mentioned steps S03, before preparing source electrode and drain electrode, inductively coupled plasma is first passed through Body (ICP) system forms the etching depth of 120nm, to ensure the disappearance of Two-dimensional electron gas channel between device, completes device isolation. And the step of preparing source electrode and drain electrode, includes:Utilize magnetron sputtering method depositing Ti/Al/Ti/Au (50/200/40/40nm) After multiple layer metal completes the preparation of source electrode and drain electrode, the N at 850 DEG C23 minutes are annealed in environment to form Ohmic contact. If annealing temperature is less than 850 DEG C, then Ohmic contact cannot be formed very well, series resistance and contact resistance number can be made higher than 850 DEG C Value increases, and influences device performance;If annealing time is less than 3 minutes, source electrode and drain metal cannot fully with AlGaN extensions Layer reaction, cannot form Ohmic contact very well, and more than 3 minutes contact resistance numerical value can increase, and reducing influences device performance.Cause This, anneals in the temperature and time, and best source electrode and drain electrode can be obtained.
Further, in above-mentioned steps S04, the p-type oxide is selected from p-type copper oxide, p-type cuprous oxide, p-type oxygen Change any one in nickel and p-type magnesia.The embodiment of the present invention innovatively utilizes magnetron sputtering method at normal temperatures, by changing The p-type oxide film that change sputtering power can form high quality utilizes magnetron sputtering method as grid after a photoetching Depositing above-mentioned p-type oxide, grid is made in any one, to which realization prepares high-performance p-type oxide gate cap layer structure GaN heterojunction field effect transistor.Specifically, p-type oxide preferred p-type cuprous oxide (Cu2O).The preparation method, can be to prevent Only Cu2O is by for copper oxide (CuO) and Cu2O is contaminated.
The preparation process flow of the embodiment of the present invention can be by being splashed under conditions of a photoetching and room temperature using magnetic control Penetrate method depositing p-type Cu2The deposition of O grids and subsequent Ni/Au not only simplifies technological process and also prevents Cu in this way2It is prepared by O It pollutes and avoids in technique and prepare Cu under thermal oxidizing conditions2When O, the relatively low problem of hole concentration.
Further, the step of depositing the p-type oxide include:Using copper target as copper source, with the mixing of argon gas and oxygen Gas is sputter gas and reaction gas, carries out magnetron sputtering processing.Specifically, the volume ratio of the argon gas and the oxygen is 15:3-4.The reaction power of the magnetron sputtering processing is 10-100W;The reaction pressure of the magnetron sputtering processing is 0.2- 0.3Pa.The oxide for removing copper target surface further includes being deoxygenated to the copper target surface with argon gas before reactive sputtering The step of compound processing;Specifically, the step of deoxidation compound processing includes:With the sputtering power of 150-160W, lead to argon gas 10-12min。
On the other hand, the embodiment of the present invention additionally provides a kind of heterojunction field effect transistor, including AlGaN/GaN heterogeneous Epitaxial layer is provided with source electrode and drain electrode on the AlGaN/GaN epitaxially deposited layers;The AlGaN/GaN epitaxially deposited layers On be additionally provided with p-type oxide composition p-type oxide grid cap layer structure.
Heterojunction field effect transistor provided in an embodiment of the present invention is GaN base heterojunction field effect transistor, wherein setting It is equipped with the p-type oxide grid cap layer structure of p-type oxide composition;Compared with traditional schottky metal gate electrode, p-type oxidation The characteristics such as the regulatable hole concentration of object direct band-gap semicondictor material and energy gap more can effectively adjust GaN base hetero-junctions Band structure, and then regulate and control threshold voltage, to realize the GaN base hetero junction field effect of enhanced (threshold voltage is more than 0 volt) The power device of transistor;The heterojunction field effect transistor can reduce the device of unnecessary power attenuation and secondary circuit Number improves integrated level, to realizing that application of the GaN base heterojunction field effect transistor in power electronics conversion has important meaning Justice.
Specifically, above-mentioned p-type oxide is in p-type copper oxide, p-type cuprous oxide, p-type nickel oxide and p-type magnesia Any one.These p-type oxides can be used in preparing the p-type oxide grid cap layers knot in device of the embodiment of the present invention Structure.Further preferred p-type cuprous oxide.
The present invention successively carried out test of many times, and it is further detailed to invention progress as reference now to lift A partial experiment result Thin description, is described in detail with reference to specific embodiment.
Embodiment 1
A kind of heterojunction field effect transistor, including AlGaN/GaN epitaxially deposited layers, the AlGaN/GaN hetero-epitaxies It is provided with source electrode and drain electrode on layer;It is additionally provided with p-type Cu on the AlGaN/GaN epitaxially deposited layers2The p-type Cu of O compositions2O Grid cap layer structure.
The preparation method of the heterojunction field effect transistor includes the following steps:
One, Sapphire Substrate is deposited into one layer of AlGaN/GaN heteroepitaxial structure material first, by the AlGaN/ of deposition GaN heteroepitaxial structure materials are cleaned, and detailed process is as follows:
Use sulfuric acid:Hydrogen peroxide=4:1 mixed liquor boils several minutes at 100 DEG C, and then deionized water cleaning, acetone are super successively It is cleaned in sound cleaning, EtOH Sonicate cleaning deionized water beaker.
Two, following (all preparation process are with sapphire to the preparation detailed process of source electrode, drain electrode and grid in device P-type Cu is prepared based on AlGaN/GaN heteroepitaxial structure materials on substrate2The GaN heterojunction fields of O grid cap layer structures Effect transistor):
The etching depth for forming 120nm by inductively coupled plasma (ICP) system first, then passes through magnetron sputtering After method depositing Ti/Al/Ti/Au (50/200/40/40nm) multiple layer metal completes the preparation of source electrode and drain electrode, at 850 DEG C N23 minutes are annealed in environment to form Ohmic contact.Then use magnetron sputtering method by regulate and control argon gas and oxygen ratio and Reaction power depositing p-type Cu2After O grids (100nm), Ni/Au (70/30nm) is finally deposited by magnetron sputtering method on it again To form gate ohmic contact.
Above-mentioned p-type Cu2The preparation process of O grids is:The use of high-purity copper target (99.99%, analysis is pure) is copper source, with argon Gas is sputter gas and reaction gas with oxygen mixed gas, prepares p-type Cu2O grids;Wherein, depositing temperature is room temperature, argon gas With oxygen ratio=15:4, reaction power 10W, reaction pressure 0.2pa.In order to remove the oxide on copper target surface, anti- Before should sputtering, with the sputtering power of 150W, surface treatment 10 minutes is carried out to copper target by argon gas.
The product that the process conditions of the present embodiment obtain is to possess p-type Cu2The GaN heterojunction fields of O grid cap layer structures are imitated Answer transistor (i.e. Cu2O/HFET is indicated).
Before device performance is discussed, p-type in device is evaluated with atomic force microscope (AFM) and Hall test (Hall) Cu2The quality of O films:It is carried out to p-type Cu using atomic force microscope2The surface roughness of O films is characterized, with deposition The reduction of power, p-type Cu2Downward trend is presented in O roughness of film, and when deposition power is reduced to 10W, a standard Amorphous p-type Cu2O films are formed.It is found simultaneously according to Hall test, as shown in Figure 1, with the reduction of deposition power, Ascendant trend is presented in hole concentration, especially when deposition power is reduced to 10W, a highest hole concentration 1 × 1017cm-3It is obtained It arrives.Then according to the p-type Cu of this optimization2O membrance casting conditions (magnetron sputtering reaction power=10W) prepare p-type Cu2O grid caps The GaN heterojunction field effect transistor of layer structure, to study its electrology characteristic.
The excellent slightly property of device performance in order to compare the present embodiment, traditional GaN heterojunction field effect transistor is also produced. By grid leakage current characteristic test as a result, it has been found that, as shown in Figure 2:There is p-type Cu2The GaN heterojunction fields of O grid cap layer structures are imitated Transistor is answered, nearly two orders of magnitude smaller than the grid leakage current of traditional GaN heterojunction field effect transistor.Further through device Output characteristics find, have p-type Cu2The GaN heterojunction field effect transistor of O grid cap layer structures, than traditional GaN hetero-junctions The output current of field-effect transistor improves.We send out also by device transfer characteristic (logarithmic coordinates) simultaneously It is existing, as shown in Figure 2:There is p-type Cu2GaN heterojunction field effect transistor (the Cu in Fig. 2 of O grid cap layer structures2O/HFET), than passing The GaN heterojunction field effect transistor (HFET in Fig. 2) of system is closed other than threshold value has the forward migration of 0.55V in switch The raising and electron mobility for having two orders of magnitude in terms of ON/OFF characteristics improve again, and subthreshold value pendulum There has also been prodigious reductions for width (SS).
The foregoing is merely illustrative of the preferred embodiments of the present invention, is not intended to limit the invention, all essences in the present invention All any modification, equivalent and improvement etc., should all be included in the protection scope of the present invention made by within refreshing and principle.

Claims (10)

1. a kind of preparation method of heterojunction field effect transistor, which is characterized in that include the following steps:
Substrate is provided;
AlGaN/GaN epitaxially deposited layers are prepared over the substrate;
Source electrode and drain electrode is prepared on the AlGaN/GaN epitaxially deposited layers;
Using magnetron sputtering method on the AlGaN/GaN epitaxially deposited layers depositing p-type oxide, p-type oxide grid is made.
2. preparation method as described in claim 1, which is characterized in that the p-type oxide is selected from p-type copper oxide, p-type aoxidizes Any one in cuprous, p-type nickel oxide and p-type magnesia.
3. preparation method as described in claim 1, which is characterized in that the p-type oxide is p-type cuprous oxide, deposits institute The step of stating p-type oxide include:Using copper target as copper source, using the mixed gas of argon gas and oxygen as sputter gas and reaction gas Body carries out magnetron sputtering processing.
4. preparation method as claimed in claim 3, which is characterized in that the volume ratio of the argon gas and the oxygen is 15:3- 4。
5. preparation method as claimed in claim 3, which is characterized in that the reaction power of the magnetron sputtering processing is 10- 100W;And/or
The reaction pressure of the magnetron sputtering processing is 0.2-0.3Pa.
6. preparation method as claimed in claim 3, which is characterized in that further include using argon gas before the magnetron sputtering processing The step of deoxidation compound processing is carried out to the copper target surface.
7. preparation method as claimed in claim 6, which is characterized in that the step of deoxidation compound processing includes:With 150- The sputtering power of 160W leads to argon gas 10-12min.
8. such as claim 1-7 any one of them preparation methods, which is characterized in that the substrate is sapphire.
9. a kind of heterojunction field effect transistor, including AlGaN/GaN epitaxially deposited layers, the AlGaN/GaN epitaxially deposited layers On be provided with source electrode and drain electrode;It is characterized in that, being additionally provided with p-type oxide on the AlGaN/GaN epitaxially deposited layers The p-type oxide grid cap layer structure of composition.
10. heterojunction field effect transistor as claimed in claim 9, which is characterized in that the p-type oxide is selected from p-type oxygen Change any one in copper, p-type cuprous oxide, p-type nickel oxide and p-type magnesia.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110783450A (en) * 2019-10-22 2020-02-11 深圳第三代半导体研究院 Magnetic field sensor based on gallium nitride/aluminum gallium nitrogen heterojunction

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TWI409951B (en) * 2010-10-20 2013-09-21 Nat Univ Tsing Hua Enhancement mode gan-based mosfet
CN106298887A (en) * 2016-09-30 2017-01-04 中山大学 A kind of preparation method of high threshold voltage high mobility notched gates MOSFET

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TWI409951B (en) * 2010-10-20 2013-09-21 Nat Univ Tsing Hua Enhancement mode gan-based mosfet
CN102543723A (en) * 2012-01-05 2012-07-04 复旦大学 Method for manufacturing grid controlled diode semiconductor device
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110783450A (en) * 2019-10-22 2020-02-11 深圳第三代半导体研究院 Magnetic field sensor based on gallium nitride/aluminum gallium nitrogen heterojunction

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