CN108766348B - Driving circuit, driving method and two-dimensional/three-dimensional switchable display device - Google Patents

Driving circuit, driving method and two-dimensional/three-dimensional switchable display device Download PDF

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Publication number
CN108766348B
CN108766348B CN201810972461.3A CN201810972461A CN108766348B CN 108766348 B CN108766348 B CN 108766348B CN 201810972461 A CN201810972461 A CN 201810972461A CN 108766348 B CN108766348 B CN 108766348B
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circuit
electrically connected
voltage
switching tube
switching
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CN108766348A (en
Inventor
王海银
石晶晶
赵振理
张超
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Zhangjiagang Kangdexin Optronics Material Co Ltd
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Zhangjiagang Kangdexin Optronics Material Co Ltd
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B30/00—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images
    • G02B30/20—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes
    • G02B30/26—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type
    • G02B30/27—Optical systems or apparatus for producing three-dimensional [3D] effects, e.g. stereoscopic images by providing first and second parallax images to an observer's left and right eyes of the autostereoscopic type involving lenticular arrays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the invention discloses a driving circuit, a driving method and two-dimensional/three-dimensional switchable display equipment. Wherein, this drive circuit includes: the control circuit is used for controlling the output logic signals according to the received display mode switching instruction, wherein the display modes comprise a three-dimensional display mode and a two-dimensional display mode; the first enabling end of the driving voltage generating circuit is electrically connected with the logic signal output end of the control circuit, and the voltage output end of the driving voltage generating circuit is electrically connected with the driving electrode of the display device and is used for controlling whether the driving voltage is output or not according to the logic signal; and the second enabling end of the switching circuit is electrically connected with the logic signal output end of the control circuit, the first end of the switching circuit is electrically connected with the driving electrode, and the second end of the switching circuit is grounded and used for controlling the conduction of the first end and the second end according to the logic signal. The technical scheme of the embodiment of the invention can realize that the two-dimensional/three-dimensional switchable display equipment is rapidly switched from the three-dimensional display mode to the two-dimensional display mode.

Description

Driving circuit, driving method and two-dimensional/three-dimensional switchable display device
Technical Field
The present invention relates to the field of display technologies, and in particular, to a driving circuit, a driving method, and a two-dimensional/three-dimensional switchable display device.
Background
The naked eye three-dimensional display equipment can obtain stereoscopic vision by naked eyes without wearing auxiliary glasses. At present, a main mode of realizing a naked eye three-dimensional display technology is to divide a pixel unit of a display panel into odd-numbered columns of pixels and even-numbered columns of pixels in a horizontal direction by arranging a grating and the like in front of the display panel, so that two different images are respectively provided for left and right eyes of a viewer, a depth of field is formed by utilizing parallax effects of left and right eye images of the viewer, and a three-dimensional display effect is further generated.
Currently, switching of the two-dimensional/three-dimensional display mode can be achieved by providing a two-dimensional/three-dimensional switchable structure on the display surface side of the display panel, which may be a liquid crystal lens, a liquid crystal grating, or the like. The two-dimensional/three-dimensional display mode is switched by controlling the working state of the two-dimensional/three-dimensional switchable structure. For example, by applying a driving voltage to electrodes in a two-dimensional/three-dimensional switchable structure, three-dimensional display is realized; the two-dimensional display is realized by switching off the supply voltage in the two-dimensional/three-dimensional switchable structure.
However, when the naked eye three-dimensional display device is switched from the three-dimensional display mode to the two-dimensional display mode, the problem of switching delay exists, normal watching of a viewer is affected, and user watching experience is poor.
Disclosure of Invention
The embodiment of the invention provides a driving circuit, a driving method and two-dimensional/three-dimensional switchable display equipment, which are used for realizing the rapid switching of the two-dimensional/three-dimensional switchable display equipment from a three-dimensional display mode to a two-dimensional display mode.
In a first aspect, an embodiment of the present invention provides a driving circuit, including:
the control circuit comprises an instruction input end and a logic signal output end, and is used for controlling the output logic signal according to the received display mode switching instruction, wherein the display mode comprises a three-dimensional display mode and a two-dimensional display mode;
the driving voltage generation circuit comprises a first enabling end and a voltage output end, the first enabling end is electrically connected with the logic signal output end of the control circuit, the voltage output end is electrically connected with the driving electrode of the display device, and the driving voltage generation circuit is used for controlling whether the driving voltage is output or not according to the logic signal;
the switching circuit comprises a second enabling end, a first end and a second end, wherein the second enabling end of the switching circuit is electrically connected with the logic signal output end of the control circuit, the first end of the switching circuit is electrically connected with the driving electrode, the second end of the switching circuit is grounded, and the switching circuit is used for controlling whether the first end and the second end are conducted or not according to logic signals.
Further, the logic signal includes a first signal and a second signal that are logically opposite;
the control circuit is used for outputting a first signal if the received display mode switching instruction is from a two-dimensional display mode to a three-dimensional display mode, and outputting a second signal if the received display mode switching instruction is from the three-dimensional display mode to the two-dimensional display mode;
the driving voltage generating circuit is used for outputting driving voltage if the first signal is received, otherwise, stopping outputting the driving voltage;
the switch circuit is used for controlling the first end and the second end to be conducted if the second signal is received, otherwise, controlling the first end and the second end to be turned off.
Further, the driving voltage is a square wave with a preset frequency, and the absolute values of the first high voltage and the first low voltage of the square wave are equal and opposite in polarity.
Further, the driving voltage generating circuit comprises a first voltage source, a booster circuit, a charge pump circuit, a clock circuit and a voltage amplifying circuit,
the output end of the first voltage source is electrically connected with the input end of the booster circuit, the third enabling end of the booster circuit is electrically connected with the first enabling end of the driving voltage generating circuit, and the booster circuit is used for controlling whether the first high voltage is output or not according to logic signals;
The input end of the charge pump circuit is electrically connected with the boost circuit, and the charge pump circuit is used for controlling whether the first low voltage is output or not;
the fourth enabling end of the clock circuit is electrically connected with the first enabling end of the driving voltage generating circuit, and the clock circuit is used for controlling whether the pulse signal with the preset frequency is output or not according to the logic signal;
the first power supply end of the voltage amplifying circuit is electrically connected with the output end of the voltage boosting circuit, the second power supply end of the voltage amplifying circuit is electrically connected with the output end of the charge pump circuit, the signal input end of the voltage amplifying circuit is electrically connected with the output end of the clock circuit, and the output end of the voltage amplifying circuit is electrically connected with the voltage output end of the driving voltage generating circuit.
Further, the switching circuit comprises a first switching tube, a first resistor and a second switching tube,
the control end of the first switching tube is electrically connected with the second enabling end of the switching circuit, the first end of the first switching tube is electrically connected with the first voltage source, the second end of the first switching tube and the control end of the second switching tube are electrically connected with the first end of the first resistor;
the second end of the first resistor is electrically connected with the output end of the charge pump circuit;
the first end of the second switching tube is electrically connected with the first end of the switching circuit, and the second end of the second switching tube is electrically connected with the second end of the switching circuit.
Further, the booster circuit includes: a first inductor, a third switching tube, a first diode, a first capacitor and a feedback regulating circuit,
wherein the first end of the first inductor is electrically connected with the input end of the boost circuit, the second end of the first inductor and the first end of the third switch tube are electrically connected with the anode of the first diode, the cathode of the first diode and the first end of the first capacitor are electrically connected with the output end of the boost circuit, the second end of the third switch tube and the second end of the first capacitor are grounded,
the input end of the feedback regulating circuit is electrically connected with the output end of the boost circuit, the output end of the feedback regulating circuit is electrically connected with the control end of the third switching tube, the fifth enabling end of the feedback regulating circuit is electrically connected with the third enabling end of the boost circuit, and the feedback regulating circuit is used for controlling the duty ratio of the control signal output to the control end of the third switching tube according to the logic signal.
Further, the charge pump circuit comprises a second capacitor, a second diode, a third diode and a third capacitor,
the first end of the second capacitor, the input end of the charge pump circuit are electrically connected with the first end of the third switch tube, the second end of the second capacitor, the anode of the second diode are electrically connected with the cathode of the third diode, the cathode of the second diode is grounded, the anode of the third diode, the first end of the third capacitor are electrically connected with the output end of the charge pump circuit, and the second end of the third capacitor is grounded.
Further, the voltage amplifying circuit includes: a fourth switching tube, a fifth switching tube, a sixth switching tube, a seventh switching tube, a second resistor, a third resistor, a fourth resistor and a fifth resistor,
the control end of the fourth switching tube is electrically connected with the signal input end of the voltage amplifying circuit, the first end of the fourth switching tube is electrically connected with the first power supply end of the voltage amplifying circuit through the second resistor, and the second end of the fourth switching tube is grounded;
the control end of the fifth switching tube is electrically connected with the first end of the fourth switching tube, the first end of the fifth switching tube is electrically connected with the first power supply end of the voltage amplifying circuit, and the second end of the fifth switching tube is electrically connected with the output end of the voltage amplifying circuit;
the first end of the third resistor is electrically connected with the first power supply end of the voltage amplifying circuit, and the second end of the third resistor is grounded through the fourth resistor;
the control end of the sixth switching tube is electrically connected with the signal input end of the voltage amplifying circuit, the first end of the sixth switching tube is electrically connected with the second end of the third resistor, and the second end of the sixth switching tube is electrically connected with the second power supply end of the voltage amplifying circuit through the fifth resistor;
the control end of the seventh switching tube is electrically connected with the second end of the sixth switching tube, the first end of the seventh switching tube is electrically connected with the second power supply end of the voltage amplifying circuit, and the second end of the seventh switching tube is electrically connected with the output end of the voltage amplifying circuit.
Further, the driving circuit further comprises a voltage stabilizing circuit, the first end of the voltage stabilizing circuit is electrically connected with the voltage output end of the driving voltage generating circuit, and the second end of the voltage stabilizing circuit is grounded.
In a second aspect, an embodiment of the present invention further provides a two-dimensional/three-dimensional switchable display device, including: a display panel, a switching structure positioned at one side of a display surface of the display panel, and a driving circuit provided by any embodiment of the invention,
wherein, the switching structure includes: a first substrate and a second substrate arranged opposite to each other, an electro-optic material molecular layer between the first substrate and the second substrate, and the driving electrode is positioned on one side of the first substrate facing the electro-optic material molecular layer, and the common electrode is positioned on one side of the second substrate facing the electro-optic material molecular layer, wherein the common electrode is grounded.
Further, the switching structure further comprises a lenticular lens layer, the lenticular lens layer is located between the first substrate and the second substrate, the electro-optic material molecular layer and the lenticular lens layer are arranged along the direction perpendicular to the first substrate, and the driving electrode and the common electrode are all whole-surface electrodes.
In a third aspect, an embodiment of the present invention further provides a driving method of a driving circuit according to any embodiment of the present invention, where a logic signal includes a first signal and a second signal that are logically opposite, and the driving method includes:
The control circuit outputs a first signal if the received display mode switching instruction is that the two-dimensional display mode is switched to the three-dimensional display mode; the control circuit outputs a second signal if the received display mode switching instruction is that the three-dimensional display mode is switched to the two-dimensional display mode;
the driving voltage generating circuit outputs driving voltage if receiving the first signal, otherwise, stops outputting the driving voltage;
and if the switching circuit receives the second signal, the first end and the second end are controlled to be conducted, otherwise, the first end and the second end are controlled to be turned off.
According to the technical scheme, the first enabling end of the driving voltage generating circuit is electrically connected with the logic signal output end of the control circuit, the voltage output end of the driving voltage generating circuit is electrically connected with the driving electrode of the display device, the second enabling end of the switching circuit is electrically connected with the logic signal output end of the control circuit, the first end of the switching circuit is electrically connected with the driving electrode, the second end of the switching circuit is grounded, so that the control circuit receives a switching instruction for switching the three-dimensional display mode to the two-dimensional display mode, a corresponding logic signal is output, the first enabling end of the driving voltage generating circuit is enabled, the driving voltage is stopped, the second enabling end of the switching circuit is enabled, the first end and the second end are controlled to be conducted, and electric charges on the driving electrode are enabled to be discharged rapidly, so that the problem that when the two-dimensional/three-dimensional switchable display device is switched to the two-dimensional display mode from the three-dimensional display mode, the two-dimensional display mode can only be discharged through the switching structure, and the problem of switching delay exists is solved.
Drawings
Fig. 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention;
fig. 2 is a schematic cross-sectional structure of a two-dimensional/three-dimensional switchable display device according to an embodiment of the present invention;
FIG. 3 is a waveform diagram of a driving voltage according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention;
FIG. 5 is a waveform diagram of an input voltage and an output voltage of a voltage amplifying circuit according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention;
fig. 7 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention;
fig. 8 is a schematic diagram of a voltage amplifying circuit according to an embodiment of the present invention;
fig. 9 is a schematic diagram of a structure of a voltage amplifying circuit according to another embodiment of the present invention;
FIG. 10 is a schematic cross-sectional view of another two-dimensional/three-dimensional switchable display device according to an embodiment of the present invention;
fig. 11 is a flowchart of a driving method according to an embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
The embodiment of the invention provides a driving circuit. Fig. 1 is a schematic structural diagram of a driving circuit according to an embodiment of the present invention. Fig. 2 is a schematic cross-sectional structure of a two-dimensional/three-dimensional switchable display device according to an embodiment of the present invention. The driving circuit 100 is used for driving electrodes in a switching structure 200 of a two-dimensional/three-dimensional switchable display device. The driving circuit may be used to perform the driving method provided by any of the embodiments of the present invention. The driving circuit 100 includes: a control circuit 110, a driving voltage generating circuit 120, and a switching circuit 130.
The control circuit 110 includes an instruction input end In1 and a logic signal output end Out1, and the control circuit 110 is configured to control an output logic signal according to a received display mode switching instruction, where the display modes include a three-dimensional display mode and a two-dimensional display mode; the driving voltage generating circuit 120 includes a first enable terminal En1 and a voltage output terminal Vo1, the first enable terminal En1 is electrically connected to a logic signal output terminal Out1 of the control circuit 110, the voltage output terminal Vo1 is electrically connected to a driving electrode 211 of the display device, and the driving voltage generating circuit 120 is configured to control whether the driving voltage is output or not according to the logic signal; the switch circuit 130 includes a second enable end En2, a first end N1, and a second end N2, the second enable end En2 of the switch circuit 130 is electrically connected to the logic signal output end Out1 of the control circuit 110, the first end N1 of the switch circuit 130 is electrically connected to the driving electrode, the second end N2 of the switch circuit 130 is grounded, and the switch circuit 130 is configured to control whether the first end N1 and the second end N1 are turned on or not according to the logic signal.
The display mode switching instruction may include a switching instruction to switch from the two-dimensional display mode to the three-dimensional display mode and a switching instruction to switch from the three-dimensional display mode to the two-dimensional display mode. The logic signals may include a high level signal and a low level signal. The switching circuit 130 may include a switching tube or a relay. The switching structure 200 includes: the first substrate 210 and the second substrate 220 are disposed opposite to each other, the electro-optic material molecular layer 230 is disposed between the first substrate 210 and the second substrate 220, the driving electrode 211 is disposed at a side of the first substrate 210 facing the electro-optic material molecular layer 230, and the common electrode 221 is disposed at a side of the second substrate 220 facing the electro-optic material molecular layer, wherein the common electrode 221 is grounded (not shown). The molecular layer 230 of electro-optic material may be a liquid crystal layer. The switching structure 200 may be a liquid crystal grating or a liquid crystal lens. Whether a driving voltage is applied to the driving electrode determines whether the switching structure works, and further determines the display mode of the two-dimensional/three-dimensional switchable display device. For example, a three-dimensional display may be realized by applying a driving voltage to a driving electrode in a switching structure; the driving circuit of the embodiment can realize the rapid switching of the two-dimensional/three-dimensional switchable display device from the three-dimensional display mode to the two-dimensional display mode by stopping the application of the driving voltage to the driving electrode in the switching structure to realize the two-dimensional display. For example, a two-dimensional display may be realized by applying a driving voltage to a driving electrode in a switching structure; by stopping the application of the driving voltage to the driving electrode in the switching structure to realize three-dimensional display, the driving circuit of the embodiment can realize rapid switching of the two-dimensional/three-dimensional switchable display device from the two-dimensional display mode to the three-dimensional display mode. The following will work in the following way: applying a driving voltage to a driving electrode in the switching structure to realize three-dimensional display; by stopping the application of the driving voltage to the driving electrode in the switching structure, two-dimensional display is realized, which is exemplified.
It should be noted that, when the control circuit 110 receives a switching instruction for switching from the two-dimensional display mode to the three-dimensional display mode, a corresponding logic signal, for example, a low-level signal, is output, so that the first enable terminal En1 of the driving voltage generating circuit 120 is enabled, that is, the enable signal of the first enable terminal En1 is a low-level signal, so as to output a driving voltage, so that the second enable terminal En2 of the switching circuit 130 is not enabled, and further, the first terminal N1 and the second terminal N2 are controlled to be turned off, so that the driving electrode is driven, and the switching structure works normally, thereby realizing that the two-dimensional/three-dimensional switchable display device is in the three-dimensional display mode. The control circuit 110 receives a switching instruction for switching from the three-dimensional display mode to the two-dimensional display mode, and outputs a corresponding logic signal, for example, a high-level signal, so that the first enable end En1 of the driving voltage generating circuit 120 is not enabled, and further, the driving voltage is stopped from being output, the second enable end En2 of the switching circuit 130 is enabled, that is, the enable signal of the second enable end En2 is a high-level signal, and further, the first end N1 and the second end N2 are controlled to be conducted, so that the electric charge on the driving electrode is quickly released to the ground, and the problem of switching delay when the two-dimensional/three-dimensional switchable display device is switched from the three-dimensional display mode to the two-dimensional display mode is solved, and the two-dimensional/three-dimensional switchable display device is quickly switched from the three-dimensional display mode to the two-dimensional display mode is realized.
According to the technical scheme, the first enabling end of the driving voltage generating circuit is electrically connected with the logic signal output end of the control circuit, the voltage output end of the driving voltage generating circuit is electrically connected with the driving electrode of the display device, the second enabling end of the switching circuit is electrically connected with the logic signal output end of the control circuit, the first end of the switching circuit is electrically connected with the driving electrode, the second end of the switching circuit is grounded, so that the control circuit receives a switching instruction for switching the three-dimensional display mode to the two-dimensional display mode, a corresponding logic signal is output, the first enabling end of the driving voltage generating circuit is enabled, the driving voltage is stopped, the second enabling end of the switching circuit is enabled, the first end and the second end are controlled to be conducted, and electric charges on the driving electrode are enabled to be discharged rapidly, so that the problem that when the two-dimensional/three-dimensional switchable display device is switched to the two-dimensional display mode from the three-dimensional display mode, the two-dimensional display mode can only be discharged through the switching structure, and the problem of switching delay exists is solved.
Alternatively, the enable signal of the first enable terminal En1 is opposite to the logic of the enable signal of the second enable terminal En 2. Optionally, on the basis of the above embodiment, the logic signal includes a first signal and a second signal that are logically opposite; the control circuit 110 is configured to output a first signal if the received display mode switching instruction is to switch from the two-dimensional display mode to the three-dimensional display mode, and output a second signal if the received display mode switching instruction is to switch from the three-dimensional display mode to the two-dimensional display mode; the driving voltage generating circuit 120 is configured to output a driving voltage if the first signal is received, i.e. the enable signal of the first enable end En1 is the first signal, otherwise, stop outputting the driving voltage; the switch circuit 130 is configured to control the first terminal N1 and the second terminal N2 to be turned on if the second signal is received, i.e. the enable signal of the second enable terminal En2 is the second signal, otherwise, control the first terminal N1 and the second terminal N2 to be turned off.
Optionally, on the basis of the foregoing embodiment, fig. 3 is a waveform diagram of a driving voltage provided by the embodiment of the present invention, where the driving voltage is a square wave with a preset frequency, and absolute values of a first high voltage and a first low voltage of the square wave are equal and opposite in polarity, so that the liquid crystal molecules are prevented from being always kept in the same direction due to the action of the driving voltage with the same polarity for a long time, and the permanent damage of physical properties is caused. As shown in fig. 3, the horizontal axis represents time t, and the vertical axis represents driving voltage vo. The preset frequency is an integer multiple of a frame display period (i.e., a time required to display one frame of image) of the display panel.
The embodiment of the invention provides a driving circuit. Fig. 4 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention. On the basis of the above-described embodiment, the driving voltage generating circuit 120 includes the first voltage source 121, the booster circuit 122, the charge pump circuit 123, the clock circuit 124, and the voltage amplifying circuit 125.
The output terminal Out2 of the first voltage source 121 is electrically connected to the input terminal In2 of the boost circuit 122, the third enable terminal En3 of the boost circuit 122 is electrically connected to the first enable terminal En1 of the driving voltage generating circuit 120, and the boost circuit 122 is configured to control whether the first high voltage is output or not according to the logic signal; the input terminal In3 of the charge pump circuit 123 is electrically connected to the boost circuit 122, and the charge pump circuit 123 is used for controlling whether the first low voltage is output or not; the fourth enable end En4 of the clock circuit 124 is electrically connected to the first enable end En1 of the driving voltage generating circuit 120, and the clock circuit 124 is configured to control whether the pulse signal with the preset frequency is output or not according to the logic signal; the first power supply terminal v+ of the voltage amplifying circuit 125 is electrically connected to the output terminal Out3 of the voltage boosting circuit 122, the second power supply terminal V-of the voltage amplifying circuit 125 is electrically connected to the output terminal Out4 of the charge pump circuit 123, the signal input terminal S1 of the voltage amplifying circuit 125 is electrically connected to the output terminal Out5 of the clock circuit 124, and the output terminal Out6 of the voltage amplifying circuit 125 is electrically connected to the voltage output terminal Vo1 of the driving voltage generating circuit 120.
The logic of the enable signals of the first enable terminal En1, the third enable terminal En3, and the fourth enable terminal En4 may be the same. If the third enable end En3 of the voltage boost circuit 122 is enabled, the voltage boost circuit 122 boosts the input voltage, and the output end Out3 outputs the first high voltage, so that the charge pump circuit 123 outputs the first low voltage, otherwise, the output end Out3 of the voltage boost circuit 122 cannot output the first high voltage, so that the charge pump circuit 123 does not output the first low voltage. If the fourth enable end En4 of the clock circuit 124 is enabled, the output end Out5 of the clock circuit 124 outputs a pulse signal with a preset frequency, otherwise, the pulse signal with the preset frequency cannot be output. The charge pump circuit 123 may include a plurality of capacitors and a plurality of switches, and may be configured such that a switching network formed by the plurality of switches provides power to two or more capacitors or provides power to the capacitors for DC/DC voltage conversion. Alternatively, the input terminal of the charge pump circuit 123 may be electrically connected to the output terminal Out3 of the booster circuit 122. The voltage amplifying circuit 125 is configured to convert the second high voltage of the pulse signal output by the output terminal Out5 of the clock circuit 124 into a first high voltage output, and convert the second low voltage of the pulse signal output by the output terminal Out5 of the clock circuit 124 into a first low voltage output. Fig. 5 is a waveform diagram of an input voltage and an output voltage of a voltage amplifying circuit according to an embodiment of the present invention, wherein a horizontal axis represents time t and a vertical axis represents an input voltage v1 and an output voltage v2.
The embodiment of the invention provides a driving circuit. On the basis of the above embodiment, with continued reference to fig. 4, the switching circuit 130 includes a first switching tube T1, a first resistor R1, and a second switching tube T2.
The control end Ctr1 of the first switching tube T1 is electrically connected to the second enabling end En2 of the switching circuit 130, the first end N3 of the first switching tube T1 is electrically connected to the first voltage source 121, the second end N4 of the first switching tube T1, and the control end Ctr2 of the second switching tube T2 are electrically connected to the first end of the first resistor R1; the second end of the first resistor R1 is electrically connected to the output Out4 of the charge pump circuit 123; the first terminal N5 of the second switching tube T2 is electrically connected to the first terminal N1 of the switching circuit 130, and the second terminal N6 of the second switching tube T2 is electrically connected to the second terminal N2 of the switching circuit 130.
The first switching transistor T1 may be a triode or a MOS transistor. The control terminal Ctr1 of the first switching tube T1 is input with a high level signal or a low level signal to control the on or off of the first switching tube T1. The second switching transistor T2 may be a triode or a MOS transistor. The control terminal Ctr2 of the second switching tube T2 is input with a high level signal or a low level signal to control the on or off of the second switching tube T2.
Optionally, the enable signal of the second enable end En2 of the switch circuit 130 may be a low level signal, the first switch tube T1 is a PNP triode, the second switch tube T2 is an NPN triode, if the second enable end En2 of the switch circuit 130 receives a high level signal (i.e. is not enabled), the first switch tube T1 will be turned off, the control end Ctr2 of the second switch tube T2 will input a low level signal (i.e. the first low voltage output by the charge pump circuit 123), and the second switch tube T2 will be turned off, so that the driving voltage output by the driving voltage generating circuit 120 is not affected; if the second enable end En2 of the switch circuit 130 receives the low level signal (i.e. is enabled), the first switch T1 will be turned on, the control end Ctr2 of the second switch T2 will input the high level signal (i.e. the output voltage of the first voltage source 121), and the second switch T2 will be turned on, so as to drain the charge on the driving electrode to the ground rapidly.
It should be noted that, electrical nodes with the same label are electrically connected, for example, J1 and J2, for example, terminals with the label J1 are electrically connected, and electrical nodes with the label J2 are electrically connected.
The embodiment of the invention provides a driving circuit. Fig. 6 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention. On the basis of the above embodiment, the booster circuit 122 includes: the first inductor L1, the third switching tube T3, the first diode D1, the first capacitor C1 and the feedback regulating circuit 126.
The first end of the first inductor L1 is electrically connected to the input end In2 of the boost circuit 122, the second end of the first inductor L1, and the first end N7 of the third switching tube T3 are electrically connected to the anode of the first diode D1, the cathode of the first diode D1, and the first end of the first capacitor C1 are electrically connected to the output end Out3 of the boost circuit 122, the second end N8 of the third switching tube T3, and the second end of the first capacitor C1 are grounded, the input end In4 of the feedback regulating circuit 126 is electrically connected to the output end Out3 of the boost circuit 122, the output end Out7 of the feedback regulating circuit 126 is electrically connected to the control end Ctr3 of the third switching tube T3, the fifth enable end En5 of the feedback regulating circuit 126 is electrically connected to the third enable end En3 of the boost circuit 122, and the feedback regulating circuit 126 is used for controlling the duty ratio of the control signal output to the control end Ctr3 of the third switching tube T3 according to the logic signal.
The third switching tube T3 may be a triode or a MOS tube. The control terminal Ctr3 of the third switching tube T3 is input with a high level signal or a low level signal to control the on or off of the third switching tube T3. The fifth enable end En5 of the feedback regulator circuit 126 is the same logic as the enable signal of the third enable end En3 of the boost circuit 122. The enable signal of the third enable end En3 of the boost circuit 122 may be a high level signal, and if the third enable end En3 of the boost circuit 122 receives the high level signal (i.e. is enabled), the feedback regulator 126 controls the duty ratio of the control signal output to the control end Ctr3 of the third switching tube T3, so that the output end Out3 of the boost circuit 122 outputs the first high voltage; if the third enable end En3 of the boost circuit 122 receives the low level signal (i.e. not enabled), the feedback adjustment circuit 126 outputs a control signal to the control end Ctr3 of the third switching tube T3, for example, the duty ratio of the control signal may be 0, so that the output end Out3 of the boost circuit 122 does not output the first high voltage, for example, the output voltage may be equal to the voltage of the first voltage source.
Optionally, based on the above embodiment, fig. 7 is a schematic structural diagram of a driving circuit according to another embodiment of the present invention, and a part of a circuit of the feedback adjusting circuit 126 and the third switching tube T3 may be integrated into a control chip 127, for example, the model of the control chip 127 may be LN2119. The boost circuit 122 further includes a voltage detection circuit for detecting an output voltage of the boost circuit 122, where the voltage detection circuit includes a seventh resistor R7 and an eighth resistor R8, a first end of the seventh resistor R7 is electrically connected to the cathode of the second diode D1, a second end of the seventh resistor R7, and a first end of the eighth resistor R8 are all electrically connected to the feedback terminal FB of the control chip 127, and a second end of the eighth resistor R8 is grounded. The boost circuit 122 further includes a fifteenth resistor R15 and a sixteenth resistor 16, where a first end of the fifteenth resistor R15 is electrically connected to the output terminal Out2 of the first voltage source, a second end of the fifteenth resistor R15, and a first end of the sixteenth resistor R16 are both electrically connected to the third enable terminal En3 of the boost circuit 122, and a second end of the sixteenth resistor R16 is electrically connected to the enable terminal/SHDN of the control chip 127.
Alternatively, with continued reference to FIG. 7 based on the above embodiments, the clock circuit 124 may include a clock chip 128, model MIC1557, and its peripheral circuitry. The peripheral circuit includes a ninth resistor R9 and a fourth capacitor C4, wherein the frequency of the clock signal output by the clock circuit 124 can be changed by adjusting the resistance value of the ninth resistor R9 and the capacitance value of the fourth capacitor C4. The peripheral circuit further includes a seventeenth resistor R17 and an eighteenth resistor 18, wherein a first end of the seventeenth resistor R17 is electrically connected to the output terminal Out2 of the first voltage source, a second end of the seventeenth resistor R17, and a first end of the eighteenth resistor R18 are each electrically connected to the fourth enable terminal En4 of the clock circuit 124, and a second end of the eighteenth resistor R18 is electrically connected to the enable terminal CS of the clock chip 128.
The embodiment of the invention provides a driving circuit. With continued reference to fig. 6, the charge pump circuit 23 includes the second capacitor C2, the second diode D2, the third diode D3, and the third capacitor C3, based on the above-described embodiment.
The first end N21 of the second capacitor C2 and the input end In3 of the charge pump circuit 123 are electrically connected to the first end N7 of the third switch tube T3, the second end N22 of the second capacitor C2 and the anode of the second diode D2 are electrically connected to the cathode of the third diode D3, the cathode of the second diode D2 is grounded, the anode of the third diode D3 and the first end of the third capacitor C3 are electrically connected to the output end Out4 of the charge pump circuit 123, and the second end of the third capacitor C3 is grounded.
If the third enable end En3 of the boost circuit 122 is enabled, the duty ratio of the control signal of the third switch tube T3 is not zero, when the third switch tube T3 is turned off, the first diode D1 is turned on, the potential of the first end N21 of the second capacitor C2 approaches the first high voltage, so that the second diode D2 is turned on, the third diode D3 is turned off, the first inductor L1 charges the second capacitor C2 until the voltage between the first end N21 and the second end N22 of the second capacitor C2 gradually increases to approach the first high voltage; when the third switch tube T3 is turned from off to on, the first diode D1 is turned off, the first end N21 of the second capacitor C2 is grounded, the voltage between the first end N21 and the second end N22 of the second capacitor C2 is close to the first high voltage, the second end N22 of the second capacitor C2 is close to the first low voltage, so that the second diode D2 is turned off, the third diode D3 is turned on, the second capacitor C2 charges the third capacitor C3, and the first low voltage is further output to the output end Out4 of the charge pump circuit 123. The second capacitor C2 serves to transfer energy. The third capacitor C3 plays a role of energy storage, after the charge pump circuit 123 works stably, the third switch tube T3 is turned off, the second diode D2 is turned on, and when the third diode D3 is turned off, the third capacitor C3 outputs the stored electric energy to the output terminal Out4 of the charge pump circuit 123. If the third enable end En3 of the boost circuit 122 is not enabled, the duty ratio of the control signal of the third switch tube T3 is zero, that is, when the third switch tube T3 is kept turned off, the first diode D1 is turned on, the potential of the first end N21 of the second capacitor C2 approaches the output voltage of the first voltage source 121, so that the second diode D2 is always turned on, the third diode D3 is always turned off, and the voltage of the output end Out4 of the charge pump circuit 123 is zero.
Optionally, with continued reference to fig. 7 based on the above embodiment, the charge pump circuit 123 further includes a sixth resistor R6, where the sixth resistor R6 is connected in parallel with the third capacitor C3.
Optionally, with continued reference to fig. 7, the switching circuit 130 further includes a tenth resistor R10, where a first end of the tenth resistor R10 is electrically connected to the second end of the first switching tube T1, a second end of the tenth resistor R10, and a first end of the first resistor R1 are electrically connected to the control end Ctr2 of the second switching tube T2.
The embodiment of the invention provides a driving circuit. Fig. 8 is a schematic diagram of a voltage amplifying circuit according to an embodiment of the present invention. On the basis of the above-described embodiment, the voltage amplifying circuit 125 includes: fourth switching tube T4, fifth switching tube T5, sixth switching tube T6, seventh switching tube T7, second resistance R2, third resistance R3, fourth resistance R4 and fifth resistance R5.
The control end Ctr4 of the fourth switching tube T4 is electrically connected to the signal input end S1 of the voltage amplifying circuit 125, the first end N9 of the fourth switching tube T4 is electrically connected to the first power supply end v+ of the voltage amplifying circuit 125 via the second resistor R2, and the second end N10 of the fourth switching tube T4 is grounded; the control end Ctr5 of the fifth switching tube T5 is electrically connected to the first end N9 of the fourth switching tube T4, the first end N11 of the fifth switching tube T5 is electrically connected to the first power supply end v+ of the voltage amplifying circuit 125, and the second end N12 of the fifth switching tube T5 is electrically connected to the output end Out6 of the voltage amplifying circuit 125; the first end of the third resistor R3 is electrically connected to the first power supply end v+ of the voltage amplifying circuit 125, and the second end of the third resistor R3 is grounded through the fourth resistor R4; the control end Ctr6 of the sixth switching tube T6 is electrically connected to the signal input end S1 of the voltage amplifying circuit 125, the first end N13 of the sixth switching tube T6 is electrically connected to the second end of the third resistor R3, and the second end N14 of the sixth switching tube T6 is electrically connected to the second power supply end V-of the voltage amplifying circuit 125 via the fifth resistor R5; the control end Ctr7 of the seventh switching tube T7 is electrically connected to the second end N14 of the sixth switching tube T6, the first end N15 of the seventh switching tube T7 is electrically connected to the second power supply end V-of the voltage amplifying circuit 125, and the second end N16 of the seventh switching tube T7 is electrically connected to the output end Out6 of the voltage amplifying circuit 125.
The fourth switching tube T4 may be a triode or a MOS tube. The control end Ctr4 of the fourth switching tube T4 is input with a high level signal or a low level signal to control the on or off of the fourth switching tube T4. The fifth switching transistor T5 may be a triode or a MOS transistor. The control terminal Ctr5 of the fifth switching tube T5 is input with a high level signal or a low level signal to control the on or off of the fifth switching tube T5. The sixth switching transistor T6 may be a triode or a MOS transistor. The control terminal Ctr6 of the sixth switching tube T6 is input with a high level signal or a low level signal to control the on or off of the sixth switching tube T6. The seventh switch transistor T7 may be a triode or a MOS transistor. The control terminal Ctr7 of the seventh switching tube T7 is input with a high level signal or a low level signal to control the on or off of the seventh switching tube T7.
Optionally, the fourth switching tube T4 is an NPN triode, the fifth switching tube T5 is a PNP triode, the sixth switching tube T6 is a PNP triode, the seventh switching tube T7 is an NPN triode, if the third enable end En3 of the boost circuit 122 and the fourth enable end En4 of the clock circuit 124 are enabled, when the signal input end S1 of the voltage amplifying circuit 125 inputs the second high voltage of the pulse signal output by the clock circuit 124, the fourth switching tube T4 is turned on, the fifth switching tube T5 is turned on, the sixth switching tube T6 is turned off, and the seventh switching tube T7 is turned off, so that the first high voltage output by the output end Out3 of the boost circuit 122 is output to the driving electrode 211; when the signal input terminal S1 of the voltage amplifying circuit 125 inputs the second low voltage, which is the pulse signal output by the clock circuit 124, the fourth switching tube T4 is turned off, the fifth switching tube T5 is turned off, the sixth switching tube T6 is turned on, and the seventh switching tube T7 is turned on, so that the first low voltage output by the output terminal Out4 of the charge pump circuit 123 is output to the driving electrode 211. If the third enable end En3 of the boost circuit 122 and the fourth enable end En4 of the clock circuit 124 are not enabled, the fourth switching tube T4 is turned off, the fifth switching tube T5 is turned off, the sixth switching tube T6 is turned off, and the seventh switching tube T7 is turned off.
Optionally, based on the above embodiment, fig. 9 is a schematic structural diagram of a further voltage amplifying circuit provided in the embodiment of the present invention, where the voltage amplifying circuit 125 further includes a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifth capacitor C5, and a sixth capacitor C6, where a first end of the tenth resistor R10 is electrically connected to the signal input terminal S1 of the voltage amplifying circuit 125, a second end of the tenth resistor R10 is electrically connected to the control terminal Ctr4 of the fourth switching tube T4, a first end of the eleventh resistor R11, a second end of the second resistor R2 is electrically connected to the control terminal Ctr4 of the fourth switching tube T4, a second end of the eleventh resistor R11, a first end of the twelfth resistor R2 is electrically connected to the control terminal Ctr5 of the fifth switching tube T5, a second end of the twelfth resistor R12, a first end of the fifth capacitor is electrically connected to the control terminal Ctr6 of the fifth switching tube T5, a first end of the thirteenth resistor R12 is electrically connected to the control terminal Ctr6 of the thirteenth resistor R6, and a fourth end of the thirteenth resistor R6 is electrically connected to the control terminal Ctr6 of the thirteenth resistor R7, and the thirteenth resistor R2 is electrically connected to the control terminal Ctr6 of the thirteenth resistor R4.
The tenth resistor R10, the eleventh resistor R11, the thirteenth resistor R13, and the fourteenth resistor R14 have a current limiting function. The fifth capacitor C5 and the sixth capacitor C6 have a filtering effect. The twelfth resistor R12 has a function of stabilizing the voltage.
The embodiment of the invention provides a driving circuit. On the basis of the above embodiment, with continued reference to fig. 4, the driving circuit 100 further includes a voltage stabilizing circuit 140, where a first end of the voltage stabilizing circuit 140 is electrically connected to the voltage output terminal Vo1 of the driving voltage generating circuit 120, and a second end of the voltage stabilizing circuit 140 is grounded to stabilize the output driving voltage, so as to avoid the influence of external electromagnetic interference.
The voltage stabilizing circuit 140 includes a zener diode Z1, wherein a first end of the zener diode Z1 is electrically connected to the voltage output terminal Vo1 of the driving voltage generating circuit 120, and a second end of the zener diode Z1 is grounded. Optionally, the voltage stabilizing circuit 140 further includes a fifteenth resistor R15, where the fifteenth resistor R15 is connected in parallel with the bidirectional voltage stabilizing diode Z1.
The embodiment of the invention provides two-dimensional/three-dimensional switchable display equipment. As shown in fig. 2, the two-dimensional/three-dimensional switchable display device includes: the display panel 300, the switching structure 200 located at the display surface side of the display panel, and the driving circuit (not shown in the drawings) provided in any embodiment of the present invention. The switching structure 200 includes: the electro-optic material layer 230 is disposed between the first substrate 210 and the second substrate 220, the driving electrode 211 is disposed on a side of the first substrate 210 facing the electro-optic material layer 230, and the common electrode 221 is disposed on a side of the second substrate facing the electro-optic material layer, wherein the common electrode 221 is grounded.
The first substrate 210 may be provided with a plurality of spaced stripe-shaped driving electrodes 211. The display panel 300 may be connected to the switching structure 200 through an adhesive. The display panel 300 may be a liquid crystal display panel or an organic light emitting diode display panel.
The two-dimensional/three-dimensional switchable display device provided by the embodiment of the present invention includes the driving circuit in the above embodiment, so that the two-dimensional/three-dimensional switchable display device provided by the embodiment of the present invention also has the beneficial effects described in the above embodiment, and will not be described herein.
Optionally, based on the above embodiment, fig. 10 is a schematic cross-sectional structure of another two-dimensional/three-dimensional switchable display device according to the embodiment of the present invention, where the switching structure 200 further includes a lenticular lens layer 240, the lenticular lens layer 240 is located between the first substrate and the second substrate 210, the electro-optic material molecular layer 230 and the lenticular lens layer 240 are arranged along a direction perpendicular to the first substrate 210, and the driving electrode 211 and the common electrode 221 are all whole electrodes. Wherein, the columnar lens can be a convex lens or a concave lens. Fig. 10 shows an exemplary case where the lenticular lens is a convex lens. As shown in fig. 10, a lenticular lens layer 240 may be positioned between the electro-optic material molecular layer 230 and the second substrate 220. The lenticular lens layer 240 may also be located between the electro-optic material molecular layer 230 and the first substrate 210.
The embodiment of the invention provides a driving method. Fig. 11 is a flowchart of a driving method according to an embodiment of the present invention. The driving method is realized based on the driving circuit provided by any embodiment of the invention. The driving method specifically comprises the following steps:
step 410, if the received display mode switching instruction is that the two-dimensional display mode is switched to the three-dimensional display mode, the control circuit outputs a first signal; and if the received display mode switching instruction is that the three-dimensional display mode is switched to the two-dimensional display mode, the control circuit outputs a second signal.
Wherein the logic signal comprises a first signal and a second signal which are logically opposite.
Step 420, if the driving voltage generating circuit receives the first signal, the driving voltage generating circuit outputs the driving voltage, otherwise, the driving voltage generating circuit stops outputting the driving voltage.
Step 430, if the switching circuit receives the second signal, the first terminal and the second terminal are controlled to be turned on, otherwise, the first terminal and the second terminal are controlled to be turned off.
It should be noted that, the driving method provided by the embodiment of the present invention is used for driving the driving circuit provided by any embodiment of the present invention, which has the beneficial effects described in the foregoing embodiments, and is not repeated herein.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, and that various obvious changes, rearrangements, combinations, and substitutions can be made by those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.

Claims (10)

1. A driving circuit, characterized by comprising:
the control circuit comprises an instruction input end and a logic signal output end, and is used for controlling the output logic signal according to the received display mode switching instruction, wherein the display mode comprises a three-dimensional display mode and a two-dimensional display mode;
the driving voltage generation circuit comprises a first enabling end and a voltage output end, wherein the first enabling end is electrically connected with a logic signal output end of the control circuit, the voltage output end is electrically connected with a driving electrode of the display device, and the driving voltage generation circuit is used for controlling whether the driving voltage is output or not according to the logic signal;
The switching circuit comprises a second enabling end, a first end and a second end, wherein the second enabling end of the switching circuit is electrically connected with the logic signal output end of the control circuit, the first end of the switching circuit is electrically connected with the driving electrode, the second end of the switching circuit is grounded, and the switching circuit is used for controlling whether the first end and the second end are conducted or not according to the logic signal;
the driving voltage is a square wave with preset frequency, and the absolute values of a first high voltage and a first low voltage of the square wave are equal and opposite in polarity;
the driving voltage generating circuit comprises a first voltage source, a booster circuit, a charge pump circuit, a clock circuit and a voltage amplifying circuit,
the output end of the first voltage source is electrically connected with the input end of the boost circuit, the third enabling end of the boost circuit is electrically connected with the first enabling end of the driving voltage generating circuit, and the boost circuit is used for controlling whether the first high voltage is output or not according to the logic signal;
the input end of the charge pump circuit is electrically connected with the boost circuit, and the charge pump circuit is used for controlling whether the first low voltage is output or not;
The fourth enabling end of the clock circuit is electrically connected with the first enabling end of the driving voltage generating circuit, and the clock circuit is used for controlling whether a pulse signal with preset frequency is output or not according to the logic signal;
the first power supply end of the voltage amplification circuit is electrically connected with the output end of the voltage boosting circuit, the second power supply end of the voltage amplification circuit is electrically connected with the output end of the charge pump circuit, the signal input end of the voltage amplification circuit is electrically connected with the output end of the clock circuit, and the output end of the voltage amplification circuit is electrically connected with the voltage output end of the driving voltage generation circuit.
2. The drive circuit of claim 1, wherein the logic signal comprises a first signal and a second signal that are logically opposite;
the control circuit is used for outputting a first signal if the received display mode switching instruction is from a two-dimensional display mode to a three-dimensional display mode, and outputting a second signal if the received display mode switching instruction is from the three-dimensional display mode to the two-dimensional display mode;
the driving voltage generating circuit is used for outputting driving voltage if the first signal is received, otherwise stopping outputting the driving voltage;
The switch circuit is used for controlling the first end and the second end to be conducted if the second signal is received, otherwise, controlling the first end and the second end to be disconnected.
3. The driving circuit according to claim 1, wherein the switching circuit comprises a first switching tube, a first resistor and a second switching tube,
the control end of the first switching tube is electrically connected with the second enabling end of the switching circuit, the first end of the first switching tube is electrically connected with the first voltage source, the second end of the first switching tube and the control end of the second switching tube are electrically connected with the first end of the first resistor;
the second end of the first resistor is electrically connected with the output end of the charge pump circuit;
the first end of the second switching tube is electrically connected with the first end of the switching circuit, and the second end of the second switching tube is electrically connected with the second end of the switching circuit.
4. The drive circuit according to claim 1, wherein the booster circuit includes: a first inductor, a third switching tube, a first diode, a first capacitor and a feedback regulating circuit,
wherein the first end of the first inductor is electrically connected with the input end of the boost circuit, the second end of the first inductor and the first end of the third switch tube are electrically connected with the anode of the first diode, the cathode of the first diode and the first end of the first capacitor are electrically connected with the output end of the boost circuit, the second end of the third switch tube and the second end of the first capacitor are grounded,
The input end of the feedback regulating circuit is electrically connected with the output end of the boost circuit, the output end of the feedback regulating circuit is electrically connected with the control end of the third switching tube, the fifth enabling end of the feedback regulating circuit is electrically connected with the third enabling end of the boost circuit, and the feedback regulating circuit is used for controlling the duty ratio of the control signal output to the control end of the third switching tube according to the logic signal.
5. The driving circuit as recited in claim 4, wherein the charge pump circuit comprises a second capacitor, a second diode, a third diode and a third capacitor,
the first end of the second capacitor, the input end of the charge pump circuit are electrically connected with the first end of the third switch tube, the second end of the second capacitor, the anode of the second diode are electrically connected with the cathode of the third diode, the cathode of the second diode is grounded, the anode of the third diode, the first end of the third capacitor are electrically connected with the output end of the charge pump circuit, and the second end of the third capacitor is grounded.
6. The drive circuit according to claim 1, wherein the voltage amplifying circuit includes: a fourth switching tube, a fifth switching tube, a sixth switching tube, a seventh switching tube, a second resistor, a third resistor, a fourth resistor and a fifth resistor,
The control end of the fourth switching tube is electrically connected with the signal input end of the voltage amplifying circuit, the first end of the fourth switching tube is electrically connected with the first power supply end of the voltage amplifying circuit through the second resistor, and the second end of the fourth switching tube is grounded;
the control end of the fifth switching tube is electrically connected with the first end of the fourth switching tube, the first end of the fifth switching tube is electrically connected with the first power supply end of the voltage amplifying circuit, and the second end of the fifth switching tube is electrically connected with the output end of the voltage amplifying circuit;
the first end of the third resistor is electrically connected with the first power supply end of the voltage amplifying circuit, and the second end of the third resistor is grounded through the fourth resistor;
the control end of the sixth switching tube is electrically connected with the signal input end of the voltage amplifying circuit, the first end of the sixth switching tube is electrically connected with the second end of the third resistor, and the second end of the sixth switching tube is electrically connected with the second power supply end of the voltage amplifying circuit through the fifth resistor;
the control end of the seventh switching tube is electrically connected with the second end of the sixth switching tube, the first end of the seventh switching tube is electrically connected with the second power supply end of the voltage amplifying circuit, and the second end of the seventh switching tube is electrically connected with the output end of the voltage amplifying circuit.
7. The drive circuit of claim 1, further comprising a voltage regulator circuit having a first terminal electrically connected to the voltage output of the drive voltage generation circuit and a second terminal grounded.
8. A two-dimensional/three-dimensional switchable display device, comprising: a display panel, a switching structure on a display surface side of the display panel, and the driving circuit according to any one of claims 1 to 7,
wherein, the switching structure includes: the electro-optic material comprises a first substrate, a second substrate, an electro-optic material molecular layer, a driving electrode, a common electrode and a grounding electrode, wherein the first substrate and the second substrate are oppositely arranged, the electro-optic material molecular layer is arranged between the first substrate and the second substrate, the driving electrode is arranged on one side of the first substrate facing the electro-optic material molecular layer, and the common electrode is arranged on one side of the second substrate facing the electro-optic material molecular layer, and is grounded.
9. The two-dimensional/three-dimensional switchable display device of claim 8 wherein the switching structure further comprises a lenticular layer between the first substrate and the second substrate, the electro-optic material molecular layer and the lenticular layer being aligned in a direction perpendicular to the first substrate, the drive electrode and the common electrode being all-sided electrodes.
10. A driving method based on the driving circuit of any one of claims 1 to 7, wherein the logic signal includes a first signal and a second signal having logically opposite polarities, the driving method comprising:
the control circuit outputs a first signal if the received display mode switching instruction is that the two-dimensional display mode is switched to the three-dimensional display mode; the control circuit outputs a second signal if the received display mode switching instruction is that the three-dimensional display mode is switched to the two-dimensional display mode;
the driving voltage generating circuit outputs driving voltage if receiving the first signal, otherwise, stops outputting the driving voltage;
and if the switching circuit receives the second signal, the first end and the second end are controlled to be conducted, otherwise, the first end and the second end are controlled to be turned off.
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