CN108763622B - Harmonic control network and design method of class-F power amplifier using same - Google Patents
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Abstract
The invention discloses a harmonic control network and a design method of an F-type power amplifier adopting the harmonic control network. The conventional class F power amplifier has a narrow operating bandwidth. The invention discloses a harmonic control network, which comprises a first microstrip line, a second microstrip line, a third microstrip line, a fourth microstrip line, a fifth microstrip line and a sixth microstrip line. One end of the first microstrip line is connected with the output end of the transistor, and the other end of the first microstrip line is connected with one end of the second microstrip line. The other end of the second microstrip line is connected with one end of the third microstrip line and one end of the fifth microstrip line. The other end of the fifth microstrip line is suspended. The other end of the third microstrip line is connected with one end of the fourth microstrip line; the other end of the fourth microstrip line is connected with one end of the sixth microstrip line. The other end of the sixth microstrip line is suspended. According to the invention, the tapered tuning microstrip line is added, so that the bandwidth of the F-type power amplifier is expanded while the high efficiency of the F-type power amplifier is kept.
Description
Technical Field
The invention belongs to the technical field of power amplifiers, and particularly relates to a harmonic control network and a design method of an F-type power amplifier adopting the harmonic control network.
Background
Radio frequency microwave technology has been developed rapidly for over half a century and is widely used in the communication fields of mobile phones, satellite communication, WLAN and the like. The rf power amplifier module is an important component of a wireless communication system, and in order to satisfy the requirement of long-distance transmission of signals and ensure reliable reception of signals, the rf power amplifier module must be used for signal amplification in a wireless transceiving system. The performance of the power amplifier module therefore directly determines the operation of the entire transceiver system. The power amplifier module is of course the core part of the radio frequency front end.
With the continuous development of communication technology, the demand of people for communication technology is higher and higher, and power amplifiers are also more and more emphasized as important components in communication transceiving systems. Therefore, broadband high-efficiency rf power amplifiers are the central focus of research on rf power amplifiers today. The class-F power amplifier has the characteristic of high efficiency, so that the class-F power amplifier can be effectively used for base station construction. The class-F power amplifier is a special switch-type power amplifier, which makes full use of the control of each harmonic to make the efficiency reach 100% of theoretical value. Meanwhile, the class F power amplifier uses a passive load network to control each harmonic, so as to control the output voltage waveform and current waveform, which makes the class F power amplifier have lower requirements on transistors. However, the class F power amplifier in the prior art has the following problems: because the traditional class-F power amplifier utilizes the microstrip line to carry out harmonic control, the high Q value characteristic of the microstrip line often greatly limits the working bandwidth of the power amplifier. In previously designed circuits, the problem between the bandwidth and the harmonic control of class F power amplifiers has been addressed to some extent. However, a single microstrip tuning line has a problem: within the design bandwidth, there is a problem of significant drop in efficiency near the highest frequency point and the lowest frequency point, resulting in a problem of low flatness in the band. Therefore, how to solve the problem of low high and low frequencies in the band becomes a difficult point.
Disclosure of Invention
The invention aims to provide a harmonic control network and a design method of a class-F power amplifier adopting the harmonic control network.
The invention discloses a harmonic control network, which comprises a first microstrip line, a second microstrip line, a third microstrip line, a fourth microstrip line, a fifth microstrip line and a sixth microstrip line. One end of the first microstrip line is connected with the output end of the transistor, and the other end of the first microstrip line is connected with one end of the second microstrip line. The other end of the second microstrip line is connected with one end of the third microstrip line and one end of the fifth microstrip line. The other end of the fifth microstrip line is suspended. The other end of the third microstrip line is connected with one end of the fourth microstrip line; the other end of the fourth microstrip line is connected with one end of the sixth microstrip line. The other end of the sixth microstrip line is suspended.
The first microstrip line, the third microstrip line, the fifth microstrip line and the sixth microstrip line are all rectangular microstrip lines; the second microstrip line and the fourth microstrip line are both conical microstrip lines; the electrical length of the fifth microstrip line is λ/8. The electrical length of the sixth microstrip line is λ/12. The electrical length of the first microstrip line is between lambda/9.5 and lambda/8.5. The electrical length of the third microstrip line is between lambda/13.5 and lambda/12.5. The sum of the electrical lengths of the first microstrip line and the second microstrip line is between lambda/8.5 and lambda/7.5. The sum of the electrical lengths of the third microstrip line and the fourth microstrip line is between lambda/12.5 and lambda/11.5. λ is the electromagnetic wave wavelength.
Further, the length l of the second microstrip line1The expression of (a) is as follows:
wherein z is the length coefficient of the microstrip line from the input end, and the value is 54.5;
Z0is the impedance value of the circuit connected with the input end of the first microstrip line. ZLThe impedance value of a circuit connected with the output end of the fourth microstrip line;
and calculating the normalized impedance value of the second microstrip line under the central frequency in ADS software according to the electrical length of the second microstrip line.
Further, the length l of the fourth microstrip line2The expression of (a) is as follows:
wherein z is the length coefficient of the microstrip line from the input end, and the value is 54.5;
Z0is the impedance value of the circuit connected with the input end of the first microstrip line. ZLThe impedance value of a circuit connected with the output end of the fourth microstrip line;
and calculating the normalized impedance value of the fourth microstrip line under the central frequency in ADS software according to the electrical length of the fourth microstrip line.
Furthermore, the width of the end of the second microstrip line connected with the first microstrip line and the width of the end of the fifth microstrip line are respectively in ADS software according to the Z0、ZLAnd (4) obtaining. The width of the end of the fourth microstrip line connected with the third microstrip line and the width of the end of the sixth microstrip line are respectively in ADS software according to the Z0、ZLAnd (4) obtaining.
Furthermore, the end of the fourth microstrip line connected with the sixth microstrip line is also connected with the input end of the output fundamental wave matching circuit. The end of the second microstrip line connected with the third microstrip line is also connected with the output end of the drain electrode bias circuit.
The design method of the class F power amplifier adopting the harmonic control network specifically comprises the following steps:
the method comprises the following steps: a grid electrode bias circuit and a drain electrode bias circuit are designed in ADS software, a power amplifier biased in a B type or an AB type is obtained, and matching of an input fundamental wave matching circuit and an output fundamental wave matching circuit is carried out.
Step two: in ADS software, a first microstrip line in the harmonic control network is connected with the output end of a transistor, a fourth microstrip line is connected with the input end of an output fundamental wave matching circuit, and the end of a second microstrip line connected with a third microstrip line is connected with a drain electrode bias circuit. Obtaining a schematic diagram.
Step three: and adjusting the electrical lengths of the first microstrip line and the third microstrip line in the schematic diagram obtained in the step two in ADS software, so that the efficiency value of the F-type power amplifier simulated by the ADS software in the designed bandwidth is more than 70%. And obtaining a new schematic diagram and entering the step four.
Step four: and (4) exporting the schematic diagram obtained in the step three in ADS software to form a layout. And performing combined simulation of the layout and the schematic diagram. And if the efficiency values of the F-type power amplifier obtained by the layout and schematic diagram combined simulation in the design bandwidth are both larger than 70%, directly entering the fifth step. And if the efficiency value of the F-type power amplifier obtained by the layout and schematic diagram combined simulation in the design bandwidth is less than or equal to 70%, adjusting the capacitance values of the capacitors in the grid bias circuit and the drain bias circuit, and repeating the third step.
Step five: and C, processing the F-type power amplifier according to the layout obtained in the step four.
The invention has the beneficial effects that:
1. according to the invention, the tapered tuning microstrip line is added, so that the bandwidth of the F-type power amplifier is expanded while the high efficiency of the F-type power amplifier is kept.
2. The design bandwidth of the invention reaches 1GHz, which is far larger than 200MHz in the prior art.
3. The efficiency of the invention in the designed bandwidth exceeds 70 percent and is far higher than that of the base station power amplifier, and a new method is provided for the construction of the base station power amplifier in the future.
Drawings
FIG. 1 is a circuit configuration diagram of the present invention
Fig. 2 is an efficiency line graph obtained by performing efficiency simulation on the class F power amplifier, the base station power amplifier, and the existing class F power amplifier, respectively, in the ADS software.
Detailed Description
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 1, a harmonic control network includes a first microstrip line T1, a second microstrip line T2, a third microstrip line T3, a fourth microstrip line T4, a fifth microstrip line T5 and a sixth microstrip line T6. One end of the first microstrip line T1 is connected to the output (drain) of the transistor in the class F power amplifier, and the other end is connected to one end of the second microstrip line T2. The other end of the second microstrip line T2 is connected to one end of the third microstrip line T3 and one end of the fifth microstrip line T5. The other end of the fifth microstrip line T5 is suspended. The other end of the third microstrip line T3 is connected to one end of the fourth microstrip line T4; the other end of the fourth microstrip line T4 is connected to one end of the sixth microstrip line T6. The other end of the sixth microstrip line T6 is suspended.
The input end (gate) of the transistor is connected to the output ends of the input fundamental wave matching circuit 1 and the gate bias circuit. The end of the fourth microstrip line T4 connected to the sixth microstrip line T6 is also connected to the input end of the output fundamental wave matching circuit 2. The end of the second microstrip line T2 connected to the third microstrip line T3 is also connected to the output of the drain bias circuit. The input fundamental wave matching circuit 1 and the output fundamental wave matching circuit 2 are obtained by impedance matching of a gate and a drain of a transistor, respectively. The goal of impedance matching is to minimize reflections of the signal after it enters the circuit. The grid biasing circuit and the drain biasing circuit respectively provide direct-current voltage at the grid and the drain of the transistor to maintain the normal work of the transistor, and meanwhile, the bias of the transistor is ensured to be in B class or AB class.
The first microstrip line T1, the third microstrip line T3, the fifth microstrip line T5 and the sixth microstrip line T6 are all rectangular microstrip lines; the second microstrip line T2 and the fourth microstrip line T4 are both tapered microstrip lines; the fifth microstrip line T5, the first microstrip line T1 and the second microstrip line T2 control the second harmonic wave in common. The sixth microstrip line T6, the third microstrip line T3 and the fourth microstrip line T4 control the third harmonic wave in common. The electrical length of the fifth microstrip line T5 is λ/8. The sixth microstrip line T6 has an electrical length of λ/12. The electrical length of the first microstrip line T1 is between lambda/9.5-lambda/8.5. The electrical length of the third microstrip line T3 is between lambda/13.5-lambda/12.5. The sum of the electrical lengths of the first microstrip line T1 and the second microstrip line T2 is between lambda/8.5 and lambda/7.5. The sum of the electrical lengths of the third microstrip line T3 and the fourth microstrip line T4 is between lambda/12.5 and lambda/11.5. λ is the electromagnetic wave wavelength.
The expression of the normalized impedance value z (z) of the tapered microstrip line at the center frequency is as follows:
in the formula (1), the reaction mixture is,
Z0is the impedance value of the circuit connected with the input end of the tapered microstrip line (namely, the impedance value of the input fundamental wave matching circuit 1 in the class F power amplifier applying the invention under the central frequency). ZLIs the impedance value of the circuit connected with the output end of the tapered microstrip line (namely, the impedance value of the output fundamental wave matching circuit 2 in the class F power amplifier applying the invention under the central frequency). l is the length of the conical microstrip line; z is the length coefficient of the microstrip line from the input end, and the value is 54.5.
The length l of the second microstrip line T2 is obtained from the equation (1)1The expression of (A) is shown in formula (2),
in the formula (2), the reaction mixture is,
the normalized impedance value of the second microstrip line T2 at the center frequency is obtained in ADS software (Advanced Design system) according to the electrical length of the second microstrip line T2; the electrical length of the second microstrip line T2 is equal to the electrical length of the fifth microstrip line T5 minus the electrical length of the first microstrip line T1.
The length l of the fourth microstrip line T4 is obtained from the equation (1)2The expression of (b) is shown in formula (3),
in the formula (3), the reaction mixture is,
is the normalized resistance of the fourth microstrip line T4 at the central frequencyThe reactance value is calculated in ADS software according to the electrical length of the fourth microstrip line T4; the electrical length of the fourth microstrip line T4 is equal to the electrical length of the sixth microstrip line T6 minus the electrical length of the third microstrip line T3.
The width of the second microstrip line T2 connected with the end of the first microstrip line T1 and the width of the fifth microstrip line T5 are respectively according to Z in ADS software0、ZLAnd (4) obtaining. The width of the end of the fourth microstrip line T4 connected with the third microstrip line T3 and the width of the end of the sixth microstrip line T6 are respectively according to Z in ADS software0、ZLAnd (4) obtaining.
In the prior art, the harmonic control network only includes the third microstrip line T3, the fifth microstrip line T5 and the sixth microstrip line T6. According to the impedance transformation theory, the input impedance Z of the existing harmonic control network can be obtainedin(f) The formula (c) is shown in formula 4,
in the formula (4), j is an imaginary symbol; z5Is the characteristic impedance value of the fifth microstrip line T5; z3Is the characteristic impedance value of the third microstrip line T3; z6Is the characteristic impedance value of the sixth microstrip line T6; f is the actual frequency (i.e. the frequency at which the class F power amplifier operates); f. of0To design the center frequency (i.e., the center frequency determined by the class F power amplifier in the design).
The size of the video bandwidth is determined according to the size of the input impedance, and the larger the input impedance is, the smaller the bandwidth is. Since the fifth microstrip line T5, the third microstrip line T3 and the sixth microstrip line T6 are directly determined according to the design requirement of the class F power amplifier. Therefore, the magnitude of the input impedance cannot be reduced by directly changing the characteristic impedance values of the fifth microstrip line T5, the third microstrip line T3, and the sixth microstrip line T6. The inability to reduce the input impedance makes the bandwidth of the conventional class F power amplifier unfeasible.
At the input impedance Z of the inventionin(f) ' is represented by formula 5,
in the formula (5), Z5' is the total impedance value after the first microstrip line T1 and the second microstrip line T2 are connected in parallel with the fifth microstrip line T5, and the expression is shown in formula (6). Z3' is the total impedance value of the fourth microstrip line T4 connected in series with the third microstrip line T3, and the expression is shown in formula (7).
In the formula (6), Z1Is the characteristic impedance value of the first microstrip line T1; beta is a phase constant and takes a value of 2 pi/lambda; lx1Is the electrical length of the first microstrip line T1; z2,5The expression is shown in formula (8) for the total impedance value of the fifth microstrip line T5 connected in parallel to the second microstrip line T2.
In the formula (7), Z4Is the characteristic impedance value of the fourth microstrip line T4; beta is a phase constant and takes a value of 2 pi/lambda; lx3Is the electrical length of the third microstrip line T3.
In the formula (8), Z2Is the characteristic impedance value of the second microstrip line T2; lx2Is the electrical length of the second microstrip line T2; z5xThe expression is shown in equation (9) for the impedance value of the fifth microstrip line T5.
In the formula (9), lx5Is the electrical length of the fifth microstrip line T5.
Due to parallel connection rear resistanceResistance value decreases, so Z5The mode of' is necessarily smaller than the characteristic impedance value Z of the fifth microstrip line T55。
Since the electrical length of the fourth microstrip line T4 is smaller than that of the third microstrip line T3, Z is a linear microstrip line4＜Z3. Because of the electrical length l of the third microstrip line T3x3<Lambda/8, so tan (. beta.. l)x3) < 1, and further Z can be obtained3' modulus less than < Z3。
It follows that, under the condition that the actual frequency f is not changed, Zin(f) ' must be less than Zin(f) Therefore, the video bandwidth of the present invention is necessarily larger than that of the existing harmonic control network.
And respectively carrying out efficiency analog simulation on the F-type power amplifier, the base station power amplifier and the conventional F-type power amplifier by using ADS software under the conditions that the input signal is continuous wave of 1.7-2.7GHz and the input power is 28 dBm. The simulation result is shown in fig. 2, and it can be seen that the drop of the base station power amplifier can only reach about 50%. The design bandwidth of the existing F-type power amplifier is only 200MHz, the efficiency can only reach more than 70% within the frequency band of 2.1-2.3GHz, and the requirement of the modern base station on the index of the power amplifier cannot be met. The efficiency of the F-type power amplifier can reach more than 70% in a frequency band of 1.7-2.7GHz, and therefore the invention can ensure the high efficiency of the power amplifier and greatly improve the video bandwidth.
The design method of the class F power amplifier adopting the harmonic control network is designed and realized through the following steps:
the method comprises the following steps: a grid bias circuit and a drain bias circuit are designed in ADS software, a power amplifier biased in a B type or an AB type is obtained, and matching of an input fundamental wave matching circuit 1 and an output fundamental wave matching circuit 2 is carried out.
Step two: in the ADS software, the first microstrip line T1 in the harmonic control network is connected with the output end of the transistor, the fourth microstrip line T4 is connected with the input end of the output fundamental wave matching circuit 2, and the end of the second microstrip line T2 connected with the third microstrip line T3 is connected with the drain bias circuit. Obtaining a schematic diagram.
Step three: and adjusting the electrical lengths of the first microstrip line T1 and the third microstrip line T3 in the schematic diagram obtained in the step two in ADS software, so that the efficiency value of the class-F power amplifier simulated by the ADS software in the design bandwidth is more than 70%. Therefore, the purpose of expanding the bandwidth of the whole power amplifier and realizing high-efficiency broadband is achieved. And obtaining a new schematic diagram and entering the step four.
Step four: and (4) exporting the schematic diagram obtained in the step three in ADS software to form a layout. And performing combined simulation of the layout and the schematic diagram. And if the efficiency values of the F-type power amplifier obtained by the layout and schematic diagram combined simulation in the design bandwidth are both larger than 70%, directly entering the fifth step. And if the efficiency value of the F-type power amplifier obtained by the layout and schematic diagram combined simulation in the design bandwidth is less than or equal to 70%, adjusting the capacitance values of the capacitors in the grid bias circuit and the drain bias circuit, and repeating the third step.
Step five: and C, processing the F-type power amplifier according to the layout obtained in the step four.
Claims (6)
1. A harmonic control network comprises a first microstrip line, a second microstrip line, a third microstrip line, a fourth microstrip line, a fifth microstrip line and a sixth microstrip line; the method is characterized in that: one end of the first microstrip line is connected with the output end of the transistor; the other end of the first microstrip line is connected with one end of the second microstrip line; the other end of the second microstrip line is connected with one end of the third microstrip line and one end of the fifth microstrip line; the other end of the fifth microstrip line is suspended in the air; the other end of the third microstrip line is connected with one end of the fourth microstrip line; the other end of the fourth microstrip line is connected with one end of the sixth microstrip line; the other end of the sixth microstrip line is suspended in the air;
the first microstrip line, the third microstrip line, the fifth microstrip line and the sixth microstrip line are all rectangular microstrip lines; the second microstrip line and the fourth microstrip line are both conical microstrip lines; the electrical length of the fifth microstrip line is lambda/8; the electrical length of the sixth microstrip line is lambda/12; the electrical length of the first microstrip line is between lambda/9.5 and lambda/8.5; the electrical length of the third microstrip line is between lambda/13.5 and lambda/12.5; the sum of the electrical lengths of the first microstrip line and the second microstrip line is between lambda/8.5 and lambda/7.5; the sum of the electrical lengths of the third microstrip line and the fourth microstrip line is between lambda/12.5 and lambda/11.5; λ is the electromagnetic wave wavelength.
2. A harmonic control network as in claim 1, wherein: length l of the second microstrip line1The expression of (a) is as follows:
wherein z is the length coefficient of the microstrip line from the input end, and the value is 54.5;
Z0the impedance value of a circuit connected with the input end of the first microstrip line; zLThe impedance value of a circuit connected with the output end of the fourth microstrip line;
and calculating the normalized impedance value of the second microstrip line under the central frequency in ADS software according to the electrical length of the second microstrip line.
3. A harmonic control network as in claim 1, wherein: length l of fourth microstrip line2The expression of (a) is as follows:
wherein z is the length coefficient of the microstrip line from the input end, and the value is 54.5;
Z0the impedance value of a circuit connected with the input end of the first microstrip line; zLThe impedance value of a circuit connected with the output end of the fourth microstrip line;
and calculating the normalized impedance value of the fourth microstrip line under the central frequency in ADS software according to the electrical length of the fourth microstrip line.
4. A harmonic control network as in claim 1, wherein: the width of the end of the second microstrip line connected with the first microstrip line and the width of the end of the fifth microstrip line are respectively in ADS software according to the Z0、ZLCalculating; the width of the end of the fourth microstrip line connected with the third microstrip line and the width of the end of the sixth microstrip line are respectively in ADS software according to the Z0、ZLAnd (4) obtaining.
5. A harmonic control network as in claim 1, wherein: the end of the fourth microstrip line connected with the sixth microstrip line is also connected with the input end of the output fundamental wave matching circuit; the end of the second microstrip line connected with the third microstrip line is also connected with the output end of the drain electrode bias circuit.
6. A method of designing a class F power amplifier employing a harmonic control network as claimed in claim 1, characterized by: the method comprises the following steps: designing a grid electrode bias circuit and a drain electrode bias circuit in ADS software to obtain a power amplifier biased in a B class or an AB class, and matching an input fundamental wave matching circuit with an output fundamental wave matching circuit;
step two: in ADS software, a first microstrip line in the harmonic control network is connected with the output end of a transistor, a fourth microstrip line is connected with the input end of an output fundamental wave matching circuit, and the end of a second microstrip line connected with a third microstrip line is connected with a drain electrode bias circuit; obtaining a schematic diagram;
step three: adjusting the electrical lengths of the first microstrip line and the third microstrip line in the schematic diagram obtained in the step two in the ADS software, so that the efficiency values of the class-F power amplifier simulated by the ADS software in the design bandwidth are all over 70%; obtaining a new schematic diagram, and entering a step four;
step four: exporting the schematic diagram obtained in the third step in ADS software to form a layout; performing combined simulation of the layout and the schematic diagram; if the efficiency values of the F-type power amplifier obtained by the layout and schematic combined simulation in the design bandwidth are both larger than 70%, directly entering the fifth step; if the efficiency value of the F-type power amplifier obtained by the layout and schematic combined simulation in the design bandwidth is less than or equal to 70%, adjusting the capacitance values of the capacitors in the grid bias circuit and the drain bias circuit, and repeating the third step;
step five: and C, processing the F-type power amplifier according to the layout obtained in the step four.
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Application publication date: 20181106 Assignee: Zhejiang fushiyun Intelligent Technology Co.,Ltd. Assignor: HANGZHOU DIANZI University Contract record no.: X2023330000345 Denomination of invention: A Harmonic Control Network and Design Method for Class F Power Amplifiers Using It Granted publication date: 20220322 License type: Common License Record date: 20230626 |