CN108761181B - Airborne 36V three-phase alternating current signal acquisition and processing device and method - Google Patents
Airborne 36V three-phase alternating current signal acquisition and processing device and method Download PDFInfo
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Abstract
An airborne 36V three-phase alternating current signal acquisition and processing device comprises a multi-channel ADC, an FPGA and a processor; the FPGA controls the multichannel ADC to acquire airborne 36V three-phase alternating current signals ua、ub、uc(ii) a The FPGA reads the airborne 36V three-phase alternating current signal u acquired by the multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac(ii) a The processor reads a voltage peak-to-peak value U obtained by resolving through the FPGAA、UB、UCAnd a phase difference thetaab、θbc、θacObtaining an onboard 36V three-phase alternating current signal ua、ub、ucLine voltage U ofAB、UBC、UAC(ii) a According to the invention, the multichannel ADC is used for collecting the airborne 36V three-phase alternating current signals, and the FPGA and the processor are used for processing data, so that the line voltage of the airborne 36V three-phase alternating current signals is obtained, and the sampling speed of the airborne 36V three-phase alternating current signals and the data processing speed are improved.
Description
All as the field of technology
The invention relates to the technical field of avionic equipment, in particular to an airborne 36V three-phase alternating-current signal acquisition and processing device and method.
All the above-mentioned background techniques
The state of the onboard power supply on the airplane is related to the working state of the onboard electronic equipment, and is an important parameter which needs to be monitored and recorded in real time on the airplane. The airborne power supply adopted by most airborne electronic equipment on the airplane is an airborne 36V three-phase alternating current signal generated by an airborne three-phase current transformer generator. The line voltage (including AB line voltage, BC line voltage and AC line voltage) and the signal period of the onboard 36V three-phase alternating current signal are parameters which are mainly collected by an onboard flight parameter system.
The traditional flight parameter collector generally adopts a capacity-designed half-wave rectification circuit, two phase voltages of the two phase voltages are subjected to half-wave rectification and then are processed by an integrating circuit to form level signals for being collected by an ADC (analog to digital converter), but the method has the defects of low collection and update rate (the half-wave rectification and the integrating circuit need a large amount of time), poor collection precision, incapability of reflecting the condition that three-phase voltages are lack of phases and the like, and cannot meet the requirement of a modern airplane on flight parameter recording.
All the contents of the invention
The invention aims to provide an onboard 36V three-phase alternating current signal acquisition and processing device, which can improve the acquisition speed and the data processing speed of an onboard 36V three-phase alternating current signal to obtain an onboard 36V three-phase alternating current signal line voltage.
In order to realize the first purpose of the invention, the invention adopts the following technical scheme:
an airborne 36V three-phase alternating current signal acquisition and processing device comprises a multi-channel ADC, an FPGA and a processor; the FPGA controls the multichannel ADC to acquire airborne 36V three-phase alternating current signals ua、ub、uc(ii) a The FPGA reads the airborne 36V three-phase alternating current signal u acquired by the multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac(ii) a The processor reads a voltage peak-to-peak value U obtained by resolving through the FPGAA、UB、UCAnd a phase difference thetaab、θbc、θac,Obtaining an onboard 36V three-phase alternating current signal ua、ub、ucLine voltage U ofAB、UBC、UAC。
Furthermore, the FPGA comprises an ADC control unit, a data processing unit and an interface unit; the ADC control unit controls the multichannel ADC to acquire airborne 36V three-phase alternating-current signals ua、ub、ucAnd reading the airborne 36V three-phase alternating current signal u collected by the multichannel ADCa、ub、uc(ii) a The data processing unit carries out on-board 36V three-phase alternating current signal ua、ub、ucResolving to obtain a voltage peak-to-peak value UA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac(ii) a The processor reads the voltage peak-to-peak value U obtained by resolving through the FPGA through the interface unitA、UB、UCAnd a phase difference thetaab、θbc、θac。
Further, the number of the multi-channel ADCs is greater than or equal to three.
Further, the multi-channel ADC employs ADS 8555.
Further, the FPGA adopts an ALTERA industrial-grade FPGA.
The second purpose of the invention is to provide a method for acquiring and processing an onboard 36V three-phase alternating current signal, which improves the speed of acquiring and processing the onboard 36V three-phase alternating current signal.
In order to realize the second purpose of the invention, the invention adopts the following technical scheme:
a method for acquiring and processing an onboard 36V three-phase alternating current signal comprises the following steps:
(1) FPGA (field programmable Gate array) controlled multichannel ADC (analog to digital converter) acquisition airborne 36V three-phase alternating current signal ua、ub、uc;
(2) FPGA reads airborne 36V three-phase alternating current signal u acquired by multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac;
(3) The processor reads a voltage peak-to-peak value U obtained by FPGA calculationA、UB、UCAnd a phase difference thetaab、θbc、θac;
(4) Processor calculating computerLine voltage U carrying 36V three-phase AC signalAB、UBC、UAC。
Further, the step (4) comprises the steps of:
computer-carried 36V three-phase AC signal ua、ubLine voltage U in betweenAB
UAB=(UA 2+UB 2-2*UA*UB*cos(θab))1/2;
Computer-carried 36V three-phase AC signal ub、ucLine voltage U in betweenBC
UBC=(UB 2+UC 2-2*UB*UC*Cos(θbc))1/2;
Computer-carried 36V three-phase AC signal ua、ucLine voltage U in betweenAC
UAC=(UA 2+UC 2-2*UA*UC*Cos(θac))1/2。
The invention has the beneficial effects that:
according to the technical scheme, the airborne 36V three-phase alternating current signal is acquired through the multichannel ADC, and data processing is performed through the FPGA and the processor, so that the line voltage of the airborne 36V three-phase alternating current signal is obtained, and the sampling speed of the airborne 36V three-phase alternating current signal and the data processing speed are improved. Meanwhile, the line voltage of the three-phase alternating current signal is solved through the airborne 36V three-phase alternating current signal and the triangular cosine formula, and the calculation is simpler and more convenient.
Description of the drawings
In order to more clearly illustrate the embodiments of the present invention, the drawings used in the embodiments will be briefly described below. The drawings in the following description are only embodiments of the invention and other drawings may be derived from those drawings by a person skilled in the art without inventive effort.
FIG. 1 is a block diagram of an overall apparatus of an embodiment of the present invention;
FIG. 2 is a block diagram of the FPGA of FIG. 1 in accordance with an embodiment of the present invention;
fig. 3 is a flow chart of a method of an embodiment of the present invention.
(specific embodiments) in all cases
The present invention will be described in detail below with reference to the accompanying drawings.
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in FIG. 1, an onboard 36V three-phase alternating current signal acquisition and processing device comprises a multi-channel ADC, an FPGA and a processor.
ADC is an abbreviation of Analog-to-Digital-Converter, an Analog-to-Digital Converter, which is a device that converts a continuously varying Analog signal into a discrete Digital signal.
A multi-channel ADC refers to an ADC that can collect multiple analog signals.
The FPGA is short for Field-Programmable Gate Array and refers to a Field Programmable Gate Array.
FPGA (field programmable Gate array) controlled multichannel ADC (analog to digital converter) acquisition airborne 36V three-phase alternating current signal ua、ub、uc. FPGA reads airborne 36V three-phase alternating current signal u acquired by multichannel ADCa、ub、ucAnd calculates the airborne 36V three-phase alternating current signal ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac. The processor reads a voltage peak-to-peak value U obtained by FPGA calculationA、UB、UCAnd a phase difference thetaab、θbc、θacAnd calculating to obtain an airborne 36V three-phase alternating current signal ua、ub、ucLine voltage U ofAB、UBC、UAC。The number of acquisition channels of the multichannel ADC is largeEqual to three.
In the present embodiment, the multichannel ADC employs ADS 8555; the FPGA adopts an ALTERA industrial-grade FPGA.
As shown in fig. 2, the FPGA includes an ADC control unit, a data processing unit, and an interface unit. ADC control unit controls multichannel ADC to collect airborne 36V three-phase alternating current signal ua、ub、ucAnd reading the airborne 36V three-phase alternating current signal u collected by the multichannel ADCa、ub、uc. Data processing unit for airborne 36V three-phase alternating current signal ua、ub、ucResolving to obtain an airborne 36V three-phase alternating current signal ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac. The processor reads the voltage peak-to-peak value U obtained by FPGA calculation through the interface unitA、UB、UCAnd a phase difference thetaab、θbc、θac。
As shown in fig. 3, a method for acquiring and processing an onboard 36V three-phase ac signal includes the following steps:
(1) FPGA (field programmable Gate array) controlled multichannel ADC (analog to digital converter) acquisition airborne 36V three-phase alternating current signal ua、ub、uc;
(2) FPGA reads airborne 36V three-phase alternating current signal u acquired by multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac;
(3) The processor reads a voltage peak-to-peak value U obtained by FPGA calculationA、UB、UCAnd a phase difference thetaab、θbc、θac;
(4) The processor calculates and obtains the line voltage U of the airborne 36V three-phase alternating current signalAB、UBC、UAC。
Wherein, the step (4) comprises the following steps:
computer-carried 36V three-phase AC signal ua、ubLine voltage U in betweenAB
UAB=(UA 2+UB 2-2*UA*UB*cos(θab))1/2;
Computer-carried 36V three-phase AC signal ub、ucLine voltage U in betweenBC
UBC=(UB 2+UC 2-2*UB*UC*cos(θbc))1/2;
Computer-carried 36V three-phase AC signal ua、ucLine voltage U in betweenAC
UAC=(UA 2+UC 2-2*UA*UC*cos(θac))1/2。
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may occur to those skilled in the art without departing from the principle of the invention, and are considered to be within the scope of the invention.
Claims (6)
1. The utility model provides an airborne 36V three-phase alternating current signal's collection processing apparatus which characterized in that: the system comprises a multi-channel ADC, an FPGA and a processor; the FPGA controls the multichannel ADC to acquire airborne 36V three-phase alternating current signals ua、ub、uc(ii) a The FPGA reads the airborne 36V three-phase alternating current signal u acquired by the multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac(ii) a The processor reads a voltage peak-to-peak value U obtained by resolving through the FPGAA、UB、UCAnd a phase difference thetaab、θbc、θacObtaining an onboard 36V three-phase alternating current signal ua、ub、ucLine voltage U ofAB、UBC、UAC;
The processor calculates and obtains the line voltage U of the airborne 36V three-phase alternating current signalAB、UBC、UACThe method comprises the following steps:
computer-carried 36V three-phase AC signal ua、ubLine voltage U in betweenAB
UAB=(UA 2+UB 2-2*UA*UB*cos(θab))1/2;
Computer-carried 36V three-phase AC signal ub、ucLine voltage U in betweenBC
UBC=(UB 2+UC 2-2*UB*UC*cos(θbc))1/2;
Computer-carried 36V three-phase AC signal ua、ucLine voltage U in betweenAC
UAC=(UA 2+UC 2-2*UA*UC*cos(θac))1/2。
2. The acquisition processing device according to claim 1, characterized in that: the FPGA comprises an ADC control unit, a data processing unit and an interface unit; the ADC control unit controls the multichannel ADC to acquire airborne 36V three-phase alternating-current signals ua、ub、ucAnd reading the airborne 36V three-phase alternating current signal u collected by the multichannel ADCa、ub、uc(ii) a The data processing unit carries out on-board 36V three-phase alternating current signal ua、ub、ucResolving to obtain a voltage peak-to-peak value UA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac(ii) a The processor reads the voltage peak-to-peak value U obtained by resolving through the FPGA through the interface unitA、UB、UCAnd a phase difference thetaab、θbc、θac。
3. The acquisition processing device according to claim 1 or 2, characterized in that: the number of the multichannel ADCs is more than or equal to three.
4. The acquisition processing device according to claim 3, characterized in that: the multichannel ADC adopts ADS 8555.
5. The acquisition processing device according to claim 1 or 2, characterized in that: the FPGA adopts an ALTERA industrial-grade FPGA.
6. The acquisition method of the acquisition processing device according to any one of claims 1 to 5, comprising the steps of:
(1) FPGA (field programmable Gate array) controlled multichannel ADC (analog to digital converter) acquisition airborne 36V three-phase alternating current signal ua、ub、uc;
(2) FPGA reads airborne 36V three-phase alternating current signal u acquired by multichannel ADCa、ub、ucSolving for ua、ub、ucVoltage peak-to-peak value U ofA、UB、UCPeriod T ofA、TB、TCAnd a phase difference thetaab、θbc、θac;
(3) The processor reads a voltage peak-to-peak value U obtained by FPGA calculationA、UB、UCAnd a phase difference thetaab、θbc、θac;
(4) The processor calculates and obtains the line voltage U of the airborne 36V three-phase alternating current signalAB、UBC、UAC。
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