CN108736719B - Method for improving MST driver transmission efficiency and driver device for MST driver transmission efficiency - Google Patents

Method for improving MST driver transmission efficiency and driver device for MST driver transmission efficiency Download PDF

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Publication number
CN108736719B
CN108736719B CN201810259880.2A CN201810259880A CN108736719B CN 108736719 B CN108736719 B CN 108736719B CN 201810259880 A CN201810259880 A CN 201810259880A CN 108736719 B CN108736719 B CN 108736719B
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coil
value
switch
terminal
voltage
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CN108736719A (en
Inventor
林智洙
楚大烈
金炳熹
李真宇
李龙熙
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Renis Co ltd
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Renis Co ltd
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Abstract

There is provided a method of disabling a full bridge circuit driving an MST coil from supplying current when a current flowing through the MST coil is greater than a predetermined value, thereby limiting an amount of current flowing through the MST coil regardless of a magnitude of a voltage supplied to the full bridge circuit.

Description

Method for improving MST driver transmission efficiency and driver device for MST driver transmission efficiency
Technical Field
The present invention relates to MST driver electronics that drive MST coils, and more particularly to techniques for limiting the magnitude of current flowing through MST coils.
Background
In a mobile phone, a connection shape of a switch constituting a TX (Transmitter) for transmitting information by using MST (Magnetic stripe Transmission) has a form of a bridge structure. By adjusting the on/off of the switch, the direction and duration of the coil current flowing through the MST coil is adjusted.
Fig. 1 is a timing diagram showing the relationship between the coil current flowing through the MST coil and the sensed voltage received by the RX device, according to the prior art.
In fig. 1 (a) and (b), the vertical axis of the graphs 511 and 512 represents the physical quantity displayed by the corresponding graphs, and the horizontal axis represents time. The graph 511 shown in (a) of fig. 1 shows a coil current flowing through an inductor, i.e., through the MST coil, and the graph 512 shown in (b) of fig. 1 shows a voltage output from a detection head of the MST receiver according to a signal detected by the detection head.
According to the conventional method, as shown in fig. 1 (a), the coil current flowing through the MST coil includes a rising region (RT, rise time), a falling region (FT, falling time), and a constant region (DC component, DCT).
In RX (Receiver), as shown in fig. 1 (b), a waveform from which the DC component is removed is detected and information is interpreted. The regions (DCT) where the coil current has a constant value cannot substantially have a beneficial effect on the detected value of RX. The size of the graph 512 shown in fig. 1 (b) is proportional to the time-dependent differential value of the size of the graph 511 shown in fig. 1 (a). Therefore, a time interval in which the magnitude of the coil current flowing through the MST coil changes sharply is required, and the magnitude of the coil current does not change or changes slowly between the time intervals in which the magnitude of the coil current changes sharply.
Fig. 2 shows a prior art circuit including an MST coil and an MST coil driver.
FIG. 3 is a timing diagram showing the relative values of the voltage and the coil current at each node of the circuit shown in FIG. 2. The horizontal axis of fig. 3 is a time axis.
Fig. 3 (a) shows voltages inputted to nodes AIN and BIN, which are input nodes of the MST coil driver, and digital voltage values corresponding to a logic high level and a logic low level are indicated in the graph of fig. 3 (a).
Fig. 3 (b) shows voltages output from the nodes AOUT, BOUT as input nodes of the MST coil driver, and in the graph of fig. 3 (b), analog voltage values are suggested.
Fig. 3 (c) shows the magnitude of the coil current (Icoil) flowing through the MST coil (L) of fig. 2, the graph of fig. 3 is presented according to the on/off states of the MOSFETs (field effect transistors) M1, M2, M3, and M4, in fig. 3, when the MOSFETs (field effect transistors) M1, M4 are in the on state, the MOSFETs (field effect transistors) M2, M3 are in the off state, when the MOSFETs (field effect transistors) M1, M4 are in the off state, the MOSFETs (field effect transistors) M2, M3 are in the on state, the Forward interval shown in fig. 3, the MOSFETs (field effect transistors) M1, M4 are in the on state, the MOSFETs (field effect transistors) M2, M3 are in the off state, the reverse interval shown in fig. 3, the MOSFETs (field effect transistors) M84, M4, M39 3 are in the off state.
The coil current flow in the time interval indicated as "Forward" in fig. 3 proceeds along the path VM → M1 → L1 → M4, and the coil current flow in the time interval indicated as "Reverse" proceeds along the path VM → M3 → L1 → M2.
According to the circuit configuration of fig. 3, in the Forward time interval and Reverse time interval, the magnitude of IPK, which is the value of the coil current (Icoil) in the normal state interval having the value of the coil current (Icoil) stabilized, is determined by the impedance of the coil (L1), the impedances of the MOSFETs (field effect transistors) M1, M2, M3, and M4, and the battery Voltage (VM).
As a related art patent, there is patent KR20160075653 (publication number) of the samsung intelligent payment application.
Disclosure of Invention
(technical problem to be solved)
The present invention is to solve the problems and aims to provide a method for limiting the magnitude of current flowing through an MST coil by adjusting MOSFET (field effect transistor) impedance.
(means for solving the problems)
The invention aims to reduce the size of the coil current (Icoil) flowing through the MST coil (L1) as a whole, thereby reducing the whole power consumption consumed by the MST coil (L1).
To this end, the present invention may utilize a method of reducing the magnitude of the coil current (Icoil) in a time interval (hereinafter, referred to as a stable-interval) other than a time interval in which the rate of change of the coil current (Icoil) should be increased, while minimizing the amount of change in the coil current (Icoil) in the stable-interval.
The invention relates to a wireThe loop current driving chip 3 may include: sensing part (R)EXTThe coil current detection device comprises a coil (L1), an M1S) which generates a sensing voltage (Vcs) substantially proportional to a coil current (Icoil) flowing through the coil (L), a comparison unit 410 which outputs a first value corresponding to a first logic value when the sensing voltage is greater than a predetermined comparison reference voltage (Vref), and outputs a second value corresponding to a second logic value when the sensing voltage is not greater than the predetermined comparison reference voltage (Vref), and a control unit 420 which switches a first switch (M1) which supplies the coil current to the coil to an off state when an output value of the comparison unit is the first value, and switches the first switch to an on state when the output value of the comparison unit is the second value.
At this time, the first logical value may be "1" and the second logical value may be "0".
In this case, the method may further include: a fourth switch (M4) having one terminal connected to the other terminal of the coil; and a sensing impedance (R)EXT) A fourth switch connected to the other terminal of the fourth switch; one terminal of the first switch is connected to one terminal of the coil, the sensing portion includes the sensing impedance, and the sensing voltage is a value proportional to a voltage across the sensing impedance.
Alternatively, the method may further include: a fourth switch having one terminal connected to the other terminal of the coil; a current mirror switch that generates a replica current proportional to the coil current flowing through the first switch; and a sense impedance connected to one terminal of the current mirror switch; one terminal of the first switch is connected to one terminal of the coil, the sensing portion includes the sensing impedance, and the sensing voltage is a value proportional to a voltage across the sensing impedance.
At this time, the comparing part may include: a first input terminal receiving the input sensing voltage; a second input terminal receiving the comparison reference voltage; and an output terminal (C1) for providing output voltages corresponding to different logic values according to whether the sensing voltage is greater than or less than the comparison reference voltage.
In this case, the comparison reference voltage may be changed over time by the control unit.
In this case, the comparison reference voltage may be an output voltage of a DAC (digital-to-analog converter) 430 controlled by the control unit.
In this case, the control unit may further include an input terminal for a first control voltage (AIN) having a PWM waveform, one terminal of the first switch may be connected to one terminal of the coil, the control unit may generate a first replica control voltage (INT _ a) that is a delayed replica of the first control voltage, may decrease and increase the comparison reference voltage during at least a part (b, c, d) of a time interval (a ') in which the first replica control voltage has a value corresponding to the first logical value ('1'), and may switch the on/off state of the first switch based on the output value of the comparison unit during at least a part of a time interval in which the first replica control voltage has a value corresponding to the first logical value.
At this time, the input terminal may be made to further include a second control voltage (BIN) having a complementary waveform to the PWM waveform, and the control section may further generate a second replica control voltage (INT _ B) that delays and replicates the second control voltage.
According to another aspect of the present invention, there may be provided a coil current driving chip including: a power supply terminal; a first switch connected to one terminal of the coil; a fourth switch connected to the other terminal of the coil; a sensing unit that generates a sensing voltage substantially proportional to a coil current flowing through the coil; a comparison section that outputs a first value corresponding to a first logical value when the sensing voltage is greater than a predetermined comparison reference voltage, and outputs a second value corresponding to a second logical value otherwise; and a control unit that controls an on/off state of the first switch and an on/off state of the fourth switch, and controls a magnitude of a current flowing through the coil.
(Effect of the invention)
According to the present invention, the magnitude of the current flowing through the MST coil can be limited by the impedance of the MOSFET (field effect transistor).
Drawings
Fig. 1 is a timing diagram showing the relationship between the coil current flowing through the MST coil and the sensed voltage received by the RX device, according to the prior art.
Fig. 2 shows a prior art circuit including an MST coil and an MST coil driver.
FIG. 3 is a timing diagram showing the relative values of the voltage and the coil current at each node of the circuit shown in FIG. 2.
Fig. 4 shows a circuit configuration of an MST driver of an embodiment of the invention.
FIG. 5 is a timing diagram showing the relative values of the voltage and the coil current at each node of the circuit shown in FIG. 4.
Fig. 6 shows a circuit configuration of an MST driver according to another embodiment of the invention.
FIG. 7 is a timing diagram showing the relative values of the voltage and the coil current at each node of the circuit shown in FIG. 6.
Fig. 8 shows a circuit configuration of an MST driver of yet another embodiment of the invention.
FIG. 9 is a timing diagram showing the relative values of the voltage and the coil current at each node of the circuit shown in FIG. 8.
Detailed Description
Embodiments of the present invention will be described below with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described in the present specification, and may be embodied in various other forms. The terms used in the present specification are used to aid understanding of the embodiments, and are not intended to limit the scope of the present invention. In addition, the singular forms used below also include plural forms as long as the meaning of the terms is not clearly indicated to the contrary.
Fig. 4 shows a circuit configuration of the MST driver 1 of one embodiment of the invention.
The MST Driver 1 may include a Control unit 420, a bridge unit 415 including 4 MOSFETs (field effect transistors) (M1, M2, M3, M4), and a comparator 410, wherein the Control unit 420 includes a terminal for receiving an input Control voltage (AIN, BIN), a terminal for receiving an input digital logic power supply (VCC), a terminal for receiving an input bridge power supply (VM) and a terminal for receiving an input reference potential (VSS), a coil current sensing terminal (CS), a coil current input/output terminal (AOUT, BOUT), a Charge Pump (Charge Pump) and Gate Driver (Gate Driver), and a Control Block (Control Block).
A sense impedance (R) may be connected between a coil current sensing terminal (CS) (i.e., a sensing node) and a reference potentialEXT) An MST coil (L1) may be connected between the coil current input/output terminal (AOUT) and the coil current input/output terminal (BOUT).
As can be understood from the structure shown in fig. 4: so that a coil current (Icoil) flowing through a MOSFET (field effect transistor) M1, M2, M3, or M4 passes through a sense impedance (R)EXT) The flow is performed. At this time, by passing through the sense impedance (R)EXT) The flowing coil current (Icoil) generates a node voltage Vcs at a sensing node (CS). The node voltage (Vcs) may be compared with a pre-supplied reference voltage (Vref) by means of the comparator 410.
If by sensing the impedance (R)EXT) If the flowing coil current (Icoil) exceeds a predetermined threshold value, a logic high value is output at the output node (C1) of the comparator 410, otherwise, a logic low value may be output. A situation where the coil current (Icoil) exceeds the predetermined threshold occurs when the battery Voltage (VM) is above a predetermined voltage threshold.
If a logic high value is outputted at the output node (C1), the controller 420 may control the operation of the MOSFETs (field effect transistors) M1 to M4 to lower the value of the coil current (Icoil) flowing through the MST coil (L1).
A particular method for reducing the value of the coil current (Icoil) flowing through the MST coil (L1) may include the following steps.
In step S10, the control part 420 may monitor whether the output node (C1) outputs a logic high value, that is, whether the coil current flowing through the MST coil (L1) is greater than a preset first current value, the comparison reference potential Vref of the input comparator 410 may be designed such that the output node (C1) is converted from a logic low value to a logic high value at the moment when the coil current is higher than the first current value.
In step S20, if a logic high value is output at the output node (C1), the control section 420 may control the bridge circuit so that the coil current (Icoil) does not flow through the MST coil (L1) — that is, may control so that a MOSFET (field effect transistor) that passes the coil current (Icoil) among MOSFETs (field effect transistors) of the bridge circuit is brought into an off state.
To this end, a gate of the MOSFET (field effect transistor) may be provided with a resultant value of logically AND-combining a PWM signal, which is a signal controlling on/off of the MOSFET (field effect transistor) passing the coil current (Icoil), with a value of the output node (C1). It is a well-known fact that the switches included in the driving circuit of the bridge configuration shown in fig. 2 and 4 are controlled according to the PWM signal.
Thus, the coil current (Icoil) does not go out immediately, but naturally decays with a predetermined time constant. As the coil current (Icoil) decreases, the sense voltage (Vcs) at the sense node (CS) also decreases. Accordingly, the voltage of the output node (C1) of the comparator 410 may be changed to a logic low level again.
In step S30, the control part 420 may monitor whether the output node (C1) outputs a logic low level value, that is, whether the coil current flowing through the MST coil (L1) is less than the preset first current value, the comparison reference potential Vref of the input comparator 410 may be designed such that the output node (C1) is converted from a logic high level value to a logic low level value at the moment the coil current is less than the first current value.
In step S40, if the output node (C1) outputs a logic low level value, the control section 420 may control the bridge circuit such that the coil current (Icoil) flows through the MST coil (L1), that is, may control all of the MOSFETs (field effect transistors) of the bridge circuit, through which the coil current (Icoil) passes, to be in an on state.
To this end, a gate of the MOSFET (field effect transistor) may be provided with a resultant value of logically AND-combining a PWM signal, which is a signal controlling on/off of the MOSFET (field effect transistor) passing the coil current (Icoil), with a value of the output node (C1).
Accordingly, the coil current (Icoil) may be increased again with a predetermined time constant, and if the coil current (Icoil) is increased, the voltage of the sensing node (CS) may be increased again, and then, the voltage of the output node (C1) of the comparator 410 may be changed to a logic high level again, and at this time, the control part 420 may re-interrupt the current supply to the MST coil (L1).
The MST driver 1 having the configuration of fig. 4 may repeat steps S10 to S40, and as a result, the coil current (Icoil) may repeat finely rising and falling around the first current value even if the bridge power supply (VM) has a high value. That is, if the MST driver 1 shown in fig. 4 is used, it is possible to control such that the coil current (Icoil) substantially has the first current value set in advance.
The MST driver 1 may control such that, at a first point in time, the direction of the coil current (Icoil) is changed from a first direction (e.g.: the direction toward AOUT → BOUT) to a second direction (e.g.: the direction toward BOUT → AOUT) or from the second direction to the first direction.
Then, the MST driver 1 may redirect the coil current (Icoil) at a second point in time later than the first point in time.
Between the first time point and the second time point, as explained in the steps S10 to S40, the control part 420 may compare the sensing voltage (Vcs) of the sensing node (CS) with the reference voltage (Vref) to rapidly switch the on/off state of at least one of the MOSFETs (field effect transistors) M1 to M4.
For example, from the first point in time when switching causes the coil current (Icoil) to flow from the second direction to the first direction until a second point in time when switching causes the coil current (Icoil) to flow again to the second direction, it is possible to control such that one or more of the MOSFETs (field effect transistors) M1 and M4 repeatedly switch the on-state and the off-state, control such that at least one of the MOSFETs (field effect transistors) M2 and M3 always has the off-state.
According to one embodiment of the present invention explained now, the coil current (Icoil) can be made substantially to a first current value set in advance. However, if the bridging power supply (VM) becomes too low, a situation may occur in which the coil current (Icoil) can only have a value lower than the first current value. Nevertheless, according to the present invention, even in the case where the bridge power supply (VM) varies to an excessive value, there is an advantage that the coil current (Icoil) can be made substantially not larger than the preset first current value.
According to one embodiment of the present invention explained now, it is possible to control so that the coil current (Icoil) becomes substantially the first current value set in advance, or at least not substantially larger than the first current value. In contrast, according to the prior art, the coil current (Icoil) has a second current value (t) that varies with the magnitude of the bridge power supply (VM).
In the case where the second current value (t) is larger than the first current value, a difference value between the second current value (t) and the first current value is hereinafter referred to as "a coil current reduction amount (Δ i (t))".
The decrease (Δ I (t)) of the coil current is caused by the value of the reference voltage (Vref) input to the comparator 410 and/or the sense impedance (R)EXT) And the value of (c) is changed.
In other words, according to an embodiment of the present invention shown in fig. 4, the value of the coil current controlled and flowing may be determined according to the value of the reference voltage (Vref) input to the comparator 410 and/or the sensing impedance (R)EXT) Is determined by the value of (c). In the embodiment shown in FIG. 4, the value of the reference voltage (Vref) and the sense impedance (R)EXT) Is fixed to a previously designed value, so that the coil current maintains a previously set, predetermined value.
FIG. 5 is a timing diagram showing voltage and current related values at each node of the circuit shown in FIG. 4. Fig. 5 can be understood in the same manner as fig. 3.
In fig. 5 (c), the solid line represents the second current value as the coil current value when the configuration of the sensing impedance and the comparator of fig. 4 is not adopted, and the broken line represents the first current value as the coil current value when the configuration of the sensing impedance and the comparator of fig. 4 is adopted. The absolute value of the first current value is smaller than the absolute value of the second current value. Also, the difference value between the second current value and the first current value may be expressed as "a decrease amount of coil current (Δ i (t))". The first current value may be maintained at a specific value even if the battery voltage fluctuates, but the second current value may be different if the battery voltage fluctuates.
At a first point in time, starting at the Forward interval shown in fig. 5, the MOSFETs (field effect transistors) (M1, M4) may have an on-state. At least one of the MOSFETs (M1, M4) may repeatedly switch on-state and off-state in a Forward interval after the first point in time of the start. In the Forward interval, MOSFETs (field effect transistors) (M2, M3) may be in an off state all the time.
Also, at a second point in time when the Reverse interval shown in fig. 5 begins, the MOSFETs (field effect transistors) (M2, M3) may have an on state. At least one of the MOSFETs (field effect transistors) (M2, M3) may repeatedly switch on-state and off-state during a Reverse interval after the second point in time of the start. In the Reverse interval, MOSFETs (field effect transistors) (M1, M4) may be always in an off state.
In fig. 4 and 5, the current flow in the time zone denoted by "Forward" proceeds along the path VM → M1 → L1 → M4 → REXT, and the current flow in the time zone denoted by "Reverse" proceeds along the path VM → M3 → L1 → M2 → REXT.
In the circuit of fig. 4, in the conventional configuration shown in fig. 2, a sense impedance (R) is added as a current sense impedance to the source of the lower NMOS (N-type metal oxide semiconductor) (M2, M4)EXT) So that the current flowing through the MST coil can be sensed. Can utilizeA comparator 410 for comparing the sensed impedance (R)EXT) A voltage (Vcs) at one end thereof and a reference voltage (Vref).
When the voltage (Vcs) > reference voltage (Vref), the upper NMOS (N-type metal oxide semiconductor) (M1, M3) or the lower NMOS (N-type metal oxide semiconductor) (M2, M4) is turned off, limiting the current flowing through the MST coil (L1), so that the IPK value shown in fig. 3 can be prevented from exceeding the value designed in advance.
Fig. 6 shows a circuit configuration of the MST driver 2 according to another embodiment of the invention.
FIG. 7 is a timing diagram showing voltage and current related values at each node of the circuit of FIG. 6. Fig. 7 can be understood in the same manner as fig. 5.
That is, in fig. 7 (c), the solid line represents the second current value as the coil current when the configuration of the other embodiment of the present invention shown in fig. 6 is not adopted, and the broken line represents the first current value as the coil current when the configuration of the other embodiment of the present invention shown in fig. 6 is adopted. The first current value is less than the second current value. The difference value between the first value and the second value is expressed as "a coil current decrease amount (Δ i (t)"). The first current value may be maintained at a specific value even if the battery voltage fluctuates, but the second current value may be different if the battery voltage fluctuates.
The circuit of fig. 6 is a modification of the circuit of fig. 4.
If the circuit of fig. 6 is compared with the circuit of fig. 4, it can be seen that the circuit of fig. 6 adds an NMOS (N-type metal oxide semiconductor) to the circuit of fig. 4 (M1S, M3S).
At this time, the NMOS (N-type metal oxide semiconductor) (M1S, M3S) may function to pass a current proportional to a current flowing through the upper NMOS (N-type metal oxide semiconductor) (M1, M3). For example, the NMOS (N-type metal oxide semiconductor) (M1S, M3S) functions as a current mirror like the upper NMOS (N-type metal oxide semiconductor) (M1, M3).
Also, in FIG. 4, the impedance (R) is sensedEXT) Connected to the source of the lower NMOS (N-type metal oxide semiconductor) (M2, M4), and modified as shown in FIG. 6In the circuit of (2), sense impedance (R)EXT) And the source of the added NMOS (N-type metal oxide semiconductor) (M1S) and NMOS (N-type metal oxide semiconductor) (M3S) are connected.
That is, the proportional current (Icoil2) can be transmitted from the NMOS (N-type metal oxide semiconductor) (M1S, M3S) receiving the current distributed to the upper NMOS (N-type metal oxide semiconductor) (M1, M3) to the sense impedance (R)EXT) And (4) flowing.
Therefore, the value of the coil current (Icoil) flowing from the NMOS (N-type metal oxide semiconductor) (M1, M3) to the MST coil (L1) and the value of the current flowing through the sense resistor (R)EXT) Are proportional to each other (Icoil 2).
In fig. 6 and 7, the current flow in the time zone denoted by "Forward" proceeds along the path VM → M1 → L1 → M4, and the current flow in the time zone denoted by "Reverse" proceeds along the path VM → M3 → L1 → M2.
When the voltage (Vcs) of the sense node (CS) is greater than the reference voltage (Vref) (i.e., Vcs > Vref), the upper NMOS (N-type metal oxide semiconductor) (M1, M3) or the lower NMOS (N-type metal oxide semiconductor) (M2, M4) is turned off, limiting the current (Icoil) flowing through the MST coil (L1), so that the value of IPK shown in fig. 3 can be reduced.
That is, when the voltage (Vcs) is greater than the reference voltage (Vref), a logic high value is output at the output node (C1) of the comparator 410, otherwise, a logic low value may be output.
In addition, if the output node (C1) outputs a logic high level value, the control section 420 may control the bridge circuit such that the coil current does not flow through the MST coil (L), and more specifically, may control an operation of an upper NMOS (N-type metal oxide semiconductor) (M1, M3) or a lower NMOS (N-type metal oxide semiconductor) (M2, M4) constituting the bridge circuit, such that the coil current (Icoil) and the proportional current (Icoil2) are naturally attenuated, and thus, the voltage of the sense node (CS) is reduced, and then, the voltage of the output node (C1) of the comparator 410 is changed to a logic low level again, and at this time, the control section 420 may cause the coil current to flow through the MST coil (5 1) again, and then the coil current (Icoil) is increased, and if the coil current (Icoil) is increased, then, the proportional current (icl) is proportional to the coil current (icl), the proportional current (Icoil) is also increased, the voltage of the sense node (CS) is increased again, and the comparison result of the comparison node (CS) is changed to a logic high level value L, and thus, the output current value of the coil 410 is changed again, and the comparison result is changed to a first control section 581.
Fig. 8 shows a circuit configuration of the MST driver 3 of yet another embodiment of the present invention.
The circuit shown in fig. 8 is an embodiment that is a variation of the circuit shown in fig. 4. If only the differences with respect to the circuit of fig. 4 are explained, the reference voltage (Vref) input to the comparator 410 can be variably adjusted by means of a DAC (digital-to-analog converter) 430 in the case of the circuit of fig. 8. For this purpose, the DAC (digital-to-analog converter) 430 may be controlled by means of a further second control section (not shown in the figure) or by means of the control section 420.
FIG. 9 is a timing diagram showing voltage and current related values at each node of the circuit shown in FIG. 8. The horizontal axis of fig. 9 represents time.
In the control voltage AIN or BIN correlation chart of fig. 9(a), digital signal values corresponding to a logic high level and a logic low level are suggested. Fig. 9(a) shows only one of the control voltages AIN and BIN. The control voltages AIN and BIN may have a complementary relationship to each other. The control voltage AIN may be a signal having a PWM waveform.
In fig. 9 (B), the copy control voltage INT _ a or INT _ B is shown. The copy control voltage INT _ a or INT _ B delays and copies the control voltage AIN or BIN. For example, in the input signal (AIN/BIN) in (a) of fig. 9, the signal during the logic high level time interval (a) is copied to the signal during the time interval (a') in (b) of fig. 9.
In one embodiment of the present invention, the replica control voltage may be input in the gate of an NMOS (N-type metal oxide semiconductor) (M1, M4) or an NMOS (N-type metal oxide semiconductor) (M2, M3) instead of the control voltage.
The copying may be performed by the control part 420. Since the control unit 420 cannot know the signal pattern shown in fig. 9(a) in advance, the signal shown in fig. 9(a) is observed for the copy, and the copy control signal is generated using the result.
The delay time may be confirmed with reference numeral 910. The delay time may be the same as or longer than the maximum value among the lengths of the respective logic high level time intervals and the lengths of the respective logic low level time intervals of the input signal (AIN/BIN) shown in (a) of fig. 9.
For the copying, a counter may be included in the control part 420. The counter counts the length of the logic high time period (a) and the length of the logic low time period (b) of the signal shown in fig. 9(a) and is used as basic data required for the reproduction.
The signal shown in (c) of fig. 9 shows an example of a pattern of the reference voltage (Vref) which is varied and outputted by a DAC (digital-to-analog converter) 430 controlled by the control section 420.
For example, it may be designed that the reference voltage (Vref) has a positive value when the copy control voltage INT _ a or INT _ B has a logic high level value, and a negative value when the copy control voltage INT _ a or INT _ B has a logic low level value.
In this case, in the present invention, the reference voltage (Vref) may be maintained at the first maximum value 191 only for a predetermined time interval (e) after the start time point of the first time interval 91 and before the end time point of the first time interval (a) as shown in fig. 9 (c), instead of the reference voltage (Vref) being maintained at the predetermined first constant value at all times in the first time interval 91 during the first time interval 91 in which the copy control voltage is maintained at the specific logic value. Between the time interval (a) and the time interval (e), the reference voltage (Vref) may be decreased by (b) and then increased again by (d). At this time, between the time interval (b) and the time interval (d), the time interval (c) in which the reference voltage (Vref) is maintained to the first minimum value having a value of 0 or more is also permitted. At this time, the first minimum value may have a value of 0 or more than 0, for example.
Similarly, in the present invention, in the second time interval 92 in which the copy control voltage is maintained at a specific different logic value, the second minimum value 192 may be maintained during a predetermined time interval (e2) after the start time point of the second time interval 92 and before the end time point of the predetermined time interval (a2) and the second time interval (e2), as shown in fig. 9 (c), instead of always maintaining the predetermined second constant value in the second time interval 92. Further, the value of the reference voltage (Vref) may be increased (b) and then decreased again (d2) between the time interval (a2) and the time interval (e 2). At this time, a time interval (c2) in which the reference voltage (Vref) is allowed to be maintained at the second maximum value having a value of 0 or less may also be allowed between the time interval (b2) and the time interval (d 2). At this time, the second maximum value may be 0 or a value less than 0.
The circuit shown in fig. 8 is a circuit in which, in order to reduce the total amount of current flowing through the MST coil (L1), the reference voltage (Vref) compared with the sense voltage (Vcs) is modulated (MODU L ion) by a DAC (digital-to-analog converter) 430 so that only the front and rear EDGE (EDGE) components remain in the square wave signal.
When the absolute value of the coil current change amount in the time intervals (b, b2, d2) is limited to be equal to or lower than a predetermined level, the output voltage of the detection head of the MST receiver shown in fig. 1 (b) may have an invalid value.
As described above, the length of the logic high time interval and the length of the logic low time interval of the input signal (AIN/BIN) shown in fig. 9(a) can be measured by the counter included in the control unit 420. Further, information obtained by counting the length of the logic high level time interval and the length of the logic low level time interval can be used as reference data necessary for the copying.
When the reference voltage (Vref) is given as shown in fig. 9 (c), in the circuit of fig. 8, the current (Icoil) flowing through the MST coil (L1) is formed as shown in fig. 9 (d). from fig. 9 (d), it is understood that the entire amount of the current (Icoil) is reduced, and as a result, the entire amount of power required for MST signal transmission can be reduced.
On the other hand, in the current graph shown in fig. 9 (d), since the amount of current abruptly changes in the first gap (S1), the RX device detects the electromotive force due to the magnetic field change thus generated, and can effectively detect a signal. However, when the value of the second gap (S2) is appropriately and gently controlled, the RX device may be substantially unable to detect a signal.
In yet another embodiment of the present invention, a coil current driving chip may be provided.
The coil current driving chip 3 may include: sensing part (R)EXTM1S) generating a sense voltage (Vcs) substantially proportional to a coil current (Icoil) flowing through a coil (L1), a comparison section 410 outputting a first value corresponding to a first logic value when the sense voltage is greater than a predetermined comparison reference voltage (Vref), and otherwise outputting a second value corresponding to a second logic value, and a control section 420 causing a first switch (M1) supplying the coil current to the coil to be switched to an off state when an output value of the comparison section 410 is the first value, and causing the first switch (M1) to be switched to an on state when the output value of the comparison section 410 is the second value.
At this time, the first logical value may be "1" and the second logical value may be "0".
In this case, the method may further include: a fourth switch (M4) having one terminal connected to the other terminal of the coil; and a sensing impedance (R)EXT) A second switch (M1) connected to the other terminal of the second switch or the other terminal of the first switch; one terminal of the first switch (M1) is connected to one terminal of the coil, and the sensing part (R)EXTM1S) comprises the sense impedance, the sense voltage being a value proportional to the voltage across the sense impedance.
Alternatively, the method may further include: a fourth switch having one terminal connected to the other terminal of the coil; a current mirror switch generating a complex proportional to the coil current flowing through the first switch (M1)Making current; and a sense impedance connected to one terminal of the current mirror switch; one terminal of the first switch (M1) is connected to one terminal of the coil, and the sensing part (R)EXTM1S) comprises the sense impedance, the sense voltage being a value proportional to the voltage across the sense impedance.
At this time, the comparing part 410 may include: a first input terminal receiving the input sensing voltage; a second input terminal for receiving the comparison reference voltage (Vref); an output terminal (C1) providing output voltages corresponding to different logic values from each other according to whether the sense voltage is greater than or less than the comparison reference voltage (Vref).
In this case, the comparison reference voltage (Vref) may be changed over time by the control unit.
At this time, the comparison reference voltage (Vref) may be an output voltage of a DAC (digital-to-analog converter) 430 controlled by the control part.
In this case, the controller may further include an input terminal for a first control voltage (AIN) having a PWM waveform, one terminal of the first switch (M1) may be connected to one terminal of the coil, the controller may generate a first replica control voltage (INT _ a) that is delayed and replicated with respect to the first control voltage, the comparison reference voltage (Vref) may be decreased and then increased during at least a part (b, c, d) of a time interval (a ') in which the first replica control voltage has a value corresponding to the first logical value ('1'), and the on/off state of the first switch (M1) may be switched according to the output value of the comparator 410 during at least a part of a time interval in which the first replica control voltage has a value corresponding to the first logical value ('1 ').
At this time, the input terminal may be made to further include a second control voltage (BIN) having a complementary waveform to the PWM waveform, and the control section may further generate a second replica control voltage (INT _ B) that delays and replicates the second control voltage.
According to still another embodiment of the present invention, there may be provided a coil current driving chip including: a power supply terminal;the current sensing apparatus includes a coil, a first switch connected to one terminal of the coil, a fourth switch connected to the other terminal of the coil, a sensing part generating a sensing voltage substantially proportional to a coil current flowing through the coil, a comparing part outputting a first value corresponding to a first logic value when the sensing voltage is greater than a predetermined comparison reference voltage, and otherwise outputting a second value corresponding to a second logic value, and a control part controlling an on/off state of the first switch and an on/off state of the fourth switch, controlling a magnitude of a current flowing through the coil, the power supply terminal may be, for example, a power supply node VM. shown in FIG. 4, FIG. 6, or FIG. 8, the first switch and the fourth switch may be, for example, a switch M1 and a switch M4. shown in FIG. 4, FIG. 6, or FIG. 8, respectively, the coil may be, for example, a coil L1 shown in FIG. 4, FIG. 6, or FIG. 8, and the comparing part may include, for example, reference numerals 410, 430, REXTOr may for example comprise the reference numbers M1S, R shown in fig. 6EXTC1.
In this case, the first switch may have one terminal connected to one terminal of the coil, the first switch may have another terminal connected to the power supply terminal, and the control unit may be configured to switch at least one of the first switch and the fourth switch to an off state when the output value of the comparison unit is the first value, and to keep the first switch and the fourth switch in the on state when the output value of the comparison unit is the second value, so that the absolute value of the coil current may be kept at or below a predetermined value.
With the above embodiments of the present invention, those skilled in the art can easily make various changes and modifications without departing from the essential characteristics of the present invention. The contents of the claims may be combined with other claims not referred to, to the extent they are understood by this specification.

Claims (6)

1. A coil current driving chip comprising:
a sensing unit that generates a sensing voltage substantially proportional to a coil current flowing through the coil;
a comparison section which outputs a first value corresponding to a first logical value when the sensing voltage is greater than a predetermined comparison reference voltage, and outputs a second value corresponding to a second logical value otherwise; and
a control unit that switches a first switch that supplies the coil current to the coil to an off state when the output value of the comparison unit is the first value, and switches the first switch to an on state when the output value of the comparison unit is the second value,
wherein the coil current is a current supplied to the coil by the coil current driving chip.
2. The coil current driving chip according to claim 1,
the comparison reference voltage is changed with time by the control unit.
3. The coil current driving chip according to claim 1,
further comprising an input terminal for a first control voltage having a PWM waveform,
one terminal of the first switch is connected to one terminal of the coil,
the control section generates a first replica control voltage that is delayed and replicated from the first control voltage,
the comparison reference voltage is raised after being lowered during at least a part of a time interval in which the first replica control voltage has a value corresponding to the first logical value, and,
and switching an on/off state of the first switch in accordance with an output value of the comparison unit during at least a part of a time interval in which the first replica control voltage has a value corresponding to the first logical value.
4. The coil current driving chip according to claim 1, further comprising:
a fourth switch having one terminal connected to the other terminal of the coil; and
a sense impedance connected to the other terminal of the fourth switch;
one terminal of the first switch is connected to one terminal of the coil,
the sensing portion includes the sensing impedance,
the sense voltage is a value proportional to the voltage across the sense impedance.
5. The coil current driving chip according to claim 1, further comprising:
a fourth switch having one terminal connected to the other terminal of the coil;
a current mirror switch that generates a replica current proportional to the coil current flowing through the first switch; and
a sense impedance connected to one terminal of the current mirror switch;
one terminal of the first switch is connected to one terminal of the coil,
the sensing portion includes the sensing impedance,
the sense voltage is a value proportional to the voltage across the sense impedance.
6. A coil current driving chip comprising:
a power supply terminal;
a first switch connected to one terminal of the coil;
a fourth switch connected to the other terminal of the coil;
a sensing unit that generates a sensing voltage substantially proportional to a coil current flowing through the coil;
a comparison section that outputs a first value corresponding to a first logical value when the sensing voltage is greater than a predetermined comparison reference voltage, and outputs a second value corresponding to a second logical value otherwise; and
a control unit that controls an on/off state of the first switch and an on/off state of the fourth switch, and controls a magnitude of a current flowing through the coil;
one terminal of the first switch is connected to one terminal of the coil,
the other terminal of the first switch is connected to the power supply terminal,
the control unit turns off at least one of the first switch and the fourth switch when the output value of the comparison unit is the first value, and turns on the first switch and the fourth switch when the output value of the comparison unit is the second value, so that the absolute value of the coil current is kept at or below a predetermined value,
wherein the coil current is a current supplied to the coil by the coil current driving chip.
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