CN108710401B - Band-gap reference voltage source with high precision and large driving current - Google Patents

Band-gap reference voltage source with high precision and large driving current Download PDF

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CN108710401B
CN108710401B CN201810978437.0A CN201810978437A CN108710401B CN 108710401 B CN108710401 B CN 108710401B CN 201810978437 A CN201810978437 A CN 201810978437A CN 108710401 B CN108710401 B CN 108710401B
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electrode
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CN108710401A (en
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白涛
李秋利
简云飞
张猛娇
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Anhui North Microelectronics Research Institute Group Co ltd
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North Electronic Research Institute Anhui Co., Ltd.
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/46Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/56Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
    • G05F1/575Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices characterised by the feedback circuit

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  • Automation & Control Theory (AREA)
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Abstract

The invention discloses a band-gap reference voltage source with high precision and large driving current, which comprises a positive temperature coefficient current generating circuit, a zero temperature coefficient voltage buffer circuit and a band-gap voltage reference source output stage; the positive temperature coefficient current generating circuit generates a current proportional to absolute temperature; the zero temperature coefficient voltage buffer circuit promotes the current driving capability of the positive temperature coefficient current generating circuit and outputs voltage; the bandgap voltage reference source output stage detects a variation voltage difference of an output voltage of the bandgap voltage reference source output stage with respect to an output voltage of the zero temperature coefficient voltage buffer circuit, amplifies the voltage difference, and inversely suppresses the variation of the output voltage of the bandgap voltage reference source output stage by the amplified voltage difference. The band gap reference voltage source does not need an operational amplifier to realize high-precision clamping voltage, and can overcome the channel modulation effect of the traditional current mirror; the circuit has simple structure, larger driving capability and quick load transient response.

Description

Band-gap reference voltage source with high precision and large driving current
Technical Field
The invention belongs to the field of integrated circuit design, and particularly relates to a large-drive current band-gap reference voltage source circuit.
Background
High precision circuits such as analog-to-digital, digital-to-analog converters, phase locked loops, power management systems, etc. require a bandgap reference source of low temperature drift to be used as a reference voltage. The conventional bandgap reference voltage source adopts an operational amplifier to clamp the BE junction voltage, but the use of the operational amplifier not only increases additional power consumption current but also consumes voltage margin, so that the bandgap reference cannot work under a lower power supply.
The driving capability of the common band-gap reference voltage source is very small, usually less than 0.1mA, which causes that the band-gap reference voltage source cannot be connected with a load with lower impedance; the common solution is to add a voltage follower to the output of the band gap voltage, but the offset of the voltage follower can affect the accuracy of the output voltage and increase the complexity of the circuit; at the same time, considering that the load of the bandgap voltage will suddenly change, a faster feedback loop is also required to suppress this change.
Disclosure of Invention
The invention provides a band-gap reference voltage source which is realized based on a standard CMOS process and has high precision and large current driving capability. The VBE is clamped by replacing the operational amplifier through negative feedback of a current loop, and meanwhile, a push-pull amplifier is adopted to improve the swing amplitude.
In order to solve the technical problems, the invention provides a band-gap reference voltage source with high precision and large driving current.
A band gap reference voltage source with high precision and large driving current is characterized by comprising: the zero temperature coefficient voltage buffer circuit is connected with the band gap voltage reference source output stage;
the positive temperature coefficient current generating circuit generates a current I proportional to absolute temperature PTAT
The zero temperature coefficient voltage buffer circuit promotes the current driving capability of the positive temperature coefficient current generating circuit and outputs voltage V 7
The band gap voltage reference source output stage comprises a common gate differential amplifying structure and a push-pull structure connected with the grid electrode of the MOS tube M23; the common-gate differential amplification structure detects the output voltage of the drain electrode of the MOS tube M23, namely the output voltage V of the output stage serving as the band-gap voltage reference source out Output voltage V of voltage buffer circuit with relative zero temperature coefficient 7 The voltage difference DeltaV is amplified and transmitted to the gate end of the MOS tube M23, and the drain end voltage of the MOS tube M23, namely the output voltage V of the band-gap voltage reference source output stage is reversely restrained out Is a variation of (c).
The positive temperature coefficient current generating circuit comprises MOS transistors M1, M2, M3, M4, M5, M6 and M7, PNP transistors Q1 and Q2 and resistors R1 and R2.
The grid electrode of the MOS tube M1, the grid electrode of the MOS tube M2 and the drain electrode of the MOS tube M4 are connected together; the drain electrode of the MOS tube M1, the drain electrode of the MOS tube M3 and the grid electrode of the MOS tube M5 are connected with the grid electrode of the MOS tube M6; the grid electrode of the MOS tube M3, the grid electrode of the MOS tube M4, the grid electrode and the drain electrode of the MOS tube M7 are connected with the drain electrode of the MOS tube M5; the drain electrode of the MOS tube M6 is connected with the source electrode of the MOS tube M4 and the emitter electrode of the PNP tube Q2 through a resistor R2 in common to the current mirror node 4; the source electrode of the MOS tube M3 and the source electrode of the MOS tube M7 are commonly connected to form a current mirror node 3 and then commonly connected with the emitter electrode of the PNP tube Q1 through a resistor R1; the collector electrodes and the base electrodes of the PNP tubes Q1 and Q2 are commonly grounded; the source of the MOS transistor M1, the source of the MOS transistor M2, the source of the MOS transistor M5 and the source of the MOS transistor M6 are commonly connected to the power supply VDD.
The zero temperature coefficient high-stability voltage buffer circuit comprises MOS transistors M8, M9, M10, a resistor R3, a capacitor C1 and a PNP transistor Q3.
The grid electrode of the MOS tube M8 is connected with the grid electrode of the MOS tube M2 in the positive temperature coefficient current generating circuit; the grid electrode of the MOS tube M9 is connected with the drain electrode of the MOS tube M5 in the positive temperature coefficient current generating circuit; the drain electrode of the MOS tube M8, the drain electrode of the MOS tube M9 and the grid electrode of the MOS tube M10 are connected together and connected to the drain electrode of the MOS tube M10 through a capacitor C1, and the drain electrode of the MOS tube M10 is connected to the source electrode of the MOS tube M9 and the emitter electrode of the PNP tube Q3 through a resistor R3; the base and collector of PNP transistor Q3 are commonly connected to ground. The source of the MOS transistor M8 and the source of the MOS transistor M9 are commonly connected to the power supply VDD. The drain voltage of the MOS tube M10 is zero temperature coefficient high-stability voltage buffer circuit output voltage V 7
The band gap voltage reference source comprises MOS tubes M11, M12, M13, M14, M15, M16, M17, M18, M19, M20, M21, M22 and M23; the MOS transistors M11, M12, M13, M14, M15 and M16 form a common-gate differential amplification structure; MOS tubes M18 and M22 form a push-pull structure.
The source electrode of the MOS tube M12 and the source electrode of the MOS tube M14 are connected to the drain electrode of the MOS tube M10 in the zero temperature coefficient high-stability voltage buffer circuit, and the grid electrode of the MOS tube M12, the grid electrode of the MOS tube M11, the drain electrode of the MOS tube M15 are connected together; the grid electrode of the MOS tube M14 is connected with the drain electrode, the grid electrode of the MOS tube M13 and the drain electrode of the MOS tube M16; the grid electrode of the MOS tube M15 and the grid electrode of the MOS tube M16 are connected with an external bias voltage VB; the source electrode of the MOS tube M15 and the source electrode of the MOS tube M16 are grounded; the drain electrode of the MOS tube M12 and the drain electrode of the MOS tube M17 are connected with the grid electrode and the grid electrode of the MOS tube M18; drain electrode of MOS tube M13 and drain electrode of MOS tube M19The electrode is connected with the grid electrode and the grid electrode of the MOS tube M20; the source electrode of the MOS tube M17, the source electrode of the MOS tube M18, the source electrode of the MOS tube M19 and the source electrode of the MOS tube M20 are commonly grounded; the source electrode of the MOS tube M11, the source electrode of the MOS tube M13 and the drain electrode of the MOS tube M23 are commonly connected with the output voltage V serving as a band gap voltage reference source out The method comprises the steps of carrying out a first treatment on the surface of the The grid electrode of the MOS tube M23, the drain electrode of the MOS tube M22 and the drain electrode of the MOS tube M18 are connected together; the grid electrode of the MOS tube M22 and the grid electrode of the MOS tube M21 are connected with the drain electrode of the MOS tube M20 together; the source of the MOS transistor M21, the source of the MOS transistor M22 and the source of the MOS transistor M23 are commonly connected to the power supply VDD.
The invention has the beneficial effects that:
the band gap reference voltage source does not need an operational amplifier to realize high-precision clamping voltage, and can overcome the channel modulation effect of the traditional current mirror; the invention has simple circuit structure, larger driving capability and quick load transient response.
Drawings
Fig. 1 shows a bandgap reference voltage source circuit of the invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present invention, and are not intended to limit the scope of the present invention.
The circuit comprises the following components:
(1) MOS transistors M1, M2, M3, M4, M5, M6, M7, PNP transistors Q1, Q2 and resistors R1 and R2 form a high-precision positive temperature coefficient current generating circuit, namely, a current I proportional to absolute temperature is generated PTAT
The grid electrode of the MOS tube M1, the grid electrode of the MOS tube M2 and the drain electrode of the MOS tube M4 are connected together; the drain electrode of the MOS tube M1, the drain electrode of the MOS tube M3 and the grid electrode of the MOS tube M5 are connected with the grid electrode of the MOS tube M6; the grid electrode of the MOS tube M3, the grid electrode of the MOS tube M4, the grid electrode and the drain electrode of the MOS tube M7 are connected with the drain electrode of the MOS tube M5; the drain electrode of the MOS tube M6 is connected with the source electrode of the MOS tube M4 and the emitter electrode of the PNP tube Q2 through a resistor R2 in common to the current mirror node 4; the source electrode of the MOS tube M3 and the source electrode of the MOS tube M7 are commonly connected to form a current mirror node 3 and then commonly connected with the emitter electrode of the PNP tube Q1 through a resistor R1; the collector electrodes and the base electrodes of the PNP tubes Q1 and Q2 are commonly grounded; the source of the MOS transistor M1, the source of the MOS transistor M2, the source of the MOS transistor M5 and the source of the MOS transistor M6 are commonly connected to the power supply VDD.
Let MOS pipe M1 and M2, M3 and M4, M5 and M6, M7 and M8 have the same width W length L ratio respectively, namely:
m5, M6, M7 and R2 form a negative feedback clamp to accurately equalize the voltages at nodes 3 and 4 of the current mirror formed by M1, M2, M3 and M4, i.e., V 3 =V 4 The method comprises the steps of carrying out a first treatment on the surface of the Let Q1 emitter current be I PTAT
Wherein V is EB2 Is the voltage difference between the emitter and the base of the PNP tube Q2, V EB1 The voltage difference between the emitter and the base of the PNP transistor Q1,is thermal voltage, q is electron charge, K B The Boltzmann constant is that T is absolute temperature, N is the emitter area ratio of PNP transistors Q1 and Q2, M is the collector current value ratio of PNP transistors Q2 and Q1, R 1 Is the resistance value of the resistor R1.
When (when)The currents of MOS transistors M5 and M6 are +.>
Wherein a is the ratio of the width-to-length ratio of the MOS tube M5 to the width-to-length ratio of the MOS tube M1.
(2) MOS tubes M8, M9 and M10, resistor R3, capacitor C1 and PNP tube Q3 form a zero temperature coefficient high-stability voltage buffer circuit with output voltage V 7 The voltage has a certain current driving capability.
The grid electrode of the MOS tube M8 is connected with the grid electrode of the MOS tube M2 in the positive temperature coefficient current generating circuit; m is MThe grid electrode of the OS tube M9 is connected with the drain electrode of the MOS tube M5 in the positive temperature coefficient current generating circuit; the drain electrode of the MOS tube M8, the drain electrode of the MOS tube M9 and the grid electrode of the MOS tube M10 are connected together and connected to the drain electrode of the MOS tube M10 through a capacitor C1, and the drain electrode of the MOS tube M10 is connected to the source electrode of the MOS tube M9 and the emitter electrode of the PNP tube Q3 through a resistor R3; the base and collector of PNP transistor Q3 are commonly connected to ground. The source of the MOS transistor M8 and the source of the MOS transistor M9 are commonly connected to the power supply VDD. The drain voltage of the MOS tube M10 is zero temperature coefficient high-stability voltage buffer circuit output voltage V 7
Let the gate bias voltage of M8 be V 2 The emitter areas of Q3 and Q2 are chosen to be equal. M1 and M8, M9 and M4 are the same in width W length L ratio, respectively.
The current of M8 is positive temperature coefficient current
PNP tube Q3, MOS tube M9 and M8 constitute the common gate amplification. M10 and R3 form a common source amplifier, the output of which is the input of a common gate amplifier, therefore, MOS transistors M8, M9, M10, resistor R3, capacitor C1 and PNP transistor Q3 form a negative feedback loop with unity gain, which ensures V 11 =V 3 =V 4 . The capacitor C1 ensures the frequency stability of this loop. Wherein V is 11 Is the voltage at node 11 in fig. 1.
Because BE junction has negative temperature coefficient, V T Has positive temperature coefficient, R 3 Is the resistance of the resistor R3, so by selecting proper resistors R3 and R1 or a or M, N, the output voltage V can be realized 7 Is a zero temperature coefficient of (c). Wherein V is EB3 The voltage difference between the emitter and the base of the PNP transistor Q3.
(3) MOS tubes M11, M12, M13, M14, M15, M16 and M17M18, M19, M20, M21, M22 and M23 form the output stage of the band gap voltage reference source, and the output voltage is V out . The current driving capability of the band gap voltage reference source is further improved, and meanwhile, the rapid load transient response is realized.
The source electrode of the MOS tube M12 and the source electrode of the MOS tube M14 are connected to the drain electrode of the MOS tube M10 in the zero temperature coefficient high-stability voltage buffer circuit, and the grid electrode of the MOS tube M12, the grid electrode of the MOS tube M11, the drain electrode of the MOS tube M15 are connected together; the grid electrode of the MOS tube M14 is connected with the drain electrode, the grid electrode of the MOS tube M13 and the drain electrode of the MOS tube M16; the grid electrode of the MOS tube M15 and the grid electrode of the MOS tube M16 are connected with an external bias voltage VB; the source electrode of the MOS tube M15 and the source electrode of the MOS tube M16 are grounded; the drain electrode of the MOS tube M12 and the drain electrode of the MOS tube M17 are connected with the grid electrode and the grid electrode of the MOS tube M18; the drain electrode of the MOS tube M13 and the drain electrode of the MOS tube M19 are connected with the grid electrode and the grid electrode of the MOS tube M20; the source electrode of the MOS tube M17, the source electrode of the MOS tube M18, the source electrode of the MOS tube M19 and the source electrode of the MOS tube M20 are commonly grounded; the source electrode of the MOS tube M11, the source electrode of the MOS tube M13 and the drain electrode of the MOS tube M23 are commonly connected with the output voltage V serving as a band gap voltage reference source out The method comprises the steps of carrying out a first treatment on the surface of the The grid electrode of the MOS tube M23, the drain electrode of the MOS tube M22 and the drain electrode of the MOS tube M18 are connected together; the grid electrode of the MOS tube M22 and the grid electrode of the MOS tube M21 are connected with the drain electrode of the MOS tube M20 together; the source of the MOS transistor M21, the source of the MOS transistor M22 and the source of the MOS transistor M23 are commonly connected to the power supply VDD.
Wherein VB is an external bias voltage. M11, M12, M15, M13, M14, M16 form a common-gate differential amplifying structure, which detects the output voltage V of the output stage of the bandgap voltage reference source out Output voltage V of relatively zero temperature coefficient high-stability voltage buffer circuit 7 The weak change voltage difference DeltaV is amplified, and the amplified voltage difference DeltaV is transmitted to the gate end of the MOS tube M23, so as to reversely inhibit the output voltage V which is the drain end voltage of the MOS tube M23 out Is a variation of (c). Thus, for transient changes in load, the loop can respond quickly and suppress the changes.
Because the MOS tubes M22 and M18 are of push-pull structures, the grid voltage of the MOS tube M23 can be maximally close to the power supply VDD, and for a light-load state, the MOS tube M23 is in a subthreshold state, and the MOS tube M23 hardly consumes current; the minimum gate voltage of the MOS tube M23 can be close to 0, and the MOS tube M23 is in a linear state, so that the output stage of the voltage reference source with a larger load current band gap can be driven to be in unit gain negative feedback, and the unit gain negative feedback method comprises the following steps:
high-stability zero temperature coefficient voltage buffer circuit function:
because the external bias voltage VB is not an ideal voltage source, the VB instantaneously changes if external disturbance (power supply change or temperature change or noise) occurs. This change will be transferred to node 7 through M14 and M16, i.e. to V 7 The accuracy of (2) is affected. For a conventional unity gain voltage follower, when the load is instantaneously changed, it takes a long time to recover to an initial state; the voltage buffer circuit in the invention: if VB is raised to cause V 7 The voltage is reduced, and the change is transmitted to the gate end of the MOS tube M10 through the PNP tube Q3 and the MOS tubes M9 and M8, so as to reversely restrain the drain end voltage of the MOS tube M10, namely the output voltage V 7 Thus, for the momentary change in VB, V 7 Can be kept constant, thereby ensuring the output voltage V out And the output voltage accuracy is improved.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.

Claims (4)

1. A band gap reference voltage source with high precision and large driving current is characterized by comprising: the zero temperature coefficient voltage buffer circuit is connected with the band gap voltage reference source output stage;
the positive temperature coefficient current generating circuit generates a current I proportional to absolute temperature PTAT
The zero temperature coefficient voltage buffer circuit performs current driving capability of the positive temperature coefficient current generating circuitPromote and output voltage V 7
The band gap voltage reference source output stage comprises a common gate differential amplifying structure and a push-pull structure connected with the grid electrode of the MOS tube M23; the common-gate differential amplification structure detects the output voltage of the drain electrode of the MOS tube M23, namely the output voltage V of the output stage serving as the band-gap voltage reference source out Output voltage V of voltage buffer circuit with relative zero temperature coefficient 7 The voltage difference DeltaV is amplified and transmitted to the gate end of the MOS tube M23, and the drain end voltage of the MOS tube M23, namely the output voltage V of the band-gap voltage reference source output stage is reversely restrained out Is a variation of (2);
the positive temperature coefficient current generating circuit comprises MOS transistors M1, M2, M3, M4, M5, M6 and M7, PNP transistors Q1 and Q2 and resistors R1 and R2;
the zero temperature coefficient high-stability voltage buffer circuit comprises MOS transistors M8, M9, M10, a resistor R3, a capacitor C1 and a PNP transistor Q3;
the grid electrode of the MOS tube M8 is connected with the grid electrode of the MOS tube M2 in the positive temperature coefficient current generating circuit; the grid electrode of the MOS tube M9 is connected with the drain electrode of the MOS tube M5 in the positive temperature coefficient current generating circuit; the drain electrode of the MOS tube M8, the drain electrode of the MOS tube M9 and the grid electrode of the MOS tube M10 are connected together and connected to the drain electrode of the MOS tube M10 through a capacitor C1, and the drain electrode of the MOS tube M10 is connected to the source electrode of the MOS tube M9 and the emitter electrode of the PNP tube Q3 through a resistor R3; the base electrode and the collector electrode of the PNP tube Q3 are commonly grounded; the source electrode of the MOS tube M8 and the source electrode of the MOS tube M9 are commonly connected to a power supply VDD; the drain voltage of the MOS tube M10 is zero temperature coefficient high-stability voltage buffer circuit output voltage V 7
2. The high-precision large-driving-current band-gap reference voltage source according to claim 1, wherein the grid electrode of the MOS tube M1, the grid electrode and the drain electrode of the MOS tube M2 are commonly connected with the drain electrode of the MOS tube M4; the drain electrode of the MOS tube M1, the drain electrode of the MOS tube M3 and the grid electrode of the MOS tube M5 are connected with the grid electrode of the MOS tube M6; the grid electrode of the MOS tube M3, the grid electrode of the MOS tube M4, the grid electrode and the drain electrode of the MOS tube M7 are connected with the drain electrode of the MOS tube M5; the drain electrode of the MOS tube M6 is connected with the source electrode of the MOS tube M4 and the emitter electrode of the PNP tube Q2 through a resistor R2 in common to the current mirror node 4; the source electrode of the MOS tube M3 and the source electrode of the MOS tube M7 are commonly connected to form a current mirror node 3 and then commonly connected with the emitter electrode of the PNP tube Q1 through a resistor R1; the collector electrodes and the base electrodes of the PNP tubes Q1 and Q2 are commonly grounded; the source of the MOS transistor M1, the source of the MOS transistor M2, the source of the MOS transistor M5 and the source of the MOS transistor M6 are commonly connected to the power supply VDD.
3. The high-precision large-driving-current band-gap reference voltage source according to claim 1, wherein the band-gap reference voltage source comprises MOS transistors M11, M12, M13, M14, M15, M16, M17, M18, M19, M20, M21, M22 and M23; the MOS transistors M11, M12, M13, M14, M15 and M16 form a common-gate differential amplification structure; MOS tubes M18 and M22 form a push-pull structure.
4. The band-gap reference voltage source with high precision and large driving current according to claim 3, wherein the source of the MOS transistor M12 and the source of the MOS transistor M14 are commonly connected to the drain of the MOS transistor M10 in the zero temperature coefficient high-stability voltage buffer circuit, and the gate of the MOS transistor M12 and the gate of the MOS transistor M11 are commonly connected to the drain and the drain of the MOS transistor M15; the grid electrode of the MOS tube M14 is connected with the drain electrode, the grid electrode of the MOS tube M13 and the drain electrode of the MOS tube M16; the grid electrode of the MOS tube M15 and the grid electrode of the MOS tube M16 are connected with an external bias voltage VB; the source electrode of the MOS tube M15 and the source electrode of the MOS tube M16 are grounded; the drain electrode of the MOS tube M12 and the drain electrode of the MOS tube M17 are connected with the grid electrode and the grid electrode of the MOS tube M18; the drain electrode of the MOS tube M13 and the drain electrode of the MOS tube M19 are connected with the grid electrode and the grid electrode of the MOS tube M20; the source electrode of the MOS tube M17, the source electrode of the MOS tube M18, the source electrode of the MOS tube M19 and the source electrode of the MOS tube M20 are commonly grounded; the source electrode of the MOS tube M11, the source electrode of the MOS tube M13 and the drain electrode of the MOS tube M23 are commonly connected with the output voltage V serving as a band gap voltage reference source out The method comprises the steps of carrying out a first treatment on the surface of the The grid electrode of the MOS tube M23, the drain electrode of the MOS tube M22 and the drain electrode of the MOS tube M18 are connected together; the grid electrode of the MOS tube M22 and the grid electrode of the MOS tube M21 are connected with the drain electrode of the MOS tube M20 together; the source of the MOS transistor M21, the source of the MOS transistor M22 and the source of the MOS transistor M23 are commonly connected to the power supply VDD.
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