CN108701619A - Method for fabricating thin film transistor and array substrate - Google Patents
Method for fabricating thin film transistor and array substrate Download PDFInfo
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- CN108701619A CN108701619A CN201780004653.9A CN201780004653A CN108701619A CN 108701619 A CN108701619 A CN 108701619A CN 201780004653 A CN201780004653 A CN 201780004653A CN 108701619 A CN108701619 A CN 108701619A
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- oxide semiconductor
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- 239000010409 thin film Substances 0.000 title claims abstract description 54
- 239000000758 substrate Substances 0.000 title claims abstract description 34
- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000004065 semiconductor Substances 0.000 claims abstract description 38
- 239000010408 film Substances 0.000 claims abstract description 23
- 230000001681 protective effect Effects 0.000 claims abstract description 19
- 239000010410 layer Substances 0.000 claims description 112
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims description 16
- 239000011241 protective layer Substances 0.000 claims description 8
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 7
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 7
- 150000001875 compounds Chemical class 0.000 claims description 7
- 239000001301 oxygen Substances 0.000 claims description 7
- 229910052760 oxygen Inorganic materials 0.000 claims description 7
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000007789 gas Substances 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000003491 array Methods 0.000 description 1
- 238000006701 autoxidation reaction Methods 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000003139 buffering effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000012769 display material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 150000002927 oxygen compounds Chemical class 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 230000032258 transport Effects 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
Abstract
A kind of method for fabricating thin film transistor, including:The native oxide layer (132) for removing two opposite flanks (131) of the oxide semiconductor layer (13) of thin film transistor (TFT), two sides to removing native oxide layer are aoxidized to form protective oxide film (134);Source electrode (141) and drain electrode (142) are formed on being formed with the oxide semiconductor layer (13) to form protective oxide film (134).A kind of array substrate (11).
Description
Technical field
The present invention relates to display panel manufacturing technology field more particularly to a kind of array substrates applied in display panel
With the manufacturing method of thin film transistor (TFT).
Background technology
In the processing procedure of array substrate, the electric leakage degree of the electrical and source electrode and drain electrode of thin film transistor switch has directly
Relationship can remove extra non-multi crystal silicon part by etching mode when making oxide semiconductor layer, then formed
Source electrode and drain electrode, but between source electrode and drain electrode and oxide semiconductor layer, particularly oxide semiconductor layer two side portions with
Leaky is easy to happen between source electrode and drain electrode.
Invention content
The embodiment of the present invention provides a kind of method for fabricating thin film transistor for preventing source electrode and drain electrode from leaking electricity.
The application provides a kind of method for fabricating thin film transistor, the method includes:Remove the oxygen of the thin film transistor (TFT)
The native oxide layer of two opposite flanks of compound semiconductor layer carries out two sides of the removal native oxide layer
Oxidation is to form protective oxide film;Source electrode and leakage are formed on being formed with the oxide semiconductor layer for be formed protective oxide film
Pole.
Wherein, the natural oxide of two opposite flanks of the oxide semiconductor layer of the removal thin film transistor (TFT)
In the step of layer, native oxide layer is removed using hydrofluoric acid.
Wherein, a concentration of the 1% of the hydrofluoric acid.
Wherein, two sides to the removal native oxide layer are aoxidized to form protective oxide film
In step, aoxidized using ozone gas.
Wherein, the autoxidation of two opposite flanks of the oxide semiconductor layer of the thin film transistor (TFT) is removed in step
Before nitride layer, including step, grid is formed on substrate;
Gate insulating layer is formed on the grid;
Oxide semiconductor layer is formed on the insulating layer;Wherein, the oxide semiconductor layer is far from the grid
The surface of insulating layer has protective layer.
Wherein, described to include the step of forming oxide semiconductor layer on the insulating layer:It is formed and covers the grid
The amorphous silicon base layer and the barrier layer above the covering grid of insulating layer and substrate,
The amorphous silicon base layer that the barrier layer is exposed in etching forms the oxide semiconductor layer, and the oxide half
The face that conductor layer both sides are etched exposing is the side.
Wherein, the protective layer is native oxide layer.
Wherein, further include being cleaned to the thin film transistor (TFT) after the step of forming the formation protective oxide film
The step of.
Wherein, the cleaning solution selects pure water.
Wherein, the step removes the natural oxygen of two opposite flanks of the oxide semiconductor layer of the thin film transistor (TFT)
Compound layer, step aoxidize to form protective oxide film and to institute two sides of the removal native oxide layer
Stating the step of thin film transistor (TFT) is cleaned is carried out successively by automation.
The application also provides a kind of array substrate comprising thin film transistor (TFT), the thin film transistor (TFT) is by as previously discussed
Method for fabricating thin film transistor made by.
Oxide semiconductor layer both sides are first etched by herein described method for fabricating thin film transistor during remanufacturing
Surface afterwards carries out deoxidation compound processing, is then forming protective oxide film by ozone, is ensureing that the protective oxide film is equal
Even property prevents from causing source-drain electrode that electrical leakage problems occur because of oxidation problem of non-uniform.
Description of the drawings
It to describe the technical solutions in the embodiments of the present invention more clearly, below will be to needed in the embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for ability
For the those of ordinary skill of domain, without creative efforts, it can also be obtained according to these attached drawings other attached
Figure.
Fig. 1 is the side structure schematic diagram of display panel of the present invention.
Fig. 2 is the layout structure schematic diagram of array substrate shown in Fig. 1.
Fig. 3 is the planar structure schematic diagram of the arbitrary pixel unit of array substrate shown in Fig. 2.
Fig. 4 is the part-structure schematic cross-section of the array substrate of the present invention.
Fig. 5 is the flow chart of method for fabricating thin film transistor provided by the invention.
Fig. 6 and Fig. 7 is the schematic cross-section of method for fabricating thin film transistor step S11 manufacturing process shown in fig. 5.
Fig. 8 is the schematic cross-section of the step S12 manufacturing process of method for fabricating thin film transistor shown in fig. 5.
Specific implementation mode
Below in conjunction with the attached drawing in embodiment of the present invention, the technical solution in embodiment of the present invention is carried out clear
Chu is fully described by.
Referring to Fig. 1, its side structure schematic diagram for display panel in one embodiment of the invention.
As shown in Figure 1, display panel includes the array substrate 11 being cascading, display dielectric layer 13 and color film base
Plate 15.Wherein, multiple display element (not shown), shown multiple display elements are provided on array substrate 11 and color membrane substrates 15
It is performed image display for generating electric field driven display dielectric layer 13.In the present embodiment, display dielectric layer 13 is layer of liquid crystal molecule,
It that is to say that display panel 10 for liquid crystal display panel (Liquid Crystal Display, LCD) to be said in this implementation
It is bright, certainly, ground is changed, display dielectric layer 13 is also with for other display mediums, such as luminous organic material (Organic
Electroluminesence Display, OLED) or other display materials, it is not limited thereto.
Referring to Fig. 2, it is the layout structure schematic diagram of array substrate 11 as shown in Figure 1, as shown in Fig. 2, array substrate
Including multiple pixel units arranged in arrays, along mutually perpendicular direction interval and the scan line 111 and data of insulation arrangement
Line 112, accordingly, pixel unit 110 are respectively arranged between two adjacent data lines 112 and scan line 111, and respectively with
Corresponding wherein a data line and scan line are electrically connected.Each pixel unit 110 includes at least a film crystal
Pipe switch T and pixel electrode Px.
Specifically, incorporated by reference to Fig. 2 together refering to Fig. 3, wherein Fig. 3 is the planar junction of arbitrary pixel unit 110 shown in Fig. 2
Structure schematic diagram.As shown in Figure 2 and Figure 3, thin film transistor switch T includes grid G, source S and drain D, wherein grid G electricity
Property connection scan line 111, source S is electrically connected data line 112, and drain D is electrically connected pixel electrode Px.
Thin film transistor switch T is in the conduction state under being driven by the scanning signal that grid G self-scanning line 111 provides,
The data-signal of image to be displayed is transmitted to the source S of thin film transistor (TFT) T from data line 112, and then is transmitted to picture by drain D
Plain electrode Px, pixel electrode Px the cooperation reference voltage under data-signal driving generate electric field, to reach driving display medium
12 pairs of data-signal of layer perform image display.
The pixel electrode Px and thin film transistor switch T is formed in by semiconductor technology on substrate 10.
Incorporated by reference to Fig. 4, specifically, the grid 11 of thin film transistor (TFT) T forms the surface of substrate 10, and gate insulating layer 12 covers
In 11 surface of grid, active layer 13 is formed in 12 surface of gate insulating layer, wherein gate insulating layer 12 is used to be directed to source layer 13
It is electrically insulated with the formation of grid 11.Source electrode 141 is spaced a predetermined distance with drain electrode 142 and is formed in 13 surface of active layer, wherein described
Preset distance is the conducting channel between source electrode 141 and drain electrode 142.Passivation layer (not shown) is formed in source electrode 141 and drain electrode
On 142, wherein the position that passivation layer corresponds to drain electrode 142 includes opening (not indicating), and patterned pixel electrode Px is formed in blunt
Change on layer and is opened on 142 electric connection of drain electrode by described.It is understood that array substrate 11 be using five photoetching processes in
It is formed on transparent glass substrate 10, wherein substrate 10 is possible to be transparent quartz base plate, glass substrate or plastic substrate.
Tin indium oxide (Indium-Tin-Oxide, ITO) can be used in pixel electrode Px.
Preferably, the cross section of the active layer 13 in thin film transistor switch T is trapezoidal, that is to say including opposite two sides
Side, top margin and bottom edge (figure is not marked), and top margin is spaced a predetermined distance and is contacted with source electrode 141 and drain electrode 142 respectively, bottom edge is contacted with
Gate insulating layer 12.Correspond to, the insulating layer 12 is for preventing source electrode 141 to have in thin film transistor switch T with drain electrode 142
Junction leakage currents (Junct ion Leak).In the present embodiment, active layer 13 is made of amorphous silicon material, and the insulating layer 12 is
Oxide is constituted, such as SiOx.
Referring to Fig. 5, the application provides method for manufacturing thin film transistor array substrate as shown in Figure 4, the method includes:
Step S11 removes the natural oxygen of two opposite flanks 131 of the oxide semiconductor layer 13 of the thin film transistor (TFT)
Compound layer 132;Two opposite flanks 131 of the oxide semiconductor layer 13 of thin film transistor (TFT) shown in fig. 6 are to be formed with nature
Oxide skin(coating) 132, such as SiOx layers, Fig. 7 show the schematic diagram for eliminating natural oxide skin(coating) 132, the natural oxygen
Compound layer refers to that with oxygen one layer of oxygen that chemical reaction variation is formed occurs for the surface that oxide semiconductor layer is exposed in air
Compound layer.
Further, in this step, native oxide layer 132 is mainly removed using hydrofluoric acid.The hydrofluoric acid it is dense
Degree is 1%.Certainly, the concentration of the hydrofluoric acid can select according to the design needs.
Step S12 aoxidizes to form oxide guarantor two sides 131 of the removal native oxide layer 132
Sheath 134;Protective oxide film 134 uniformly covers the side.As shown in figure 8, the natural oxide on the side 131
Layer 132 will produce non-uniform surface and certain positions occur and expose oxidation if making protective oxide film 134 without removing
Object semiconductor layer then source electrode and drain electrode will have the phenomenon that electric leakage, and leads to the electrical property for influencing thin film transistor (TFT), this Shen
The non-uniform phenomenon for please preventing protective oxide film 134 on side 131 just, avoids source electrode and drain electrode leaky.
Further, in this step, the side 131 is aoxidized using ozone gas and forms protective oxide film 134.
As shown in figure 4, as shown in figure 4, step S13, is being formed with the oxide semiconductor to form protective oxide film 134
Source electrode 141 and drain electrode 142 are formed on layer 13.This step first forms metal layer on oxide semiconductor layer 13, passes through patterning
Metal layer described in art pattern CAD forms the source electrode 141 and drain electrode 142.
The application is before above-mentioned steps S11, including step forms grid 11 on the substrate 10;
Step forms gate insulating layer 12 on the grid 11;
Step forms oxide semiconductor layer 13 on the gate insulating layer 12;Wherein, the oxide semiconductor layer
13 surfaces far from the gate insulating layer 12 have protective layer 135.The protective layer 135 is native oxide layer.
Wherein, described to include the step of forming oxide semiconductor layer 13 on the gate insulating layer 12:Form covering
The barrier layer of amorphous silicon base layer and covering 11 top of grid of the gate insulating layer 12 and substrate 10,
The amorphous silicon base layer that the barrier layer is exposed in etching forms the oxide semiconductor layer, and the oxide half
The face that conductor layer both sides are etched exposing is the side.It is described to be etched to wet etching.
Further, further include after the step S12 to formed protective oxide film 134 the thin film transistor (TFT)
The step of being cleaned.In this step, wash number is selected as 3 times, and the cleaning solution selects pure water.
Method for fabricating thin film transistor step S11 described herein, step S12 phase steps S13 using cleaning equipment from
Dynamic transported material cleaning, as shown in figure 4, being formed with the array substrate of oxide semiconductor layer 13 by upper and lower transmission device, such as
Manipulator transports array substrate successively to the first buffer chamber, hydrofluoric acid removal region, ozone oxidation zone, three pure water
It is transported away again after cleaning area, dry section and second buffering area.That is, step S11, step S12 phase steps S13 are
It is carried out successively by automation.
The application also provides a kind of array substrate comprising thin film transistor (TFT), the thin film transistor (TFT) are above-mentioned by the application
Made by method for fabricating thin film transistor described in embodiment.The array substrate is by removing certainly due to oxide semiconductor layer
In the protective layer formed by ozone after right oxide skin(coating), will not occurring source drain leakage phenomenon in use, ensure that array
Electrical effect of substrate.
The above is the preferred embodiment of the present invention, it is noted that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (11)
1. a kind of method for fabricating thin film transistor, which is characterized in that the method includes:
The native oxide layer of two opposite flanks of the oxide semiconductor layer of the thin film transistor (TFT) is removed,
Two sides of the removal native oxide layer are aoxidized to form protective oxide film;
Source electrode and drain electrode is formed on the oxide semiconductor layer for be formed with protective oxide film.
2. method for fabricating thin film transistor as described in claim 1, which is characterized in that the removal thin film transistor (TFT)
In the step of native oxide layer of two opposite flanks of oxide semiconductor layer, natural oxide is removed using hydrofluoric acid
Layer.
3. method for fabricating thin film transistor as claimed in claim 2, which is characterized in that a concentration of the 1% of the hydrofluoric acid.
4. method for fabricating thin film transistor as described in any one of claims 1-3, which is characterized in that described to be removed certainly to described
In the step of two sides of right oxide skin(coating) are aoxidized to form protective oxide film, aoxidized using ozone gas.
5. method for fabricating thin film transistor as described in any one of claims 1-3, which is characterized in that removed in step described thin
Before the native oxide layer of two opposite flanks of the oxide semiconductor layer of film transistor, including step, the shape on substrate
At grid;
Gate insulating layer is formed on the grid;
Oxide semiconductor layer is formed on the insulating layer;Wherein, the oxide semiconductor layer is far from the gate insulator
The surface of layer has protective layer.
6. method for fabricating thin film transistor as claimed in claim 5, which is characterized in that described to form oxygen on the insulating layer
The step of compound semiconductor layer includes:Form the amorphous silicon base layer for covering the gate insulating layer and substrate and the covering grid
Barrier layer above pole,
The amorphous silicon base layer that the barrier layer is exposed in etching forms the oxide semiconductor layer, and the oxide semiconductor
The face that layer both sides are etched exposing is the side.
7. method for fabricating thin film transistor as claimed in claim 5, which is characterized in that the protective layer is natural oxide
Layer.
8. method for fabricating thin film transistor as described in any one of claims 1-3, which is characterized in that forming the formation oxygen
Further include the steps that being cleaned to the thin film transistor (TFT) after the step of compound protective layer.
9. method for fabricating thin film transistor as claimed in claim 8, which is characterized in that the cleaning solution selects pure water.
10. method for fabricating thin film transistor as claimed in claim 8, which is characterized in that it is brilliant that the step removes the film
The native oxide layer of two opposite flanks of the oxide semiconductor layer of body pipe, step are to the removal native oxide layer
Two sides are aoxidized to form protective oxide film and the step of being cleaned to the thin film transistor (TFT) passes through
Automation carries out successively.
11. a kind of array substrate, which is characterized in that including thin film transistor (TFT), the thin film transistor (TFT) is by such as claim 1-10
Made by any one of them method for fabricating thin film transistor.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/CN2017/084804 WO2018209628A1 (en) | 2017-05-18 | 2017-05-18 | Thin film transistor manufacturing method and array substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN108701619A true CN108701619A (en) | 2018-10-23 |
| CN108701619B CN108701619B (en) | 2020-06-23 |
Family
ID=63843742
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201780004653.9A Active CN108701619B (en) | 2017-05-18 | 2017-05-18 | Thin film transistor manufacturing method and array substrate |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108701619B (en) |
| WO (1) | WO2018209628A1 (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140147967A1 (en) * | 2012-11-29 | 2014-05-29 | Lg Display Co., Ltd. | Method of manufacturing oxide thin film transistor |
| CN106206609A (en) * | 2016-08-17 | 2016-12-07 | 深圳市华星光电技术有限公司 | Display device plate and manufacture method thereof |
| CN106298957A (en) * | 2016-09-28 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device |
-
2017
- 2017-05-18 WO PCT/CN2017/084804 patent/WO2018209628A1/en active Application Filing
- 2017-05-18 CN CN201780004653.9A patent/CN108701619B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140147967A1 (en) * | 2012-11-29 | 2014-05-29 | Lg Display Co., Ltd. | Method of manufacturing oxide thin film transistor |
| CN106206609A (en) * | 2016-08-17 | 2016-12-07 | 深圳市华星光电技术有限公司 | Display device plate and manufacture method thereof |
| CN106298957A (en) * | 2016-09-28 | 2017-01-04 | 京东方科技集团股份有限公司 | A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN108701619B (en) | 2020-06-23 |
| WO2018209628A1 (en) | 2018-11-22 |
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Address after: 518115 43 Universiade Software Town, 8288 Longgang Avenue, Henggang Street, Longgang District, Shenzhen City, Guangdong Province Patentee after: Shenzhen Ruoyu Technology Co.,Ltd. Address before: 518115 43 Universiade Software Town, 8288 Longgang Avenue, Henggang Street, Longgang District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN ROYOLE TECHNOLOGIES Co.,Ltd. |
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Effective date of registration: 20210816 Address after: 518100 Rouyu international flexible display base, No. 18 dingshanhe Road, Pingdi street, Longgang District, Shenzhen, Guangdong Province Patentee after: SHENZHEN ROYOLE DISPLAY TECHNOLOGY Co.,Ltd. Address before: Building 43, Dayun software Town, No. 8288 Longgang Avenue, Henggang street, Longgang District, Shenzhen City, Guangdong Province Patentee before: Shenzhen Ruoyu Technology Co.,Ltd. |